US20110227082A1 - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
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- US20110227082A1 US20110227082A1 US13/048,023 US201113048023A US2011227082A1 US 20110227082 A1 US20110227082 A1 US 20110227082A1 US 201113048023 A US201113048023 A US 201113048023A US 2011227082 A1 US2011227082 A1 US 2011227082A1
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- oxide semiconductor
- semiconductor layer
- current value
- photoelectric current
- layer
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 118
- 230000008859 change Effects 0.000 claims abstract description 6
- 230000015572 biosynthetic process Effects 0.000 claims description 14
- 229910052733 gallium Inorganic materials 0.000 claims description 8
- 229910052738 indium Inorganic materials 0.000 claims description 5
- 229910052725 zinc Inorganic materials 0.000 claims description 5
- 230000006866 deterioration Effects 0.000 abstract description 12
- 239000000969 carrier Substances 0.000 abstract description 8
- 230000001747 exhibiting effect Effects 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 115
- 239000010408 film Substances 0.000 description 65
- 229910007541 Zn O Inorganic materials 0.000 description 26
- 239000000758 substrate Substances 0.000 description 15
- 238000010438 heat treatment Methods 0.000 description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 12
- 239000000463 material Substances 0.000 description 12
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 11
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 10
- 239000004973 liquid crystal related substance Substances 0.000 description 10
- 229910052814 silicon oxide Inorganic materials 0.000 description 10
- 229910044991 metal oxide Inorganic materials 0.000 description 9
- 150000004706 metal oxides Chemical class 0.000 description 9
- 238000005215 recombination Methods 0.000 description 9
- 230000006798 recombination Effects 0.000 description 9
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 8
- 229910052782 aluminium Inorganic materials 0.000 description 8
- 229910052581 Si3N4 Inorganic materials 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 239000000523 sample Substances 0.000 description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 7
- 239000002356 single layer Substances 0.000 description 7
- 239000011701 zinc Substances 0.000 description 7
- 229910003437 indium oxide Inorganic materials 0.000 description 6
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 6
- 238000005259 measurement Methods 0.000 description 6
- 239000000956 alloy Substances 0.000 description 5
- 239000012298 atmosphere Substances 0.000 description 5
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- 238000011156 evaluation Methods 0.000 description 5
- 229910052757 nitrogen Inorganic materials 0.000 description 5
- 239000012299 nitrogen atmosphere Substances 0.000 description 5
- 239000001301 oxygen Substances 0.000 description 5
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- 230000001681 protective effect Effects 0.000 description 5
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- 229910052719 titanium Inorganic materials 0.000 description 5
- 239000010936 titanium Substances 0.000 description 5
- 239000011787 zinc oxide Substances 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 229910052786 argon Inorganic materials 0.000 description 4
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 4
- 229910019092 Mg-O Inorganic materials 0.000 description 3
- 229910019395 Mg—O Inorganic materials 0.000 description 3
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 3
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- 238000010586 diagram Methods 0.000 description 3
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- 230000008569 process Effects 0.000 description 3
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- 239000010409 thin film Substances 0.000 description 3
- 229910052721 tungsten Inorganic materials 0.000 description 3
- 229910005535 GaOx Inorganic materials 0.000 description 2
- 229910052779 Neodymium Inorganic materials 0.000 description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
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- 239000001307 helium Substances 0.000 description 2
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- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
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- 239000012535 impurity Substances 0.000 description 2
- 229910052748 manganese Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052754 neon Inorganic materials 0.000 description 2
- GKAOGPIIYCISHV-UHFFFAOYSA-N neon atom Chemical compound [Ne] GKAOGPIIYCISHV-UHFFFAOYSA-N 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 230000000704 physical effect Effects 0.000 description 2
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- 108091006149 Electron carriers Proteins 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910004304 SiNy Inorganic materials 0.000 description 1
- 229910020923 Sn-O Inorganic materials 0.000 description 1
- AZWHFTKIBIQKCA-UHFFFAOYSA-N [Sn+2]=O.[O-2].[In+3] Chemical compound [Sn+2]=O.[O-2].[In+3] AZWHFTKIBIQKCA-UHFFFAOYSA-N 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- 239000005407 aluminoborosilicate glass Substances 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 229910052788 barium Inorganic materials 0.000 description 1
- DSAJWYNOEDNPEQ-UHFFFAOYSA-N barium atom Chemical compound [Ba] DSAJWYNOEDNPEQ-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- QZQVBEXLDFYHSR-UHFFFAOYSA-N gallium(III) oxide Inorganic materials O=[Ga]O[Ga]=O QZQVBEXLDFYHSR-UHFFFAOYSA-N 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
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- 239000007769 metal material Substances 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- QEFYFXOXNSNQGX-UHFFFAOYSA-N neodymium atom Chemical compound [Nd] QEFYFXOXNSNQGX-UHFFFAOYSA-N 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000001443 photoexcitation Effects 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 229910052706 scandium Inorganic materials 0.000 description 1
- SIXSYDAISGFNSX-UHFFFAOYSA-N scandium atom Chemical compound [Sc] SIXSYDAISGFNSX-UHFFFAOYSA-N 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- OYQCBJZGELKKPM-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O-2].[Zn+2].[O-2].[In+3] OYQCBJZGELKKPM-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
- H01L31/0264—Inorganic materials
- H01L31/032—Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
Definitions
- One of embodiments of the present invention relates to a semiconductor element such as a transistor and/or a semiconductor device at least part of which is formed using the semiconductor element.
- a semiconductor element such as a transistor and/or a semiconductor device at least part of which is formed using the semiconductor element.
- an active element including an oxide semiconductor is described as the semiconductor element, and a display device including the active element is described.
- transistors including amorphous silicon have been used for conventional display devices typified by liquid crystal televisions
- an oxide semiconductor has attracted attention as a material which replaces a silicon semiconductor in order to form transistors.
- an active matrix display device in which an amorphous oxide containing In, Ga, and Zn is used for an active layer of a transistor and the electron carrier concentration of the amorphous oxide is less than 10 18 /cm 3 (see Patent Document 1).
- An oxide semiconductor formed of a metal oxide has a band gap of about 3 eV and originally has a light-transmitting, property with respect to visible light.
- a film comprising the oxide semiconductor deteriorates when being irradiated with strong light (the deterioration is called light deterioration).
- a backlight is used in a liquid crystal display device; when a transistor including an oxide semiconductor is irradiated with light from the backlight, for example, leakage current might be generated in an off state of the transistor owing to photoexcitation, which leads to reduction in display quality, or light deterioration might be caused. Further, it is known that a single-layer oxide semiconductor film formed of a metal oxide has a photoelectric current value of about 10 ⁇ A.
- Carriers in a semiconductor can be described by continuity equations, Formula 1 and Formula 2.
- n and p represent carrier density of electrons and carrier density of holes
- J n and J p represent a current value of electrons and a current value of holes
- G n and G p represent a generation probability of electrons and a generation probability of holes
- R n and R p represent a recombination probability of electrons and a recombination probability of holes.
- the number of hole carriers is divided into the number of hole carriers p 0 in a thermal equilibrium state and the number of hole carriers ⁇ p in a non-thermal equilibrium state.
- the carrier density of holes can be expressed by Formula 3.
- Formula 5 is solved with an initial photoelectric current value at 0, which leads to a carrier concentration expressed by Formula 6.
- ⁇ ⁇ ⁇ p ⁇ ( t ) ⁇ ⁇ ⁇ p ⁇ ( t 0 ) ⁇ exp ⁇ ( - t - t 0 ⁇ p ) ⁇ ⁇ ( t ⁇ t 0 ) [ Formula ⁇ ⁇ 7 ]
- I ⁇ ( t ) ⁇ I 0 ⁇ [ 1 - exp ⁇ ( - t ⁇ p ) ] ( 0 ⁇ t ⁇ t 0 ) I 0 ⁇ [ 1 - exp ⁇ ( - t 0 ⁇ p ) ] ⁇ exp ⁇ ( - t - t 0 ⁇ p ) ( t ⁇ t 0 ) [ Formula ⁇ ⁇ 8 ]
- the relaxation time ⁇ depends on a model of carrier recombination. There are many types of recombination processes. Basically, two types of processes, direct recombination and indirect recombination (SRH recombination), can be given.
- some traps can capture a hole but cannot easily capture an electron, where recombination hardly occurs. Such a trap is called a “safe” trap in this specification.
- FIG. 6A is a schematic diagram of the “safe” trap.
- FIG. 6B is a schematic diagram showing a transition due to heat after trapping.
- an oxide semiconductor layer which exhibits two kinds of modes in photoresponse is used, whereby a transistor in which light deterioration is suppressed to the minimum and the electric characteristics are stable is achieved.
- the oxide semiconductor layer which exhibits two kinds of modes in photoresponse has a photoelectric current value of greater than or equal to 1 pA, preferably greater than or equal to 10 pA and less than or equal to 10 nA.
- a photoelectric current value after 100 seconds of light irradiation is greater than or equal to 400 aA/ ⁇ m and less than or equal to 0.1 pA/ ⁇ m at 25° C. and light deterioration can be suppressed to the minimum.
- I ⁇ ( t ) A ⁇ ⁇ ⁇ p ⁇ ( D e D h ⁇ ⁇ 2 ⁇ 1 ) ⁇ exp ⁇ ( - t ⁇ 2 ) ⁇ ⁇ ( t ⁇ ⁇ 1 ) [ Formula ⁇ ⁇ 9 ]
- PDEM photoresponse defect evaluation method
- a liquid crystal display device in which a transistor including an oxide semiconductor is provided in a pixel has high reliability with respect to light deterioration.
- FIG. 1 is a graph showing photoresponse characteristics of oxide semiconductor layers.
- FIG. 2 is a graph enlarging a region in the range of 0 sec to 100 sec in FIG. 1 .
- FIG. 3 is a graph showing photoresponse characteristics of oxide semiconductor layers with the use of a logarithmic scale.
- FIG. 4 is a graph showing photoresponse characteristics of oxide semiconductor layers with the use of a linear scale.
- FIG. 5 is a graph for showing a method for estimating ⁇ 1 with the use of data in FIG. 2 .
- FIGS. 6A and 6B are schematic diagrams of a “safe” trap.
- FIG. 7A is a top view of an electrode and FIG. 7B is a cross-sectional view illustrating the structure of a TEG.
- FIGS. 8A to 8D are cross-sectional views each illustrating the structure of a transistor.
- FIG. 9 is a graph showing the emission spectrum of a white LED.
- a TEG was manufactured with the use of an oxide semiconductor.
- the photoresponse characteristics of the oxide semiconductor before and after irradiation with light (luminance: 17000 cd/cm 2 ) for 600 seconds were measured.
- a graph of the photoresponse characteristics (a graph showing time dependence of photoelectric current) is made.
- the structure of the TEG used for evaluation is as follows: the channel length (L) is 200 ⁇ m, the channel width (W) is 2.09 cm, the thickness of a thick portion of an In—Ga—Zn—O film is 50 nm, and the thickness of a thin portion of the In—Ga—Zn—O film is 25 nm.
- the cross-sectional structure of this TEG is illustrated in FIG. 7B .
- an In—Ga—Zn—O film 102 is formed over a glass substrate 101
- a first electrode 103 and a second electrode 104 are formed over the In—Ga—Zn—O film 102 .
- FIG. 7A illustrates the top shapes of the first electrode 103 and the second electrode 104 .
- the space between the first electrode 103 and the second electrode 104 is 200 ⁇ m, and a region of the In—Ga—Zn—O film 102 which overlaps with the region between the first electrode 103 and the second electrode 104 is 25 nm, which is thinner than a region overlapping with the first electrode 103 or the second electrode 104 as illustrated in FIG. 7 B.
- an insulating layer 105 is formed over the first electrode 103 and the second electrode 104 so as to prevent the In—Ga—Zn—O film 102 from being exposed.
- a white LED (MDBL-CW100 produced by Moritex Corporation) was used as a light source for emitting light with which the In—Ga—Zn—O film 102 was irradiated.
- the emission spectrum of this white LED is shown in FIG. 9 .
- the film formation conditions of the In—Ga—Zn—O film are as follows: the film formation temperature is room temperature, the flow of argon is 10 sccm, the flow of oxygen is 5 sccm, the pressure is 0.4 Pa, and the power is 500 W.
- heat treatment is performed at 450° C. for 1 hour in a nitrogen atmosphere.
- This heat treatment is preferably performed in an atmosphere of nitrogen or a rare gas such as helium, neon, or argon in which water, hydrogen, or the like is not contained, for example, the dew point is lower than or equal to ⁇ 40° C., preferably lower than or equal to ⁇ 60° C.
- the purity of nitrogen or a rare gas such as helium, neon, or argon which is introduced into a heat treatment apparatus be set to be greater than or equal to 6N (99.9999%), preferably greater than or equal to 7N (99.99999%) (that is, the impurity concentration is less than or equal to 1 ppm, preferably less than or equal to 0.1 ppm).
- a layered conductive film is formed by stacking a titanium nitride film with a thickness of 50 nm, a titanium film with a thickness of 50 nm, an aluminum film with a thickness of 200 nm, and a titanium film with a thickness of 50 nm by a sputtering method.
- a resist mask is formed over the layered conductive film through a photolithography step, and etching is performed selectively to form the first electrode 103 and the second electrode 104 . After that, O 2 ashing is performed, whereby a part of the In—Ga—Zn—O film which is exposed is thinned to 25 nm, and then, the resist mask is removed.
- a silicon oxide film with a thickness of 300 nm is formed over the first electrode 103 and the second electrode 104 .
- a resist mask is formed over the silicon oxide film through a photolithography step, and etching is performed selectively to form the insulating layer 105 . After that, heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere.
- FIG. 1 is a graph showing the photoresponse characteristics of oxide semiconductor layers.
- the horizontal axis indicates time and the vertical axis indicates a current value.
- the light source is turned off at time 0.
- FIG. 2 is a graph enlarging a region in the range of 0 sec to 100 sec in FIG. 1 .
- Table 1 is a list showing numerical values in FIG. 1 .
- a photoelectric current value per micrometer shown in Table 1 was obtained by calculation.
- the photoelectric current value per micrometer after 100 seconds of irradiation of the oxide semiconductor layer with light at 25° C. was found to be 593 pA/ ⁇ m.
- TEGs were manufactured under conditions partly different from those of the above three samples.
- the film formation conditions of the In—Ga—Zn—O film of a fourth sample and a fifth sample are as follows: the film formation temperature is room temperature, the flow of argon is 10.5 sccm, the flow of oxygen is 4.5 sccm, and the power is 100 W. Note that other film formation conditions and the film thickness are the same as the above three samples.
- the fourth sample was subjected to heat treatment at 650° C. for 1 hour in a nitrogen atmosphere.
- the fifth sample was subjected to heat treatment at 650° C. for 1 hour in a nitrogen atmosphere and then heat treatment at 450° C. for 1 hour in an atmosphere containing oxygen and nitrogen.
- a single-layer oxide semiconductor film (OS film 1 ) formed using a metal oxide which was used as a comparative example has a photoelectric current value of about greater than or equal to 1 ⁇ A and less than or equal to 10 ⁇ A.
- a single-layer oxide semiconductor film (OS film 2 ) of this embodiment has a photoelectric current value of about greater than or equal to 10 pA and less than or equal to 10 nA.
- the rise and the fall of the photoresponse characteristics are sharp, and the current value is very small.
- a tendency similar to the above is observed.
- Fitting of ⁇ 2 can be performed using the current formula expressed by Formula 9.
- a region in the range of 20 sec to 100 sec in FIG. 2 which is a graph using a logarithmic scale was plotted with the use of a linear scale, and fitting was performed.
- FIG. 5 shows a method for estimating ⁇ 1 .
- ⁇ 1 can be regarded as substantially the same at all temperatures in consideration of the temporal resolution for measurement, ⁇ 2 does not depend on the temperature, either. This is because ⁇ 1 and ⁇ 2 depend on the trap density.
- the rate of reduction in current is small. This is because the probability of thermal excitation from the traps is higher as the temperature is higher.
- the curve showing the photoresponse characteristics has two kinds of modes because “safe” traps exist around the conduction band or the valence band.
- the channel length was varied, and the measurement was performed under the conditions shown in Table 1.
- the structures of the TEGs used for evaluation are as follows: the channel length (L) was set to 50 ⁇ m, 100 ⁇ m, and 200 ⁇ m in respective TEGs, and the channel width (W) was set to 2.09 cm.
- the measurement results are shown in Table 3. Note that the measurement temperature is 25° C.
- a photoelectric current value per micrometer was obtained by calculation and shown in Table 3. In the TEG in which the channel length (L) is 50 ⁇ m, after 100 seconds of irradiation of the oxide semiconductor layer with light, a photoelectric current value per micrometer of channel length is 97.7 fA/ ⁇ m.
- a photoelectric current value per micrometer of channel length is 42.5 fA/ ⁇ m.
- a photoelectric current value per micrometer of channel length is 13.7 fA/ ⁇ m.
- a photoelectric current value per micrometer of channel length is 413 aA/ ⁇ m.
- the oxide semiconductor layer has a photoelectric current value of greater than or equal to 400 aA/ ⁇ m and less than or equal to 0.1 pA/ ⁇ m after 100 seconds of light irradiation, which means that light deterioration is suppressed to the minimum. Therefore, a transistor whose electric characteristics are stable can be achieved by using the oxide semiconductor layer.
- Ion A) 1 sec (A) 10 sec (A) 100 sec (A) 100 sec (A) 50 3.2704E ⁇ 08 6.707E ⁇ 11 1.39891E ⁇ 11 4.88727E ⁇ 12 9.77455E ⁇ 14 100 2.19308E ⁇ 08 9.256E ⁇ 11 1.28518E ⁇ 11 4.24727E ⁇ 12 4.24727E ⁇ 14 200 7.1513E ⁇ 09 9.15E ⁇ 12 2.19636E ⁇ 12 2.73364E ⁇ 12 1.36682E ⁇ 14 500 1.7527E ⁇ 09 2.34E ⁇ 12 1.25455E ⁇ 12 2.06364E ⁇ 13 4.12727E ⁇ 16
- a TEG is shown as an example, but the present invention is not limited thereto.
- a transistor including the same oxide semiconductor light deterioration can be suppressed to the minimum and the electric characteristics can be stable.
- a liquid crystal display device in which a transistor including the same oxide semiconductor is provided in a pixel has high reliability with respect to light deterioration.
- FIGS. 8A to 8D each illustrate an example of the cross-sectional structure of a transistor.
- the transistors illustrated in FIGS. 8A to 8D each include an oxide semiconductor as a semiconductor.
- a transistor 410 illustrated in FIG. 8A is a kind of bottom-gate thin film transistor, and is also referred to as an inverted-staggered thin film transistor.
- the transistor 410 includes, over a substrate 400 having an insulating surface, a gate electrode layer 401 , a gate insulating layer 402 , an oxide semiconductor layer 403 , a source electrode layer 405 a , and a drain electrode layer 405 b . Further, an insulating layer 407 stacked over the oxide semiconductor layer 403 is provided so as to cover the transistor 410 . A protective insulating layer 409 is formed over the insulating layer 407 .
- the insulating layer 407 is in contact with the oxide semiconductor layer 403 and can be formed using a material such as GaOx (x>0), SiOx (x>0), or nitride (except for titanium nitride).
- a material such as GaOx (x>0), SiOx (x>0), or nitride (except for titanium nitride).
- GaOx when GaOx is used, the insulating layer 407 can function as a film for preventing electrification of a back channel.
- a transistor 420 illustrated in FIG. 8B has a kind of bottom-gate structure referred to as a channel-protective type (channel-stop type) and is also referred to as an inverted-staggered thin film transistor.
- the transistor 420 includes, over a substrate 400 having an insulating surface, a gate electrode layer 401 , a gate insulating layer 402 , an oxide semiconductor layer 403 , an insulating layer 427 which functions as a channel protective layer covering a channel formation region of the oxide semiconductor layer 403 , a source electrode layer 405 a , and a drain electrode layer 405 b . Further, a protective insulating layer 409 is formed so as to cover the transistor 420 .
- a transistor 430 illustrated in FIG. 8C is a bottom-gate thin film transistor and includes, over a substrate 400 which is a substrate having an insulating surface, a gate electrode layer 401 , a gate insulating layer 402 , a source electrode layer 405 a , a drain electrode layer 405 b , and an oxide semiconductor layer 403 . Further, an insulating layer 407 being in contact with the oxide semiconductor layer 403 is provided so as to cover the transistor 430 . A protective insulating layer 409 is formed over the insulating layer 407 .
- the gate insulating layer 402 is provided on and in contact with the substrate 400 and the gate electrode layer 401 , and the source electrode layer 405 a and the drain electrode layer 405 b are provided on and in contact with the gate insulating layer 402 . Further, the oxide semiconductor layer 403 is provided over the gate insulating layer 402 , the source electrode layer 405 a , and the drain electrode layer 405 b.
- a transistor 440 illustrated in FIG. 8D is a kind of top-gate thin film transistor.
- the transistor 440 includes, over a substrate 400 having an insulating surface, an insulating layer 437 , an oxide semiconductor layer 403 , a source electrode layer 405 a , a drain electrode layer 405 b , a gate insulating layer 402 , and a gate electrode layer 401 .
- a wiring layer 436 a and a wiring layer 436 b are provided in contact with and electrically connected to the source electrode layer 405 a and the drain electrode layer 405 b , respectively.
- the oxide semiconductor layer 403 is used as a semiconductor layer.
- a four-component metal oxide such as an In—Sn—Ga—Zn—O-based oxide semiconductor
- a three-component metal oxide such as an In—Ga—Zn—O-based oxide semiconductor, an In—Sn—Zn—O-based oxide semiconductor, an In—Al—Zn—O-based oxide semiconductor, a Sn—Ga—Zn—O-based oxide semiconductor, an Al—Ga—Zn—O-based oxide semiconductor, or a Sn—Al—Zn—O-based oxide semiconductor
- a two-component metal oxide such as an In—Zn—O-based oxide semiconductor, a Sn—Zn—O-based oxide semiconductor, an Al—Zn—O-based oxide semiconductor, a Zn—Mg—O-based oxide semiconductor, a Sn—Mg—O-based oxide semiconductor, an In—Ga—O-based oxide
- the In—Ga—Zn—O-based oxide semiconductor means an oxide containing at least In, Ga, and Zn, and the composition ratio of the elements is not particularly limited.
- the In—Ga—Zn—O-based oxide semiconductor may contain an element other than In, Ga, and Zn.
- oxide semiconductor layer 403 a thin film of a material represented by a chemical formula, InMO 3 (ZnO) m (m>0), can be used.
- M represents one or more metal elements selected from Ga, Al, Mn, and Co.
- M can be Ga, Ga and Al, Ga and Mn, Ga and Co, or the like.
- a target used for forming the In—Zn—O-based oxide semiconductor has a composition ratio of In:Zn:O X:Y:Z in an atomic ratio, Z>(1.5X+Y).
- the oxide semiconductor layer 403 in each of the transistors 410 , 420 , 430 , and 440 is preferably heated at a temperature of higher than or equal to 450° C. in an atmosphere which does not contain moisture and hydrogen.
- heat treatment is performed at 650° C. for 1 hour in a nitrogen atmosphere and then heat treatment is performed at 450° C. for 1 hour in an atmosphere containing nitrogen and oxygen.
- the heat treatment may be performed with the use of ultra-dry air (in which the dew point is lower than or equal to ⁇ 40° C., preferably lower than or equal to ⁇ 60° C.) as an atmosphere containing nitrogen and oxygen. With this heat treatment, light deterioration can be suppressed to the minimum, and a transistor whose electric characteristics are stable can be provided.
- the amount of current in an off state can be small. Therefore, by using the transistor including the oxide semiconductor layer 403 in a pixel portion of a liquid crystal display device, an electric signal such as image data can be held for a longer period and a writing interval can be set longer. Accordingly, frequency of refresh operation can be reduced, which leads to an effect of suppressing power consumption.
- the transistors 410 , 420 , 430 , and 440 each including the oxide semiconductor layer 403 can have relatively high field-effect mobility and thus can operate at high speed. Therefore, by using any of the above transistors in a pixel portion of a liquid crystal display device, a high-quality image can be provided. In addition, since a driver circuit portion and the pixel portion can be manufactured over one substrate with the use of the transistor including the oxide semiconductor layer 403 , the number of components of the liquid crystal display device can be reduced.
- a substrate that can be used as the substrate 400 having an insulating surface a glass substrate made of barium borosilicate glass, aluminoborosilicate glass, or the like can be used.
- an insulating film serving as a base film may be provided between the substrate and the gate electrode layer.
- the base film has a function of preventing diffusion of impurity elements from the substrate, and can be formed to have a single-layer structure or a layered structure using one or more of a silicon nitride film, a silicon oxide film, a silicon nitride oxide film, and a silicon oxynitride film.
- the gate electrode layer 401 can be formed to have a single-layer structure or a layered structure using a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, or scandium, or an alloy material which contains any of these materials as its main component.
- a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, or scandium, or an alloy material which contains any of these materials as its main component.
- the gate insulating layer 402 can be formed with a single-layer structure or a layered structure using one or more of a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, a silicon nitride oxide layer, an aluminum oxide layer, an aluminum nitride layer, an aluminum oxynitride layer, an aluminum nitride oxide layer, and a hafnium oxide layer by a plasma CVD method, a sputtering method, or the like.
- a silicon nitride layer (SiN y (y>0)) with a thickness of greater than or equal to 50 nm and less than or equal to 200 nm is formed as a first gate insulating layer, and a silicon oxide layer (SiO x (x>0)) with a thickness of greater than or equal to 5 nm and less than or equal to 300 nm is formed as a second gate insulating layer over the first gate insulating layer, so that a gate insulating layer with a total thickness of 200 nm is formed.
- a film of an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W for example, a film of an alloy containing any of these elements as its component, a film of an alloy containing any of these elements in combination, or the like can be used.
- the conductive film may have a structure in which a high-melting-point metal layer of Ti, Mo, W, or the like is stacked over and/or below a metal layer of Al, Cu, or the like.
- an Al material to which an element (e.g., Si, Nd, or Sc) which prevents generation of hillocks and whiskers in an Al film is added is used, heat resistance can be increased.
- a material similar to that for the source electrode layer 405 a and the drain electrode layer 405 b can be used for a conductive film used for the wiring layer 436 a and the wiring layer 436 b which are respectively connected to the source electrode layer 405 a and the drain electrode layer 405 b.
- the conductive film used for the source electrode layer 405 a and the drain electrode layer 405 b may be formed using a conductive metal oxide.
- a conductive metal oxide indium oxide (In 2 O 3 ), tin oxide (SnO 2 ), zinc oxide (ZnO), indium oxide-tin oxide alloy (In 2 O 3 —SnO 2 ; abbreviated to ITO), indium oxide-zinc oxide alloy (In 2 O 3 —ZnO), or any of these metal oxide materials in which silicon oxide is contained can be used.
- an inorganic insulating film typically, a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, or an aluminum oxynitride film, can be used.
- an inorganic insulating film such as a silicon nitride film, an aluminum nitride film, a silicon nitride oxide film, or an aluminum nitride oxide film can be used.
- a planarization insulating film may be formed over the protective insulating layer 409 so that surface roughness due to the transistor can be reduced.
- an organic material such as polyimide, acrylic, or benzocyclobutene can be used.
- a low-dielectric constant material a low-k material
- the planarization insulating film may be formed by stacking a plurality of insulating films formed from these materials.
- a high-performance liquid crystal display device can be provided by using the transistor including the oxide semiconductor layer.
Abstract
An oxide semiconductor layer in which “safe” traps exist exhibits two kinds of modes in photoresponse characteristics. By using the oxide semiconductor layer, a transistor in which light deterioration is suppressed to the minimum and the electric characteristics are stable can be achieved. The oxide semiconductor layer exhibiting two kinds of modes in photoresponse characteristics has a photoelectric current value of 1 pA to 10 nA inclusive. When the average time τ1 until which carriers are captured by the “safe” traps is large enough, there are two kinds of modes in photoresponse characteristics, that is, a region where the current value falls rapidly and a region where the current value falls gradually, in the result of a change in photoelectric current over time.
Description
- 1. Field of the Invention
- One of embodiments of the present invention relates to a semiconductor element such as a transistor and/or a semiconductor device at least part of which is formed using the semiconductor element. For example, an active element including an oxide semiconductor is described as the semiconductor element, and a display device including the active element is described.
- 2. Description of the Related Art
- Although transistors including amorphous silicon have been used for conventional display devices typified by liquid crystal televisions, an oxide semiconductor has attracted attention as a material which replaces a silicon semiconductor in order to form transistors. For example, an active matrix display device is disclosed, in which an amorphous oxide containing In, Ga, and Zn is used for an active layer of a transistor and the electron carrier concentration of the amorphous oxide is less than 1018/cm3 (see Patent Document 1).
- However, some problems of a transistor including an oxide semiconductor have been pointed out. One of the problems is the stability of the characteristics, and it is pointed out that the electric characteristics of the transistor are changed by irradiation with visible light and ultraviolet light.
-
- [Patent Document 1] Japanese Published Patent Application No. 2006-165528
- An oxide semiconductor formed of a metal oxide has a band gap of about 3 eV and originally has a light-transmitting, property with respect to visible light. However, it is known that a film comprising the oxide semiconductor deteriorates when being irradiated with strong light (the deterioration is called light deterioration).
- Any method for improving such a change in the characteristics caused by light in a transistor including an oxide semiconductor has not been proposed, which causes a delay in practical use of the oxide semiconductor which is expected as a new material.
- In addition, a backlight is used in a liquid crystal display device; when a transistor including an oxide semiconductor is irradiated with light from the backlight, for example, leakage current might be generated in an off state of the transistor owing to photoexcitation, which leads to reduction in display quality, or light deterioration might be caused. Further, it is known that a single-layer oxide semiconductor film formed of a metal oxide has a photoelectric current value of about 10 μA.
- It is an object of an embodiment of the present invention to provide a transistor in which light deterioration is suppressed to the minimum and the electric characteristics are stable.
- The mechanism of photoelectric current will be described below.
- Carriers in a semiconductor can be described by continuity equations, Formula 1 and Formula 2.
-
- Note that in the above two equations, t represents time, x represents a position, and q represents a charge. Here, n and p represent carrier density of electrons and carrier density of holes, Jn and Jp represent a current value of electrons and a current value of holes, Gn and Gp represent a generation probability of electrons and a generation probability of holes, and Rn and Rp represent a recombination probability of electrons and a recombination probability of holes. The number of hole carriers is divided into the number of hole carriers p0 in a thermal equilibrium state and the number of hole carriers Δp in a non-thermal equilibrium state. The carrier density of holes can be expressed by Formula 3.
-
p=p 0 +ΔP [Formula 3] - When the semiconductor is irradiated with light having an energy of greater than or equal to the band gap, electrons in the valence band are transferred to the conduction band while the semiconductor absorbs the light, whereby holes are generated. When the generation probability of holes is represented by G0p, the recombination probability is expressed by Formula 4. Here, τp represents relaxation time of holes.
-
- When a device is uniformly irradiated with light, a continuity equation represented by Formula 5 is obtained if a diffusion term in a source direction or a drain direction can be ignored.
-
- Formula 5 is solved with an initial photoelectric current value at 0, which leads to a carrier concentration expressed by Formula 6.
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- When the time at which a light source is turned off is represented by t0, the carrier concentration is expressed by Formula 7.
-
- Since the photoelectric current is in proportion to the excess carrier concentration, the current formula is expressed by Formula 8.
-
- (Io depends on constant, physical property, and structure.)
- The relaxation time τ depends on a model of carrier recombination. There are many types of recombination processes. Basically, two types of processes, direct recombination and indirect recombination (SRH recombination), can be given.
- Further, for example, some traps can capture a hole but cannot easily capture an electron, where recombination hardly occurs. Such a trap is called a “safe” trap in this specification.
-
FIG. 6A is a schematic diagram of the “safe” trap.FIG. 6B is a schematic diagram showing a transition due to heat after trapping. - Since the position of the “safe” trap is closer to the valence band than the intrinsic Fermi level and an electron is not easily captured by the “safe” trap, part of holes captured by the “safe” traps are transferred to the valence band by heat and thus contribute to electric conduction. A semiconductor in which the “safe” traps exist exhibits two kinds of modes in photoresponse.
- According to an embodiment of the present invention disclosed in this specification, an oxide semiconductor layer which exhibits two kinds of modes in photoresponse is used, whereby a transistor in which light deterioration is suppressed to the minimum and the electric characteristics are stable is achieved. Note that the oxide semiconductor layer which exhibits two kinds of modes in photoresponse has a photoelectric current value of greater than or equal to 1 pA, preferably greater than or equal to 10 pA and less than or equal to 10 nA. In addition, in the oxide semiconductor layer, a photoelectric current value after 100 seconds of light irradiation is greater than or equal to 400 aA/μm and less than or equal to 0.1 pA/μm at 25° C. and light deterioration can be suppressed to the minimum.
- When the average time τ1 until which carriers are captured by “safe” traps is large enough, there are two kinds of modes in photoresponse, that is, a region where the current value falls rapidly and a region where the current value falls gradually, in the result of a change in photoelectric current over time.
- In consideration of the “safe” trap, the current formula after τ1 (when almost all excess carriers are captured by the “safe” traps) is expressed by Formula 9. Note that τ2 represents average time during which carriers stay at the “safe” traps.
-
- A: constant depending on physical property or temperature
De,Dh: diffusion coefficient of electron and diffusion coefficient of hole
τp: relaxation time of hole in thermal equilibrium - Estimation of trap levels corresponding to τ1 and τ2 leads to evaluation of defects. Such a method for evaluation with the use of τ1 and τ2 is referred to as a photoresponse defect evaluation method (PDEM).
- A liquid crystal display device in which a transistor including an oxide semiconductor is provided in a pixel has high reliability with respect to light deterioration.
-
FIG. 1 is a graph showing photoresponse characteristics of oxide semiconductor layers. -
FIG. 2 is a graph enlarging a region in the range of 0 sec to 100 sec inFIG. 1 . -
FIG. 3 is a graph showing photoresponse characteristics of oxide semiconductor layers with the use of a logarithmic scale. -
FIG. 4 is a graph showing photoresponse characteristics of oxide semiconductor layers with the use of a linear scale. -
FIG. 5 is a graph for showing a method for estimating τ1 with the use of data inFIG. 2 . -
FIGS. 6A and 6B are schematic diagrams of a “safe” trap. -
FIG. 7A is a top view of an electrode andFIG. 7B is a cross-sectional view illustrating the structure of a TEG. -
FIGS. 8A to 8D are cross-sectional views each illustrating the structure of a transistor. -
FIG. 9 is a graph showing the emission spectrum of a white LED. - Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the description below, and it is easily understood by those skilled in the art that modes and details thereof can be modified in various ways. Therefore, the present invention is not construed as being limited to the description of the embodiments.
- In this embodiment, a TEG was manufactured with the use of an oxide semiconductor. With the use of the TEG, the photoresponse characteristics of the oxide semiconductor before and after irradiation with light (luminance: 17000 cd/cm2) for 600 seconds were measured. By using the result thereof, a graph of the photoresponse characteristics (a graph showing time dependence of photoelectric current) is made.
- The structure of the TEG used for evaluation is as follows: the channel length (L) is 200 μm, the channel width (W) is 2.09 cm, the thickness of a thick portion of an In—Ga—Zn—O film is 50 nm, and the thickness of a thin portion of the In—Ga—Zn—O film is 25 nm. The cross-sectional structure of this TEG is illustrated in
FIG. 7B . InFIG. 7B , an In—Ga—Zn—O film 102 is formed over a glass substrate 101, and a first electrode 103 and asecond electrode 104 are formed over the In—Ga—Zn—O film 102.FIG. 7A illustrates the top shapes of the first electrode 103 and thesecond electrode 104. The space between the first electrode 103 and thesecond electrode 104 is 200 μm, and a region of the In—Ga—Zn—O film 102 which overlaps with the region between the first electrode 103 and thesecond electrode 104 is 25 nm, which is thinner than a region overlapping with the first electrode 103 or thesecond electrode 104 as illustrated in FIG. 7B. In addition, an insulating layer 105 is formed over the first electrode 103 and thesecond electrode 104 so as to prevent the In—Ga—Zn—O film 102 from being exposed. - A white LED (MDBL-CW100 produced by Moritex Corporation) was used as a light source for emitting light with which the In—Ga—Zn—
O film 102 was irradiated. The emission spectrum of this white LED is shown inFIG. 9 . - In order to observe the temperature characteristics, three samples were manufactured and the temperature characteristics were measured at 25° C., 85° C., and 150° C. by using the three samples. The manufacturing process of the three samples will be described below.
- An In—Ga—Zn—O film is formed to a thickness of 50 nm by a sputtering method with the use of an oxide target having a composition ratio of In2O3:Ga2O3:ZnO=1:1:1 [molar ratio] over a glass substrate (126.6 mm×126.6 mm). The film formation conditions of the In—Ga—Zn—O film are as follows: the film formation temperature is room temperature, the flow of argon is 10 sccm, the flow of oxygen is 5 sccm, the pressure is 0.4 Pa, and the power is 500 W.
- Then, heat treatment is performed at 450° C. for 1 hour in a nitrogen atmosphere. This heat treatment is preferably performed in an atmosphere of nitrogen or a rare gas such as helium, neon, or argon in which water, hydrogen, or the like is not contained, for example, the dew point is lower than or equal to −40° C., preferably lower than or equal to −60° C. It is preferable that the purity of nitrogen or a rare gas such as helium, neon, or argon which is introduced into a heat treatment apparatus be set to be greater than or equal to 6N (99.9999%), preferably greater than or equal to 7N (99.99999%) (that is, the impurity concentration is less than or equal to 1 ppm, preferably less than or equal to 0.1 ppm).
- After the heat treatment, a layered conductive film is formed by stacking a titanium nitride film with a thickness of 50 nm, a titanium film with a thickness of 50 nm, an aluminum film with a thickness of 200 nm, and a titanium film with a thickness of 50 nm by a sputtering method.
- A resist mask is formed over the layered conductive film through a photolithography step, and etching is performed selectively to form the first electrode 103 and the
second electrode 104. After that, O2 ashing is performed, whereby a part of the In—Ga—Zn—O film which is exposed is thinned to 25 nm, and then, the resist mask is removed. - Next, by a sputtering method with the use of a silicon oxide target, a silicon oxide film with a thickness of 300 nm is formed over the first electrode 103 and the
second electrode 104. - Then, a resist mask is formed over the silicon oxide film through a photolithography step, and etching is performed selectively to form the insulating layer 105. After that, heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere.
- Finally, the glass substrate is divided into a plurality of pieces such that one TEG is placed in each piece having an area of 10 mm×10 mm. After irradiation with white light having a luminance of 17000 cd/cm2 for 600 seconds, measurement was performed by setting the time right after the light source is turned off to 0.
FIG. 1 is a graph showing the photoresponse characteristics of oxide semiconductor layers. InFIG. 1 , the horizontal axis indicates time and the vertical axis indicates a current value. The light source is turned off attime 0.FIG. 2 is a graph enlarging a region in the range of 0 sec to 100 sec inFIG. 1 . - Table 1 is a list showing numerical values in
FIG. 1 . A photoelectric current value per micrometer shown in Table 1 was obtained by calculation. The photoelectric current value per micrometer after 100 seconds of irradiation of the oxide semiconductor layer with light at 25° C. was found to be 593 pA/μm. -
TABLE 1 Ioff per Measurement 0 sec 10 sec 100 sec 500 sec 1000 sec micrometer after Temperature (A) (A) (A) (A) (A) 100 sec (A) 25° C. 3.27E−10 3.33E−11 1.19E−11 6.31E−12 5.51E−12 5.93E−14 85° C. 4.14E−10 7.84E−11 4.4E−11 2.56E−11 2.123E−11 2.202E−13 150° C. 7.86E−10 1.95E−10 8.84E−11 3.61E−11 2.027E−11 4.422E−13 - Other TEGs were manufactured under conditions partly different from those of the above three samples. The film formation conditions of the In—Ga—Zn—O film of a fourth sample and a fifth sample are as follows: the film formation temperature is room temperature, the flow of argon is 10.5 sccm, the flow of oxygen is 4.5 sccm, and the power is 100 W. Note that other film formation conditions and the film thickness are the same as the above three samples.
- The fourth sample was subjected to heat treatment at 650° C. for 1 hour in a nitrogen atmosphere. The fifth sample was subjected to heat treatment at 650° C. for 1 hour in a nitrogen atmosphere and then heat treatment at 450° C. for 1 hour in an atmosphere containing oxygen and nitrogen.
- The steps after the heat treatment are performed in the same manner as the above three samples, so that the TEGs were manufactured.
- After irradiation with white light having a luminance of 17000 cd/cm2 for 600 seconds, the photoresponse characteristics after the light source was turned off were measured. The result of measuring the photoresponse characteristics of the fourth sample is expressed by “
OS film 1”, and the result of measuring the photoresponse characteristics of the fifth sample is expressed by “OS film 2”, which are shown inFIG. 3 with the use of a logarithmic scale. In addition, after irradiation with white light having a luminance of 17000 cd/cm2 for 600 seconds, the light source was turned off and time right after the light source was turned off was set to 0. The result of measuring the photoresponse characteristics under this condition is shown inFIG. 4 with the use of a linear scale. According toFIG. 3 andFIG. 4 , a single-layer oxide semiconductor film (OS film 1) formed using a metal oxide which was used as a comparative example has a photoelectric current value of about greater than or equal to 1 μA and less than or equal to 10 μA. On the other hand, a single-layer oxide semiconductor film (OS film 2) of this embodiment has a photoelectric current value of about greater than or equal to 10 pA and less than or equal to 10 nA. In the case of the single-layer oxide semiconductor film (OS film 2) of this embodiment, the rise and the fall of the photoresponse characteristics are sharp, and the current value is very small. Also in the case of using light having a wavelength of 350 nm, which is considered to have an energy that is greater than or equal to the band gap, a tendency similar to the above is observed. - Fitting of τ2 can be performed using the current formula expressed by Formula 9. A region in the range of 20 sec to 100 sec in
FIG. 2 which is a graph using a logarithmic scale was plotted with the use of a linear scale, and fitting was performed.FIG. 5 shows a method for estimating τ1. - Since the temporal resolution is 1 [sec], sharpness around time 0 [sec] right after the light source is turned off cannot be correctly measured, and τ1 might be estimated to be larger than the real value. Table 2 shows τ1 and τ2 at following temperatures.
-
25° C. 85° C. 150° C. τ1 [sec] 2.3 1.6 1.5 τ2 [sec] 350 480 340 - Since τ1 can be regarded as substantially the same at all temperatures in consideration of the temporal resolution for measurement, τ2 does not depend on the temperature, either. This is because τ1 and τ2 depend on the trap density. On the other hand, according to
FIG. 2 , as the temperature is higher, the rate of reduction in current is small. This is because the probability of thermal excitation from the traps is higher as the temperature is higher. - The curve showing the photoresponse characteristics has two kinds of modes because “safe” traps exist around the conduction band or the valence band. When fitting is performed to obtain the rapid relaxation time τ1 and the gradual relaxation time τ2, it is found that these two kinds of relaxation time (τ1 and τ2) less depend on the temperature but depend on the trap density, and it can be said from the temperature dependence of reduction in current that the traps exist at very shallow levels.
- The channel length was varied, and the measurement was performed under the conditions shown in Table 1. The structures of the TEGs used for evaluation are as follows: the channel length (L) was set to 50 μm, 100 μm, and 200 μm in respective TEGs, and the channel width (W) was set to 2.09 cm. The measurement results are shown in Table 3. Note that the measurement temperature is 25° C. A photoelectric current value per micrometer was obtained by calculation and shown in Table 3. In the TEG in which the channel length (L) is 50 μm, after 100 seconds of irradiation of the oxide semiconductor layer with light, a photoelectric current value per micrometer of channel length is 97.7 fA/μm. In the TEG in which the channel length (L) is 100 μm, after 100 seconds of irradiation of the oxide semiconductor layer with light, a photoelectric current value per micrometer of channel length is 42.5 fA/μm. In the TEG in which the channel length (L) is 200 μm, after 100 seconds of irradiation of the oxide semiconductor layer with light, a photoelectric current value per micrometer of channel length is 13.7 fA/μm. In the TEG in which the channel length (L) is 500 μm, after 100 seconds of irradiation of the oxide semiconductor layer with light, a photoelectric current value per micrometer of channel length is 413 aA/μm. As described above, at 25° C., the oxide semiconductor layer has a photoelectric current value of greater than or equal to 400 aA/μm and less than or equal to 0.1 pA/μm after 100 seconds of light irradiation, which means that light deterioration is suppressed to the minimum. Therefore, a transistor whose electric characteristics are stable can be achieved by using the oxide semiconductor layer.
-
TABLE 3 Ioff per Ioff after Ioff after Ioff after micrometer after L (μm) Ion (A) 1 sec (A) 10 sec (A) 100 sec (A) 100 sec (A) 50 3.2704E−08 6.707E−11 1.39891E−11 4.88727E−12 9.77455E−14 100 2.19308E−08 9.256E−11 1.28518E−11 4.24727E−12 4.24727E−14 200 7.1513E−09 9.15E−12 2.19636E−12 2.73364E−12 1.36682E−14 500 1.7527E−09 2.34E−12 1.25455E−12 2.06364E−13 4.12727E−16 - In this embodiment, a TEG is shown as an example, but the present invention is not limited thereto. For example, in a transistor including the same oxide semiconductor, light deterioration can be suppressed to the minimum and the electric characteristics can be stable. In addition, a liquid crystal display device in which a transistor including the same oxide semiconductor is provided in a pixel has high reliability with respect to light deterioration.
- In this embodiment, an example of a transistor that can be applied to a liquid crystal display device disclosed in this specification will be described. There is no particular limitation on the structure of a transistor which can be applied to a liquid crystal display device disclosed in this specification. For example, a staggered type and a planar type of a top-gate structure or a bottom-gate structure can be used. Further, the transistor may have a single gate structure including one channel formation region, a double gate structure including two channel formation regions, or a triple gate structure including three channel formation regions. Alternatively, the transistor may have a dual gate structure including two gate electrode layers positioned over and below a channel region with a gate insulating layer provided therebetween.
FIGS. 8A to 8D each illustrate an example of the cross-sectional structure of a transistor. The transistors illustrated inFIGS. 8A to 8D each include an oxide semiconductor as a semiconductor. An advantage of using an oxide semiconductor is that high mobility and low off-state current can be obtained through a relatively easy and low-temperature process. - A
transistor 410 illustrated inFIG. 8A is a kind of bottom-gate thin film transistor, and is also referred to as an inverted-staggered thin film transistor. - The
transistor 410 includes, over asubstrate 400 having an insulating surface, agate electrode layer 401, agate insulating layer 402, anoxide semiconductor layer 403, asource electrode layer 405 a, and adrain electrode layer 405 b. Further, an insulatinglayer 407 stacked over theoxide semiconductor layer 403 is provided so as to cover thetransistor 410. A protective insulatinglayer 409 is formed over the insulatinglayer 407. - The insulating
layer 407 is in contact with theoxide semiconductor layer 403 and can be formed using a material such as GaOx (x>0), SiOx (x>0), or nitride (except for titanium nitride). In particular, when GaOx is used, the insulatinglayer 407 can function as a film for preventing electrification of a back channel. - A
transistor 420 illustrated inFIG. 8B has a kind of bottom-gate structure referred to as a channel-protective type (channel-stop type) and is also referred to as an inverted-staggered thin film transistor. - The
transistor 420 includes, over asubstrate 400 having an insulating surface, agate electrode layer 401, agate insulating layer 402, anoxide semiconductor layer 403, an insulatinglayer 427 which functions as a channel protective layer covering a channel formation region of theoxide semiconductor layer 403, asource electrode layer 405 a, and adrain electrode layer 405 b. Further, a protectiveinsulating layer 409 is formed so as to cover thetransistor 420. - A
transistor 430 illustrated inFIG. 8C is a bottom-gate thin film transistor and includes, over asubstrate 400 which is a substrate having an insulating surface, agate electrode layer 401, agate insulating layer 402, asource electrode layer 405 a, adrain electrode layer 405 b, and anoxide semiconductor layer 403. Further, an insulatinglayer 407 being in contact with theoxide semiconductor layer 403 is provided so as to cover thetransistor 430. A protective insulatinglayer 409 is formed over the insulatinglayer 407. - In the
transistor 430, thegate insulating layer 402 is provided on and in contact with thesubstrate 400 and thegate electrode layer 401, and thesource electrode layer 405 a and thedrain electrode layer 405 b are provided on and in contact with thegate insulating layer 402. Further, theoxide semiconductor layer 403 is provided over thegate insulating layer 402, thesource electrode layer 405 a, and thedrain electrode layer 405 b. - A
transistor 440 illustrated inFIG. 8D is a kind of top-gate thin film transistor. Thetransistor 440 includes, over asubstrate 400 having an insulating surface, an insulatinglayer 437, anoxide semiconductor layer 403, asource electrode layer 405 a, adrain electrode layer 405 b, agate insulating layer 402, and agate electrode layer 401. Awiring layer 436 a and awiring layer 436 b are provided in contact with and electrically connected to thesource electrode layer 405 a and thedrain electrode layer 405 b, respectively. - In this embodiment, as described above, the
oxide semiconductor layer 403 is used as a semiconductor layer. As an oxide semiconductor used for theoxide semiconductor layer 403, a four-component metal oxide such as an In—Sn—Ga—Zn—O-based oxide semiconductor; a three-component metal oxide such as an In—Ga—Zn—O-based oxide semiconductor, an In—Sn—Zn—O-based oxide semiconductor, an In—Al—Zn—O-based oxide semiconductor, a Sn—Ga—Zn—O-based oxide semiconductor, an Al—Ga—Zn—O-based oxide semiconductor, or a Sn—Al—Zn—O-based oxide semiconductor; a two-component metal oxide such as an In—Zn—O-based oxide semiconductor, a Sn—Zn—O-based oxide semiconductor, an Al—Zn—O-based oxide semiconductor, a Zn—Mg—O-based oxide semiconductor, a Sn—Mg—O-based oxide semiconductor, an In—Ga—O-based oxide semiconductor, or an In—Mg—O-based oxide semiconductor; or an In—O-based oxide semiconductor layer, a Sn—O-based oxide semiconductor, or a Zn—O-based oxide semiconductor, or the like can be used. Further, SiO2 may be contained in the above oxide semiconductor. Here, for example, the In—Ga—Zn—O-based oxide semiconductor means an oxide containing at least In, Ga, and Zn, and the composition ratio of the elements is not particularly limited. The In—Ga—Zn—O-based oxide semiconductor may contain an element other than In, Ga, and Zn. - In addition, as the
oxide semiconductor layer 403, a thin film of a material represented by a chemical formula, InMO3(ZnO)m (m>0), can be used. Here, M represents one or more metal elements selected from Ga, Al, Mn, and Co. For example, M can be Ga, Ga and Al, Ga and Mn, Ga and Co, or the like. - In the case where an In—Zn—O-based material is used as the oxide semiconductor, a target to be used has a composition ratio of In:Zn=50:1 to 1:2 in an atomic ratio (In2O3:ZnO=25:1 to 1:4 in a molar ratio), preferably In:Zn=20:1 to 1:1 in an atomic ratio (In2O3:ZnO=10:1 to 1:2 in a molar ratio), more preferably In:Zn=15:1 to 1.5:1 in an atomic ratio (In2O3:ZnO=15:2 to 3:4 in a molar ratio). For example, when a target used for forming the In—Zn—O-based oxide semiconductor has a composition ratio of In:Zn:O X:Y:Z in an atomic ratio, Z>(1.5X+Y).
- The
oxide semiconductor layer 403 in each of thetransistors - In the
transistors oxide semiconductor layer 403, the amount of current in an off state (off-state current) can be small. Therefore, by using the transistor including theoxide semiconductor layer 403 in a pixel portion of a liquid crystal display device, an electric signal such as image data can be held for a longer period and a writing interval can be set longer. Accordingly, frequency of refresh operation can be reduced, which leads to an effect of suppressing power consumption. - In addition, the
transistors oxide semiconductor layer 403 can have relatively high field-effect mobility and thus can operate at high speed. Therefore, by using any of the above transistors in a pixel portion of a liquid crystal display device, a high-quality image can be provided. In addition, since a driver circuit portion and the pixel portion can be manufactured over one substrate with the use of the transistor including theoxide semiconductor layer 403, the number of components of the liquid crystal display device can be reduced. - Although there is no particular limitation on a substrate that can be used as the
substrate 400 having an insulating surface, a glass substrate made of barium borosilicate glass, aluminoborosilicate glass, or the like can be used. - In the
bottom-gate transistors - The
gate electrode layer 401 can be formed to have a single-layer structure or a layered structure using a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, or scandium, or an alloy material which contains any of these materials as its main component. - The
gate insulating layer 402 can be formed with a single-layer structure or a layered structure using one or more of a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, a silicon nitride oxide layer, an aluminum oxide layer, an aluminum nitride layer, an aluminum oxynitride layer, an aluminum nitride oxide layer, and a hafnium oxide layer by a plasma CVD method, a sputtering method, or the like. For example, by a plasma CVD method, a silicon nitride layer (SiNy (y>0)) with a thickness of greater than or equal to 50 nm and less than or equal to 200 nm is formed as a first gate insulating layer, and a silicon oxide layer (SiOx (x>0)) with a thickness of greater than or equal to 5 nm and less than or equal to 300 nm is formed as a second gate insulating layer over the first gate insulating layer, so that a gate insulating layer with a total thickness of 200 nm is formed. - As a conductive film used for the
source electrode layer 405 a and thedrain electrode layer 405 b, for example, a film of an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, a film of an alloy containing any of these elements as its component, a film of an alloy containing any of these elements in combination, or the like can be used. The conductive film may have a structure in which a high-melting-point metal layer of Ti, Mo, W, or the like is stacked over and/or below a metal layer of Al, Cu, or the like. When an Al material to which an element (e.g., Si, Nd, or Sc) which prevents generation of hillocks and whiskers in an Al film is added is used, heat resistance can be increased. - A material similar to that for the
source electrode layer 405 a and thedrain electrode layer 405 b can be used for a conductive film used for thewiring layer 436 a and thewiring layer 436 b which are respectively connected to thesource electrode layer 405 a and thedrain electrode layer 405 b. - Alternatively, the conductive film used for the
source electrode layer 405 a and thedrain electrode layer 405 b (including a wiring layer formed using the same layer as thesource electrode layer 405 a and thedrain electrode layer 405 b) may be formed using a conductive metal oxide. As the conductive metal oxide, indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO), indium oxide-tin oxide alloy (In2O3—SnO2; abbreviated to ITO), indium oxide-zinc oxide alloy (In2O3—ZnO), or any of these metal oxide materials in which silicon oxide is contained can be used. - As the insulating
layers - For the protective insulating
layer 409, an inorganic insulating film such as a silicon nitride film, an aluminum nitride film, a silicon nitride oxide film, or an aluminum nitride oxide film can be used. - Further, a planarization insulating film may be formed over the protective insulating
layer 409 so that surface roughness due to the transistor can be reduced. For the planarization insulating film, an organic material such as polyimide, acrylic, or benzocyclobutene can be used. Other than such organic materials, it is also possible to use a low-dielectric constant material (a low-k material) or the like. Alternatively, the planarization insulating film may be formed by stacking a plurality of insulating films formed from these materials. - As described above, in this embodiment, a high-performance liquid crystal display device can be provided by using the transistor including the oxide semiconductor layer.
- This application is based on Japanese Patent Application serial no. 2010-064751 filed with Japan Patent Office on Mar. 19, 2010, the entire contents of which are hereby incorporated by reference.
Claims (12)
1. A semiconductor device, comprising:
an oxide semiconductor layer at least a part of which overlaps with a gate electrode with a gate insulating layer provided therebetween,
wherein the oxide semiconductor layer has a channel formation region, and
wherein photoresponse characteristics of the channel formation region of the oxide semiconductor layer have two kinds of modes after light irradiation is performed and a light source is turned off.
2. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer has a photoelectric current value of greater than or equal to 1 pA and less than or equal to 10 nA.
3. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises at least one of In, Zn, and Ga.
4. The semiconductor device according to claim 1 , wherein a photoelectric current value of the oxide semiconductor layer after 100 seconds of light irradiation is greater than or equal to 400 aA/μm and less than or equal to 0.1 pA/μm.
5. The semiconductor device according to claim 1 , wherein the two kinds of modes comprise a region where a photoelectric current value of the oxide semiconductor layer falls rapidly and a region where the photoelectric current value falls gradually, in a result of a change in photoelectric current over time.
6. A semiconductor device comprising:
a pixel porting including a transistor,
wherein a channel formation region of the transistor is formed in an oxide semiconductor layer whose photoresponse characteristics have two kinds of modes after light irradiation is performed and a light source is turned off.
7. The semiconductor device according to claim 6 , wherein the oxide semiconductor layer has a photoelectric current value of greater than or equal to 1 pA and less than of equal to 10 nA.
8. The semiconductor device according to claim 6 , wherein the oxide semiconductor layer comprises at least one of In, Zn, and Ga.
9. The semiconductor device according to claim 6 , wherein a photoelectric current value of the oxide semiconductor layer after 100 seconds of light irradiation is greater than or equal to 400 aA/μm and less than or equal to 0.1 pA/μm.
10. The semiconductor device according to claim 6 , wherein the two kinds of modes comprise a region where a photoelectric current value of the oxide semiconductor layer falls rapidly and a region where the photoelectric current value falls gradually, in a result of a change in photoelectric current over time.
11. A semiconductor device, comprising:
an oxide semiconductor layer at least a part of which overlaps with a gate electrode with a gate insulating layer provided therebetween,
wherein the oxide semiconductor layer has a channel formation region, and
wherein photoresponse characteristics of the channel formation region of the oxide semiconductor layer have at least a first mode and a second mode after light irradiation is performed and a light source is turned off.
12. The semiconductor device according to claim 11 , wherein the first mode is a region where a photoelectric current value of the oxide semiconductor layer falls rapidly and the second mode is a region where the photoelectric current value of the oxide semiconductor layer falls gradually, in a result of a change in photoelectric current over time.
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JP2015144321A (en) | 2015-08-06 |
JP2011216880A (en) | 2011-10-27 |
US9601633B2 (en) | 2017-03-21 |
JP5927322B2 (en) | 2016-06-01 |
US20140319519A1 (en) | 2014-10-30 |
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