US20130059448A1 - Pulsed Plasma Chamber in Dual Chamber Configuration - Google Patents

Pulsed Plasma Chamber in Dual Chamber Configuration Download PDF

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Publication number
US20130059448A1
US20130059448A1 US13/227,404 US201113227404A US2013059448A1 US 20130059448 A1 US20130059448 A1 US 20130059448A1 US 201113227404 A US201113227404 A US 201113227404A US 2013059448 A1 US2013059448 A1 US 2013059448A1
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Prior art keywords
chamber
plasma
power source
period
recited
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US13/227,404
Inventor
Alexei Marakhtanov
Rajinder Dhindsa
Eric Hudson
Andrew D. Bailey, III
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Lam Research Corp
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Lam Research Corp
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Priority to US13/227,404 priority Critical patent/US20130059448A1/en
Assigned to LAM RESEARCH CORPORATION reassignment LAM RESEARCH CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: BAILEY, ANDREW D, III, DHINDSA, RAJINDER, HUDSON, ERIC, MARAKHTANOV, ALEXEI
Priority to PCT/US2012/051460 priority patent/WO2013036371A2/en
Priority to CN201280043579.9A priority patent/CN103890916B/en
Priority to JP2014529751A priority patent/JP6382719B2/en
Priority to KR1020147006299A priority patent/KR101983866B1/en
Priority to SG10201602732TA priority patent/SG10201602732TA/en
Priority to CN201610643245.5A priority patent/CN106128931B/en
Priority to SG11201400364RA priority patent/SG11201400364RA/en
Priority to TW101132728A priority patent/TWI562232B/en
Priority to TW105129203A priority patent/TWI608544B/en
Publication of US20130059448A1 publication Critical patent/US20130059448A1/en
Priority to US15/011,112 priority patent/US10553399B2/en
Priority to US15/237,521 priority patent/US20160358784A1/en
Priority to JP2017198963A priority patent/JP6441434B2/en
Priority to JP2018217816A priority patent/JP6671446B2/en
Priority to US16/832,907 priority patent/US11670486B2/en
Priority to US18/330,262 priority patent/US20230317412A1/en
Abandoned legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32137Radio frequency generated discharge controlling of the discharge by modulation of energy
    • H01J37/32146Amplitude modulation, includes pulsing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32091Radio frequency generated discharge the radio frequency energy being capacitively coupled to the plasma
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32357Generation remote from the workpiece, e.g. down-stream
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32798Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
    • H01J37/32816Pressure
    • H01J37/32825Working under atmospheric pressure or higher
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32Processing objects by plasma generation
    • H01J2237/33Processing objects by plasma generation characterised by the type of processing
    • H01J2237/334Etching
    • H01J2237/3341Reactive etching

Definitions

  • the present invention relates to methods, systems, and computer programs for dielectric etching of a semiconductor device, and more particularly, methods, systems, and computer programs for dielectric etching of a semiconductor device in a dual-module capacitively-coupled plasma (CCP) chamber.
  • CCP capacitively-coupled plasma
  • the manufacturing of integrated circuits includes immersing silicon substrates (wafers) containing regions of doped silicon into chemically-reactive plasmas, where the submicron device features (e.g., transistors, capacitors, etc.) are etched onto the surface.
  • the submicron device features e.g., transistors, capacitors, etc.
  • the first layer is manufactured, several insulating (dielectric) layers are built on top of the first layer, where holes, also referred to as vias, and trenches are etched into the material for placement of the conducting interconnectors.
  • SiO 2 is a common dielectric used in semiconductor manufacturing.
  • the plasmas used for SiO 2 etching often include fluorocarbon gases such as carbon tetrafluoride CF 4 and octafluorocyclobutane (C—C4F 8 ), along with argon (Ar) and oxygen (O 2 ) gases.
  • the word plasma is used to refer to those gases in which the constituent atoms and molecules have been partially or wholly ionized.
  • Capacitive radio frequency (RF) power coupling is often used for striking and sustaining the plasma because of the low dissociation rates obtained, favoring larger passivating molecules and high ion energies at the surface.
  • RF radio frequency
  • Some semiconductor processing equipment uses pulsed RF power sources.
  • the current pulsed RF plasma technology does not provide control of the afterglow plasma during the RF OFF period when the plasma shuts off.
  • the plasma potential collapses and electrons escape to the walls of the chamber.
  • the electron density drops and the negative ion density increases.
  • the charged species dynamics determines the distribution of charges inside the chamber and, therefore, its etching properties, but unfortunately these dynamics and fluxes of charged species are mostly uncontrolled.
  • the only controls available for the afterglow period are the frequency of the modulation and the duty cycle.
  • Another problem with pulsed plasma technology is plasma re-ignition when the RF power turns on. If the plasma and the afterglow are extinguished completely during the RF OFF period, re-striking the plasma requires high RF voltage levels. Further, there can be trouble with RF issues, especially when operating at low gas pressures.
  • Embodiments of the present invention provide systems, methods, and computer programs for processing a semiconductor substrate in a pulsed plasma chamber in a dual chamber configuration.
  • a wafer processing apparatus with a top chamber and a bottom chamber separated by a plate that fluidly connects the top chamber to the bottom chamber includes a continuous wave (CW) controller, a pulse controller, and a system controller.
  • the CW controller is operable to set the voltage and the frequency for a first radio frequency (RF) power source coupled to a top electrode in the top chamber.
  • the pulse controller is operable to set voltage, frequency, ON-period duration, and OFF-period duration for a pulsed RF signal generated by a second RF power source coupled to the bottom electrode in the bottom chamber.
  • the system controller is operable to set parameters for the CW controller and the pulse controller to regulate the flow of species from the top chamber to the bottom chamber through the plate during operation of the chamber. The flow of species assists in the negative ion density control during afterglow in the OFF period, and assists in the re-striking of the plasma in the bottom chamber during the ON period.
  • a method for processing a wafer in a wafer processing apparatus with a top chamber and a bottom chamber separated by a plate that fluidly connects the top chamber to the bottom chamber, includes an operation for setting first parameters for a continuous radio frequency (RF) signal generated by a first RF power source coupled to a top electrode in the top chamber.
  • the first parameters include a first voltage and a first frequency.
  • the method includes an operation for setting second parameters for a pulsed RF signal generated by a second RF power source coupled to a bottom electrode in the bottom chamber.
  • the second parameters include a second voltage, a second frequency, ON-period duration, and OFF-period duration.
  • the continuous RF signal is applied to the top electrode, and the pulsed RF signal is applied to the bottom electrode.
  • Setting the first parameters and the second parameters regulates the flow of species from the top chamber to the bottom chamber during operation of the chamber.
  • the flow of species assists in a negative ion density control during afterglow in the OFF period, and assists in re-striking a plasma in the bottom chamber during the ON period.
  • a wafer processing apparatus with a top chamber and a bottom chamber separated by a plate that fluidly connects the top chamber to the bottom chamber, comprises a CW controller, a pulse controller, and a system controller.
  • the CW controller is operable to set first parameters for a first radio frequency (RF) power source coupled to a top electrode in the top chamber
  • the pulse controller is operable to set second parameters for a second pulsed RF signal generated by a second RF power source coupled to a bottom electrode in the bottom chamber.
  • the pulse controller is further operable to set third parameters for a third pulsed RF signal generated by a third RF power source coupled to the bottom electrode.
  • RF radio frequency
  • system controller is operable to transfer the first, second, and third parameters to regulate a flow of species from the top chamber to the bottom chamber through the plate during operation of the chamber.
  • the flow of species assists in the negative ion density control during afterglow in the OFF period, and assists in re-striking the plasma in the bottom chamber during the ON period.
  • FIG. 1 shows an etching chamber, according to one embodiment.
  • FIG. 2 illustrates the behavior of a pulsed plasma chamber, according to one embodiment.
  • FIG. 3 illustrates the effect of RF power frequency and chamber pressure on the plasma density, according to one embodiment.
  • FIG. 4 shows a semiconductor wafer processing apparatus with two chambers, according to one embodiment of the invention.
  • FIG. 5 shows a semiconductor wafer processing apparatus, in accordance with one embodiment of the present invention.
  • FIG. 6 shows the chamber of FIG. 5 with an upper plasma and a lower plasma, in accordance with one embodiment of the present invention.
  • FIG. 7 illustrates the normalized ion flux as a function of the plate thickness, according to one embodiment.
  • FIG. 8 shows the flow of an algorithm for operating a semiconductor wafer processing apparatus, in accordance with one embodiment of the invention.
  • FIG. 9 shows the flow of an algorithm for processing a wafer, in accordance with one embodiment of the invention.
  • FIG. 10 is a simplified schematic diagram of a computer system for implementing embodiments of the present invention.
  • FIG. 1 shows an etching chamber, according to one embodiment. Exciting an electric field between two electrodes is one of the methods to obtain RF gas discharge in an etching chamber. When an oscillating voltage is applied between the electrodes, the discharge obtained is referred to as a capacitive coupled plasma (CCP) discharge.
  • CCP capacitive coupled plasma
  • Plasma can be created utilizing stable feedstock gases to obtain a wide variety of chemically reactive by-products created by the dissociation of the various molecules caused by electron-neutral collisions.
  • the chemical aspect of etching involves the reaction of the neutral gas molecules and their dissociated by-products with the molecules of the to-be-etched surface, and producing volatile molecules, which can be pumped away.
  • the positive ions are accelerated from the plasma across a space-charge sheath separating the plasma from the walls, to strike the wafer surface with enough energy to remove material from the surface of the wafer. This is known as ion bombardment or ion sputtering.
  • Some industrial plasmas do not produce ions with enough energy to efficiently etch a surface by purely physical means. It has been proven that that the combined actions of both neutral-gas etching and ion bombardment produces a faster etch rate than simply adding the effects of each method.
  • Fluorocarbon gases such as CF 4 and C—C 4 F 8 , are used in the dielectric etch process for their anisotropic and selective etching capabilities, but the principles of the invention can be applied to other plasma-creating gases.
  • the Fluorocarbon gases are readily dissociated into smaller molecular and atomic radicals. These chemically reactive by-products etch away the dielectric material, which in one embodiment can be SiO 2 or SiOCH for low-k devices.
  • the chamber of FIG. 1 includes a top electrode 104 connected to ground, and a bottom electrode 108 powered by low-frequency RF generator 118 and high-frequency RF generator 116 .
  • the bottom electrode 108 is connected, via matching network 114 , to the low-frequency RF generator 118 and to the high-frequency RF generator 116 .
  • low-frequency RF generator 118 has an RF frequency of 2 MHz
  • high-frequency RF generator 116 has an RF frequency of 27 MHz.
  • the chamber of FIG. 1 includes a gas showerhead on the top electrode 104 to input gas in the chamber, and a perforated confinement ring 112 that allows the gas to be pumped out of the chamber.
  • silicon focus ring 110 is situated next to the substrate such that there is a uniform RF field at the bottom surface of the plasma 102 for uniform etching on the surface of the wafer.
  • low-frequency RF generator 118 is pulsing while high-frequency RF generator 116 is not pulsing. In another embodiment, both RF generators are pulsing, and, in yet another embodiment, the high-frequency RF generator 116 is pulsing while low-frequency RF generator 118 is not pulsing, i.e., low-frequency RF generator 118 is always turned on while processing the wafer.
  • FIG. 2 illustrates the behavior of a pulsed plasma chamber, according to one embodiment.
  • the pulsed plasma chamber associated with FIG. 1 includes one pulsing RF power source.
  • Graph 202 illustrates the voltage of the RF power source, that includes an ON period, when the RF power source is turned on, and an OFF period, when the RF power source is turned off.
  • the graph 204 illustrates that the power of the RF power source has two levels, one level during the ON period, which is greater than zero, and a second level during the OFF period, which is equal to 0, i.e., the RF power is turned off.
  • the ON period has two phases: a first phase when the plasma is being ignited (i.e., turned on), and a second phase corresponding to a steady-state when the plasma is present in the chamber.
  • the turn-on phase the plasma sheaths are forming and changing as the plasma ignites. There is a larger electron average energy, and a low ion flux density.
  • the power is not well matched in the turn-on phase due to the varying plasma impedance while igniting the plasma.
  • the electron density is nearly constant, and there is a large positive ion flux density.
  • the power is well matched with an almost constant plasma impedance, and the plasma sheets oscillate in steady fashion.
  • the OFF period has two phases: a first phase when the plasma is being turned off, and a second phase named “late afterglow.”
  • a first phase when the plasma is being turned off In the turn-off phase, there is a rapidly decreasing electron average energy, a rapidly falling ion flux density, and a decreasing plasma potential.
  • the plasma sheaths disintegrate as the electron density decay.
  • the power level In the late-afterglow phase, the power level is zero with a small electron average energy. There is also a small ion flux density, and the negative ions can reach the surfaces of the chamber.
  • the plasma sheaths disintegrate as the electron density decays.
  • Graph 206 shows the electron energy changing during the ON and OFF periods. In the ON period, the electron energy is high, and in the OFF period, the electron energy decreases to zero.
  • Graph 208 shows the density of electrons 220 , and the positive ion density 222 .
  • the positive ion density 222 is high during the ON period, and decreases in the OFF period. Therefore, etching with positive ions takes place mainly during the ON period.
  • Graph 210 shows the evolution of the plasma potential over time. As discussed above, the plasma potential spikes at the beginning of the turn on phase and then reaches a stable value. In the turned off phase, the plasma potential decays until the plasma potential reaches a value of zero. Graph 212 shows the value of the positive ion flux, which is almost constant during the ON period, and quickly decays to 0 in the OFF period.
  • graph 214 shows the value of the negative ion flux over time.
  • the negative ion flux is substantially 0 during the ON period, but the negative ion flux has a positive spike in the OFF period, which causes etching in the wafer with negative ions and neutralizing excessive positive charge on the wafer surface during the OFF period.
  • Pulsing the RF power source helps etching performance because trenching, notching and charging damages can be reduced, when compared to a non-pulsing RF power source.
  • Charges can build up between the top and the bottom of a well during continues discharge, which can cause the deflection of ions.
  • the charge buildup can be reduced in pulsed discharges because the low electron density in the afterglow regime allows more negative ions and electrons to be pulled to the well bottom, to neutralize the positive charges that might have accumulated at the bottom of the well.
  • FIG. 3 illustrates the effect of RF power frequency and chamber pressure on the plasma density, according to one embodiment.
  • FIG. 3 illustrates some measurements taken on a non-pulsing plasma chamber under different conditions of RF power frequency and pressure in the chamber. The measurements were taken with a single RF power source at 400 W, in a chamber with oxygen and 5% Argon.
  • Line 302 charts the values for the positive ion flux at different levels of pressure and with an RF frequency of 2 MHz.
  • the negative ion flux increases to about a maximum positive ion flux at about 300 mTorr. Therefore, for a low RF frequency (2 MHz), the chamber is more efficient at high pressure.
  • Line 306 charts the volumes when the RF frequency is 27 MHz. In this case, the flux gradually increases until the pressure is about 100 mTorr, and then remains substantially constant.
  • Line 304 charts the values for the flux when using an RF frequency of 60 MHz. At this high frequency, the chamber is more efficient at low pressure, and less efficient as the pressure increases.
  • Embodiments of the invention utilize a dual chamber configuration, where the bottom chamber is pulsed on the top chamber is not pulsed. As discussed in more detail below with reference to FIGS. 4-6 , the two chambers are separated by a perforated grid that provides flow of species from the top chamber to the bottom chamber. Electrons escape the top plasma and flow to the bottom chamber to assist in the re-striking of the plasma. Since there are have more electrons in the bottom chamber, it is easier to re-strike the plasma. Therefore, the use of the dual chamber facilitates having a low pressure chamber and a pulsed RF power source at the same time.
  • FIG. 4 shows a semiconductor wafer processing apparatus with two chambers, according to one embodiment of the invention.
  • the semiconductor wafer processing apparatus includes a dual volume plasma source.
  • Top chamber 414 is a Continuous Wave (CW) Radical Control Plasma (RCP), separated from lower pulsed RF capacitive plasma chamber 420 by perforated grounded electrode 424 , also referred to herein as plate or grid.
  • the lower volume is a pulsing CCP plasma chamber, and the upper volume acts as a source of radicals, electrons, and ions that are injected into the lower volume.
  • CW Continuous Wave
  • RCP Radical Control Plasma
  • the flux of neutral and charged species in the lower chamber can be controlled by adjusting the parameters in the top chamber. Having charged species from the RCP top chamber flowing to the lower chamber also helps with re-striking the bottom plasma 418 during the RF ON period.
  • the afterglow and re-striking is controlled by using different plasma sources in the upper chamber. For example, using an inductively coupled or helicon plasma in the top chamber.
  • This configuration improves performance of the chamber, because the upper plasma 416 source provides control of the plasma afterglow in the bottom chamber, and provides control of the charged species dynamics for etching substrate 422 . Furthermore, the RCP in the top chamber helps to re-ignite the plasma 418 in CCP bottom chamber by providing initial charged species to strike the CCP plasma.
  • the only control for negative ion etching is the ON and OFF period cycles.
  • the upper chamber is always on, there is a constant flow of species coming from the top chamber, even in the bottom chamber OFF period. Therefore, it is possible to control the etching process both in the ON and OFF periods.
  • the electrons from the top plasma 416 go through the through-holes 426 that connect the top chamber to the bottom chamber. The electrons carry energy, so the through-holes 426 form electron beams into the bottom chamber.
  • bottom chamber 420 is powered by a first pulsed RF power source 406 and by a second pulsed RF power source 410 .
  • the RF power sources are connected to the bottom electrode in chamber 420 via respective RF Matches 408 and 412 .
  • the top electrode in top chamber 414 is connected to a third RF power source 402 via matching network 404 .
  • the third RF power source 402 provides a continuous wave RF power to top chamber 414 .
  • a pulse controller 430 controls the parameters for the RF power generated by the first pulsed RF power source 406 and by the second pulsed RF power source 410 .
  • the parameters that control the first and the second RF power sources include the pulsing cycle (i.e., the duration of the ON and OFF periods) of the RF power sources, the frequency, the voltages, and the power levels for the first and second RF power sources.
  • the system controls, for example, the RF OFF period and the plasma afterglow in the bottom chamber. This control of the RF parameters also enables the system to control the flux of neutral and charged species from the top chamber.
  • Having charged species from the top chamber traveling to the lower chamber also assists with the re-striking of the plasma at the beginning of the RF ON period, which means that plasma re-strikes faster than in the case of a single chamber device with the same RF power.
  • a continuous wave controller 428 controls the RF power generated by third RF power source 402 .
  • the continuous wave controller 428 controls the parameters of the RF power on the top chamber, which include frequency, voltage, and power.
  • System controller 432 is in communication with pulse controller 430 and continuous wave controller 428 , and system controller 432 sets the control parameters for the RF power in the top and bottom chambers.
  • the system controller 432 is operable to regulate the flow of species from the top chamber to the bottom chamber through the plate during operation of the chamber, where the flow of species assists in the negative-ion etching and in neutralizing excessive positive charge on the wafer surface during afterglow in the OFF period, and assists in the re-striking of the plasma in the bottom chamber during the ON period.
  • System controller 432 has plasma recipe setting 434 as an input.
  • the plasma recipe setting 434 includes the parameters for the three RF power sources, including frequency, voltage, power, and ON/OFF cycles, and other parameters for the operation of the chamber.
  • values in the plasma recipe setting may include the configuration of the plate separating the chambers (e.g., the number of through-holes, the thickness of the plate, the distribution of the through-holes, etc.), the pressure in the top chamber, the pressure in the bottom chamber, duration of the etching cycle, gas flow into the chambers, etc.
  • system controller 432 is also operable to control other parameters of the chamber, such as the pressure in the top chamber, the pressure in the bottom chamber, and the configuration of the plate 424 situated between the top and bottom chambers.
  • the top and bottom chambers have independent controls for the gas flow into the respective chambers. There is a separate source of gas intake in the top chamber.
  • the grid 424 also includes gas outlets that form a gas showerhead into the bottom chamber.
  • Grid 424 has an outside surface which is an insulator dielectric, such as aluminum oxide. In one embodiment, grid 424 is made of aluminum and coated with aluminum oxide. In another embodiment, the grid is made of silicon. Grid 424 is connected to ground. In one embodiment, grid is 27 mm thick, (i.e., the through-holes have the length of 27 mm), and the through-holes have a diameter of 2 mm, although other values are also possible.
  • the top chamber There are several parameters of the top chamber that affect the performance of the bottom chamber.
  • the voltage on the sheath of the top chamber which defines the energy of some electrons, such as the secondary electrons.
  • the thickness of the plate 424 and the density of through-holes 426 The bigger the thickness of the plate, the less number of species that will travel to the bottom chamber. In addition, the higher the density of the through-holes 426 , the more species that will travel to the bottom.
  • the embodiment of FIG. 4 includes a first pulsed RF power source 406 at 2 MHz and a second pulsed RF power source 410 at 27 MHz.
  • the RF power sources are connected to the bottom electrode in chamber 420 via respective RF Matches 408 and 412 .
  • the top electrode in top chamber 414 is connected to a third RF power source 402 via matching network 404 .
  • the third RF power source 402 is not pulsing.
  • top chamber is a CCP plasma chamber.
  • modules described above in the semiconductor wafer processing apparatus may be combined into a single module, or the functionality of a single module may be performed by a plurality of modules.
  • continuous wave controller 428 and pulse controller 430 are integrated within system controller 432 , although other configurations are also possible.
  • the embodiment illustrated in FIG. 5 should therefore not be interpreted to be exclusive or limiting, but rather exemplary or illustrative.
  • the top electrode is connected to a RF power source at 27 MHz
  • the bottom electrode in the bottom chamber is connected to an RF power source at 2 MHz.
  • the pressure in the top chamber has a value between 20 mTorr and 60 mTorr
  • the pressure in the bottom chamber has a value between 10 mTorr and 19 mTorr.
  • the top chamber has a single RF power source with a frequency between 27 MHz and 100 MHz
  • the bottom chamber has a single RF power source with a frequency between 0.4 MHz and 25 MHz.
  • the voltage in the top power source can be in the range of hundreds of volts (e.g., 100 V to 2000 V or more).
  • the bottom RF power source can have a voltage up to 6000 V or more. In one embodiment, the voltage is 1000 V. In another embodiment, the voltage of the top RF power source has a value between 100 V and 600 V, and the voltage of the bottom RF power source has a value between 1000 V and 6000V.
  • the pressure in the top chamber and the bottom chamber can have a value between 10 mTorr to 500 mTorr.
  • the top chamber operates at a pressure of 20 mTorr and the bottom chamber operates at 15 mTorr.
  • FIG. 5 shows a semiconductor wafer processing apparatus, in accordance with one embodiment of the present invention.
  • the apparatus includes a chamber 500 formed by a top plate 500 A, a bottom plate 500 B, and walls 500 C.
  • the walls 500 C form a contiguous cylindrical shaped wall 500 C.
  • the walls 500 C can have other configurations, so long as an interior cavity 500 D of the chamber 500 can be isolated from an external environment outside the chamber 500 .
  • the top plate 500 A, bottom plate 500 B, and walls 500 C of the chamber 500 can be formed of a metal that is a good conductor of electricity and heat, and that is chemically compatible with the process gases to which the interior cavity 500 D is to be exposed during wafer processing.
  • metals such as aluminum, stainless steel, or the like, maybe used to form the chamber 500 components.
  • the chamber 500 structure including the top plate 500 A, bottom plate 500 B and walls 500 C, is formed of an electrically conducting material and is electrically connected to a reference ground potential.
  • the chamber 500 includes an exhaust port 535 which provides for fluid connection of the interior cavity 500 D to an external exhaust pump 537 , such that a negative pressure can be applied through the exhaust port 535 to remove gases and particulates from within the interior cavity 500 D.
  • the exhaust pump 537 can be implemented in different ways, so long as the exhaust pump 537 is capable of applying a suction at the exhaust port 535 to draw a fluid flow from the interior cavity 500 D of the chamber 500 .
  • a dual plasma processing apparatus is disposed within the interior cavity 500 D of the chamber 500 .
  • the dual plasma processing apparatus includes an upper plasma chamber 512 that includes an upper plasma generation volume 503 .
  • the dual plasma processing apparatus also includes a lower plasma chamber 514 that includes a lower plasma generation volume 509 .
  • the upper and lower plasma chambers 512 and 514 are physically and fluidly connected by a gas distribution unit 515 , which is disposed to separate the upper and lower plasma generation volumes 503 and 509 .
  • the upper plasma chamber 512 is formed in part by an outer structural member 504 defined around a periphery of the upper plasma chamber 512 and connected to the top plate 500 A.
  • the upper plasma chamber 512 also includes a showerhead electrode 501 disposed above the upper plasma generation volume 503 within the outer structural member 504 .
  • radiofrequency (RF) power is transmitted from an RF power source 505 to the showerhead electrode 501 .
  • the RF power source 505 is defined to provide RF power at multiple frequencies. In one embodiment, frequencies of the RF power source 505 are set within a range extending from 5 kHz to 500 MHz. In another embodiment, frequencies of the RF power source 505 are set within a range extending from 400 kHz to 60 MHz.
  • the showerhead electrode 501 is connected to a DC bias source 520 to enable control of plasma potential within the upper plasma generation volume 503 independent of the plasma density.
  • the DC bias source 520 is defined to control a bias of the showerhead electrode 501 at various voltage settings extending upward from ground.
  • the DC bias source 520 of the showerhead electrode 501 can be defined to operate in a pulsed manner to synchronize the plasma in the upper plasma generation volume 503 with the plasma in the lower plasma generation volume 509 . More specifically, this pulsed control of the DC bias source 520 can be used to control a time-dependent voltage differential between the plasmas in the upper and lower plasma generation volumes 503 and 509 .
  • Each of the through-holes 517 is defined in open fluid communication through the upper surface of the gas distribution unit 515 .
  • the gas supply ports 519 are not fluidly exposed through the upper surface of the gas distribution unit 515 . Therefore, the gas supply ports 519 are defined to flow plasma process gas into only the lower plasma generation volume 509 .
  • the through-holes 517 are defined to enable fluid communication between the upper and lower plasma generation volumes 503 and 509 . Fluid flow through the through-holes 517 of the gas distribution unit 515 may be controlled by a pressure differential between the upper plasma generation volume 503 and the lower plasma generation volume 509 .
  • the gas distribution unit 515 serves as a RF return path electrode, plasma process gas manifold, fluid flow baffle plate, and ion filter.
  • the gas distribution unit 515 can be formed of metal that is a good conductor of electricity and heat, and that is chemically compatible with the processes to be conducted in the upper and lower plasma generation volumes 503 and 509 , such as aluminum, stainless steel, silicon, silicon carbide, silicon oxide, yttrium oxide, or essentially any other material that provides adequate plasma resistance, electrical conduction, and thermal conduction for the plasma processes to which it is exposed.
  • the gas distribution unit 515 is connected to its own DC bias source 524 and RF power source 522 to enable the gas distribution unit 515 to provide an appropriate ground return path for the RF power sources 505 and 511 , while also providing appropriate bias to affect ions generated in the upper plasma generation volume 503 .
  • the RF power source 522 can also be defined to provide RF power at multiple frequencies.
  • electrodes 530 are embedded within the gas distribution unit 515 and are connected to the DC bias source 524 to provide bias voltage for influencing ions generated in the upper plasma generation volume 503 .
  • the embedded electrodes 530 within the gas distribution unit 515 are defined around the through-holes 517 , such that bias voltage applied to the embedded electrodes 530 can be used to either accelerate or decelerate ions passing through the through-holes 517 .
  • the embedded electrodes 530 within the gas distribution unit 515 are defined in multiple separately controllable zones, with each zone connected to its own DC bias source 524 . This embodiment enables independent regional biasing across the gas distribution unit 515 , to provide for independent regional ion control across the gas distribution unit 515 .
  • portions of the gas distribution unit 515 that are exposed to plasma in either the upper or lower plasma generation volumes 503 and 509 are protected by a covering of plasma resistant material.
  • the plasma resistant material is formed as a coating.
  • the plasma resistant material is formed as a protective structure, e.g., plate, that conformally covers the gas distribution unit 515 .
  • the plasma resistant material is secured to the gas distribution unit 515 to ensure adequate electrical and thermal conduction between the plasma resistant material and the gas distribution unit 515 .
  • the protective structure may be secured to the gas distribution unit 515 by a pressure differential between the upper and lower plasma generation volumes 503 and 509 , by a number of fasteners, or by a combination thereof.
  • the plasma resistant coating, the protective structure, used to protect the gas distribution unit 515 can be formed of silicon, silicon carbide, silicon oxide, yttrium oxide, or essentially any other material that provides adequate plasma resistance, electrical conduction, and thermal conduction for the plasma processes to which it is exposed.
  • Each of the gas supply ports 519 and through-holes 517 is defined to optimize fluid flow through it, while simultaneously preventing adverse intrusion of plasma into it. Fluid flow and plasma intrusion through each of the gas supply ports 519 and though-holes 517 is directly proportional to its size. Therefore, it is necessary to define each of the gas supply ports 519 and though-holes 517 such that its size is small enough to prevent adverse plasma intrusion into it, while remaining large enough to provide adequate fluid flow through it.
  • the diameter of the gas supply ports 519 is sized within a range extending from about 0.1 mm to about 3 mm.
  • the diameter of the through-holes 517 is sized within a range extending from about 0.5 mm to about 5 mm. It should be understood, however, that in various embodiments the gas supply ports 519 and through-holes 517 can be respectively defined with essentially any diameter size, so long as the diameter size provides for adequate fluid flow there through while simultaneously providing for adequate suppression of plasma intrusion therein.
  • a chuck 507 is disposed within the interior cavity 500 D of the chamber 500 below the lower plasma generation volume 509 .
  • the chuck 507 is cantilevered from the wall 500 C of the chamber 500 .
  • the chuck 507 is an electrostatic chuck and provides an electrode for transmitting RF power to the lower plasma generation volume 509 .
  • the chuck 507 is defined to hold a substrate 513 , i.e., wafer 513 , in exposure to the lower plasma generation volume 509 .
  • a wafer edge ring 549 is disposed on the chuck 507 about the periphery of a substrate 513 holding area on the chuck 507 .
  • the wafer edge ring is formed of quartz or silicon.
  • a conductor 548 is disposed below the wafer edge ring 549 , and is connected to drive DC bias through the wafer edge ring 549 .
  • a vertical distance across the lower plasma generation volume 509 can be set and controlled by controlling the vertical position of the chuck 507 .
  • the vertical distance across the lower plasma generation volume 509 can be set to achieve a sufficient center-to-edge plasma uniformity and density, and can also be set to avoid printing on the wafer 513 by jets of gas flowing from the gas supply ports 519 and through-holes 517 .
  • the vertical distance across the lower plasma generation volume 509 can be set within a range extending from about 1 cm to about 5 cm, or from about 2 cm to about 3.6 cm.
  • the chuck 507 is further defined to supply RF power from an RF power source 511 to the lower plasma generation volume 509 , such that chuck 507 serves as an electrode for the lower plasma generation volume 509 .
  • the RF power source 511 of the lower plasma chamber is separate and independent from the RF power source 505 of the upper plasma chamber. Therefore, the RF power supplied to the upper and lower plasma generation volumes 503 and 509 can be separately and independently controlled.
  • the RF power source 511 provides a pulsing RF power, with an ON cycle and an OFF cycle. In another embodiment, the RF power source 511 provides RF power at two different frequencies, where the RF power for both frequencies is pulsing. In another embodiment, one RF power at a first frequency is pulsing and the other RF power at a second frequency is not pulsing.
  • Pulse controller 430 is coupled to RF power source 511 , and pulse controller 430 sets the parameters for the RF power provided by RF power source 511 . These parameters include the frequency, power, and ON/OFF duty cycle of the RF power generated by the power source 511 .
  • continuous wave controller 428 is coupled to the RF power source 505 , and continuous wave controller 428 sets the parameters for the RF power generated by RF power source 505 , including frequency and power of the RF power generated in the top chamber.
  • the RF power source 511 is defined to provide RF power and multiple frequencies.
  • the RF power source 511 can be defined to provide RF power at frequencies of 2 MHz, 27 MHz, and 60 MHz.
  • each of the RF power sources 505 and 511 for the upper and lower plasma chambers 512 and 514 , respectively, are connected through their own matching networks to enable transmission of the RF power to the showerhead electrode 501 and the chuck 507 , respectively.
  • the gas distribution unit 515 serves as a reference ground electrode in the RF power return path for both the upper and lower plasma generation volumes 503 and 509 .
  • the upper plasma chamber is defined to include an exhaust channel 525 through which gases within the upper plasma generation volume 503 are exhausted into the interior cavity 500 D of the chamber 500 .
  • a pressure throttle ring 527 is defined to move within the exhaust channel 525 to throttle a fluid flow, i.e., flow of gases, from the upper plasma generation volume 503 through the exhaust channel 525 to the interior cavity 500 D of the chamber 500 .
  • the pressure throttle ring 527 is defined to move vertically within a conformally defined recessed region within the outer structural member 504 of the upper plasma chamber 512 .
  • the pressure throttle ring 527 can be moved in a controlled manner down into the exhaust channel 525 to reduce a flow area through the exhaust channel 525 and thereby throttle the fluid flow from the upper plasma generation volume 503 .
  • the pressure throttle ring 527 is defined to enable a complete shutoff of flow from the upper plasma generation volume 503 through the exhaust channel 525 into the interior cavity 500 D of the chamber 500 .
  • the pressure throttle ring 527 configuration depicted in FIG. 5 is one example embodiment of its implementation. In other embodiments, the pressure throttle ring 527 can be implemented in different ways, so long as the pressure throttle ring 527 provides for control of fluid flow through the exhaust channel 525 .
  • the lower plasma chamber is defined to include a set of slotted exhaust channels 529 through which gases within the lower plasma generation volume 509 are exhausted into the interior cavity 500 D of the chamber 500 .
  • a pressure control ring 531 is defined to move toward and away from the set of slotted exhaust channels 529 to throttle a fluid flow, i.e., flow of gases, from the lower plasma generation volume 509 through the set of slotted exhaust channels 529 into the interior cavity 500 D of the chamber 500 .
  • the pressure control ring 531 is defined as a horizontally oriented annular-shaped disc which is movable in a vertical direction toward and away from the set of slotted exhaust channels 529 .
  • the pressure control ring 531 is defined to cover the set of slotted exhaust channels 529 (on the interior cavity 500 D side) when placed against the set of slotted exhaust channels 529 , i.e., when placed against a lower surface of the horizontally oriented portion of the outer structural member 506 within which the set of slotted exhaust channels 529 is formed.
  • Fluid flow from the lower plasma generation volume 509 through the set of slotted exhaust channels 529 to the interior cavity 500 D of the chamber 500 can be throttled, i.e., controlled, through vertical movement of the pressure control ring 531 toward and away from the set of slotted exhaust channels 529 .
  • the pressure control ring 531 is defined to enable a complete shutoff of flow from the lower plasma generation volume 509 through the set of slotted exhaust channels 529 into the interior cavity 500 D of the chamber 500 .
  • a pressure manometer is disposed to measure the pressure within the lower plasma generation volume 509 . In this embodiment, this measured pressure within the lower plasma generation volume 509 is used to generate feedback signals for controlling the position of the pressure control ring 531 , which in turn provides active control of the pressure within the lower plasma generation volume 509 .
  • both the upper plasma chamber 512 and the lower plasma chamber 514 enclose respective confined plasmas.
  • a confined plasma is beneficial in that its residence time can be controlled by controlling volume, pressure, and flow within the plasma region, i.e., within the upper and lower plasma generation volumes 503 and 509 .
  • the plasma residence time affects the dissociation process, which is a factor in radical and neutron formation.
  • a pressure within the upper plasma processing volume 503 can be controlled within a range extending from about 100 mTorr to about 1 Torr, or from about 200 mTorr to about 600 mTorr.
  • a pressure within the lower plasma processing volume 509 can be controlled within a range extending from about 5 mTorr to about 100 mTorr, or from about 10 mTorr to about 30 mTorr.
  • the upper plasma chamber 512 is a capacitively coupled plasma chamber.
  • a vertical distance across the upper plasma generation volume 503 is set within a range extending from about 1 cm to about 5 cm. In one embodiment, this vertical distance across the upper plasma generation volume 503 is about 2 cm.
  • the showerhead electrode 501 can be functionally replaced by an induction coil, such that the upper plasma chamber 512 is an inductively coupled plasma chamber. In this embodiment, the vertical distance across the upper plasma generation volume 503 can be up to about 12 cm.
  • the gas distribution unit 515 is disposed between the upper plasma generation volume 503 and the lower plasma generation volume 509 .
  • the gas distribution unit 515 is defined as a plate formed to separate the upper plasma generation volume 503 from the lower plasma generation volume 509 , such that an upper surface of the gas distribution unit 515 plate provides a lower boundary of the upper plasma generation volume 503 , and such that a lower surface of the gas distribution unit 515 plate provides an upper boundary of the lower plasma generation volume 509 .
  • the gas distribution unit 515 is held in a fixed position by the outer structural member 506 of the lower plasma chamber 514 .
  • the gas distribution unit 515 is defined to defined to supply a plasma process gas to the lower plasma generation volume 509 through an arrangement of gas supply ports 519 .
  • the gas distribution unit 515 is further defined to include an arrangement of through-holes 517 to provide controlled fluid communication between the upper plasma generation volume 503 and the lower plasma generation volume 509 .
  • Each of the through-holes 517 extends through the gas distribution unit 515 plate from its upper surface to its lower surface.
  • FIG. 6 shows the chamber 500 of FIG. 5 with an upper plasma 501 and a lower plasma 503 , in accordance with one embodiment of the present invention.
  • the independent control of the upper and lower plasma chambers 512 and 514 provides for extensive possibilities with regard to wafer processing recipes, particularly concerning the independent control of radical and neutral flux relative to ion flux.
  • a couple of example wafer processes are provided below. However, it should be understood that the example wafer processes disclosed herein are provided as examples only and in no way represent any limitation on use of the dual plasma processing chamber 500 disclosed herein.
  • the chamber 500 is used to perform a wafer process that utilizes high fluorine radical and neutral flux with low dissociation of CxFy (C4F8, C4F6, etc.) in the wafer processing plasma.
  • a mixture of Ar and NF3 is supplied as the plasma process gas to the upper plasma generation volume 503 .
  • the upper plasma generation volume 503 is operated at high pressure and high RF frequency (60 MHz).
  • the high fluorine radical and neutral flux is generated in the upper plasma chamber 503 and is flowed through the through-holes 517 of the gas distribution unit 515 .
  • the ions generated in the upper plasma processing volume 503 are filtered by the gas distribution unit 515 .
  • a mixture Ar and CxFy gas is supplied as the plasma process gas to the lower plasma generation volume 509 .
  • the lower plasma generation volume 509 is operated at low pressure and low to medium RF frequency (2 MHz and 27 MHz) with pulsing RF power.
  • the low RF frequency of the lower plasma generation volume 509 corresponds to low dissociation of CxFy in the plasma exposed to the wafer 513 .
  • the high power required in the upper plasma generation volume 503 to generate the necessary fluorine radical and neutral flux would cause high dissociation of CxFy if applied to the lower plasma generation volume 509 . Therefore, the dual plasma chamber 500 enables performance of the above described process.
  • the chamber 500 is used to perform a wafer process that utilizes high dissociation of CxFy (C4F8, C4F6, etc.) in a high pressure volume with a high density Ar plasma in a low pressure volume.
  • CxFy C4F8, C4F6, etc.
  • a mixture of CxFy and Ar is supplied as the plasma process gas to the upper plasma generation volume 503 .
  • the upper plasma generation volume 503 is operated at high pressure and high RF frequency (60 MHz) to cause high dissociation of CxFy.
  • the highly dissociated CxFy generated in the upper plasma chamber 503 flows through the through-holes 517 of the gas distribution unit 515 .
  • the ions generated in the upper plasma processing volume 503 are filtered by the gas distribution unit 515 .
  • Ar gas is supplied as the plasma process gas to the lower plasma generation volume 509 .
  • the lower plasma generation volume 509 is operated at low pressure and low to medium RF frequency (2 MHz and 27 MHz) to generate a high density Ar plasma with high ion flux.
  • the dual plasma chamber 500 is defined to decouple radical and neutral flux generation from ionic plasma generation.
  • the lower plasma chamber 514 can be inactive, i.e., exhaust only, such that radical and neutral flux from the upper plasma chamber 512 can be applied to the wafer 513 without exposing the wafer 513 to a plasma.
  • FIG. 7 illustrates the normalized ion flux as a function of the plate thickness, according to one embodiment.
  • One of the parameters that affect the interaction between the upper chamber on the lower chamber is the configuration of the plate between the chambers.
  • the thickness defines the length of the through-holes, and the longer the through-holes are, the bigger the obstacle for the ions and electrons to travel from the upper chamber to the lower chamber.
  • the chart in FIG. 7 shows the measurements taken in a dual chamber for the normalized ion flux at different pressures in the lower chamber, with an RF frequency of 27 MHz at 300 W in argon chamber.
  • the ion flux decreases as the length (depth) of the through-holes increases.
  • the higher the pressure in the lower chamber the lower the ion flux is because the higher pressure in the lower chamber increases the resistance for fluids and species to travel to the bottom chamber.
  • a second factor affecting the flow between the upper chamber and the lower chamber is the diameter of the through-holes. As expected, the bigger the diameter of the through-holes is, the bigger the flux of particles to the lower chamber.
  • Another factors affecting the interaction between the upper chamber on the lower chamber are the number and distribution of through-holes in the plate. The greater the number of through-holes is, the more electrons will travel from the upper chamber to the lower chamber, as there are more paths between the upper and lower chambers.
  • grid is 27 mm thick, (i.e., the through-holes have a length of 27 mm), and the through-holes have a diameter of 2 mm, although other values are also possible.
  • the thickness of the grid is between 10 mm and 30 mm.
  • the diameter of the through-holes is sized within a range extending from about 0.5 mm to about 5 mm. It should be understood, however, that in various embodiments the through-holes can be respectively defined with essentially any diameter size, so long as the diameter size provides for adequate fluid flow there through while simultaneously providing for adequate suppression of plasma intrusion therein.
  • FIG. 8 shows the flow of an algorithm for operating a semiconductor wafer processing apparatus, in accordance with one embodiment of the invention.
  • the embodiment of FIG. 8 illustrates the different operations that can be performed to control the flow of species between the upper chamber and the lower chamber.
  • the parameters for the top plasma chamber are set. These parameters include the operating frequency of the RF power source, the voltage and wattage of the RF power source, the pressure in the upper chamber, the gases injected in the upper chamber, etc.
  • the parameters for the bottom plasma chamber are set. The same parameters described above for the upper chamber may also be adjusted for the bottom chamber.
  • the parameters for the plate separating the upper chamber and the lower chamber are also defined. The parameters for the plate include the thickness of the plate, the number and distribution of through-holes in the plate, the diameter of the through-holes, etc.
  • a wafer is processed in the lower chamber with the parameters set in operations 802 and 804 .
  • the operator may decide to adjust some of the parameters of the chamber to improve wafer processing.
  • probes can be used to measure the performance of the chamber. For example, a probe can be used to measure the ion flux from the top chamber to the bottom chamber.
  • a check is made to determine if the power is to be adjusted, and if the result of the check in operation 810 is that an adjustment is required, the method continues to operation 812 .
  • the wattage for the top or bottom chambers, or for both top and bottom chambers are set. As the power is increased in the chambers, the number of particles in the plasma will also increase.
  • a check is performed to determine if the voltage of the RF power sources is to be adjusted, and if the voltage is to be adjusted, new voltage levels for the top and/or bottom chambers are set, in operation 816 .
  • the bottom chamber includes a pulsing RF power source.
  • a check is performed to determine if the pulsing cycle of the RF power source is to be adjusted, in operation 820 .
  • the durations of the ON and OFF periods i.e., the cycle of the RF signal
  • the OFF period may be increased to allow for a higher afterglow etching.
  • a check is made to determine if the pressure in the first chamber of the second chamber is to be adjusted. If the pressure in either chamber is to be changed, in operation 828 , the pressure from the top chamber, or the bottom chamber, or both chambers are adjusted. As described above with reference to FIG. 7 , the higher the pressure difference between the top chamber and the bottom chamber, the higher the flow of particles between the chambers.
  • a check is made to determine if the parameters of the plate need to be changed. As previously discussed, several parameters of the plate can be changed, such as thickness of the plate, the number, distribution, and size of the through-holes, etc. If the parameters of the plate are to be adjusted, in operation 830 , any of the aforementioned parameters of the plate can be adjusted.
  • the method flows back to operation 806 and continues with the processing of wafers.
  • the embodiments illustrated in FIG. 8 are exemplary. Other embodiments may utilize different adjustments, or perform adjustments in a different order, or perform checks periodically, etc. The embodiments illustrated in FIG. 8 should therefore not be interpreted to be exclusive or limiting, but rather exemplary or illustrative.
  • FIG. 9 shows the flow of an algorithm for processing a wafer, in accordance with one embodiment of the invention.
  • first parameters are set for a continuous radio frequency (RF) signal generated by a first RF power source coupled to a top electrode in the top chamber.
  • the first parameters include a first voltage and a first frequency.
  • second parameters are set for a pulsed RF signal generated by a second RF power source coupled to a bottom electrode in the bottom chamber, where the second parameters include a second voltage, a second frequency, an ON-period duration, and an OFF-period duration.
  • RF radio frequency
  • the continuous RF signal is applied to the top electrode
  • the pulsed RF signal is applied to the bottom electrode. Setting the first parameters and the second parameters regulates the flow of species from the top chamber to the bottom chamber during operation of the chamber. The flow of species assists in the negative-ion etching and in neutralizing excessive positive charge on the wafer surface during afterglow in the OFF period, and assists in re-striking the plasma in the bottom chamber during the ON period.
  • FIG. 10 is a simplified schematic diagram of a computer system for implementing embodiments of the present invention. It should be appreciated that the methods described herein may be performed with a digital processing system, such as a conventional, general-purpose computer system. Special purpose computers, which are designed or programmed to perform only one function, may be used in the alternative.
  • the computer system includes a central processing unit (CPU) 1004 , which is coupled through bus 1010 to random access memory (RAM) 1028 , read-only memory (ROM) 1012 , and mass storage device 1014 .
  • Phase control program 1008 resides in random access memory (RAM) 1028 , but can also reside in mass storage 1014 or ROM 1012 .
  • Mass storage device 1014 represents a persistent data storage device such as a floppy disc drive or a fixed disc drive, which may be local or remote.
  • Network interface 1030 provides connections via network 1032 , allowing communications with other devices.
  • CPU 1004 may be embodied in a general-purpose processor, a special purpose processor, or a specially programmed logic device.
  • Input/Output (I/O) interface provides communication with different peripherals and is connected with CPU 1004 , RAM 1028 , ROM 1012 , and mass storage device 1014 , through bus 1010 .
  • Sample peripherals include display 1018 , keyboard 1022 , cursor control 1024 , removable media device 1034 , etc.
  • Display 1018 is configured to display the user interfaces described herein. Keyboard 1022 , cursor control 1024 , removable media device 1034 , and other peripherals are coupled to I/O interface 1020 in order to communicate information in command selections to CPU 1004 . It should be appreciated that data to and from external devices may be communicated through I/O interface 1020 .
  • the invention can also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a wire-based or wireless network.
  • Embodiments of the present invention may be practiced with various computer system configurations including hand-held devices, microprocessor systems, microprocessor-based or programmable consumer electronics, minicomputers, mainframe computers and the like.
  • the invention can also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a network.
  • the invention can employ various computer-implemented operations involving data stored in computer systems. These operations are those requiring physical manipulation of physical quantities. Any of the operations described herein that form part of the invention are useful machine operations.
  • the invention also relates to a device or an apparatus for performing these operations.
  • the apparatus may be specially constructed for the required purpose, such as a special purpose computer.
  • the computer can also perform other processing, program execution or routines that are not part of the special purpose, while still being capable of operating for the special purpose.
  • the operations may be processed by a general purpose computer selectively activated or configured by one or more computer programs stored in the computer memory, cache, or obtained over a network. When data is obtained over a network the data maybe processed by other computers on the network, e.g., a cloud of computing resources.
  • One or more embodiments of the present invention can also be fabricated as computer readable code on a computer readable medium.
  • the computer readable medium is any data storage device that can store data, which can be thereafter be read by a computer system. Examples of the computer readable medium include hard drives, network attached storage (NAS), read-only memory, random-access memory, CD-ROMs, CD-Rs, CD-RWs, magnetic tapes and other optical and non-optical data storage devices.
  • the computer readable medium can include computer readable tangible medium distributed over a network-coupled computer system so that the computer readable code is stored and executed in a distributed fashion.

Abstract

Embodiments for processing a substrate in a pulsed plasma chamber are provided. A processing apparatus with two chambers, separated by a plate fluidly connecting the chambers, includes a continuous wave (CW) controller, a pulse controller, and a system controller. The CW controller sets the voltage and the frequency for a first radio frequency (RF) power source coupled to a top electrode. The pulse controller is operable to set voltage, frequency, ON-period duration, and OFF-period duration for a pulsed RF signal generated by a second RF power source coupled to the bottom electrode. The system controller is operable to set parameters to regulate the flow of species between the chambers to assist in the negative-ion etching, to neutralize excessive positive charge on the wafer surface during afterglow in the OFF period, and to assist in the re-striking of the bottom plasma during the ON period.

Description

    CROSS REFERENCE TO RELATED APPLICATIONS
  • This application is related to U.S. patent application Ser. No. 12/850,552, filed on Aug. 4, 2010, entitled “Plasma Processing Chamber with Dual Axial Gas Injection and Exhaust”; U.S. patent application Ser. No. 12/850,559, filed on Aug. 4, 2010, entitled “Dual Plasma Volume Processing Apparatus for Neutral/Ion Flux Control”; U.S. patent application Ser. No. 13/188,421, filed Jul. 21, 2011, and entitled “Negative Ion Control For Dielectric Etch”, all of which are incorporated herein by reference.
  • BACKGROUND
  • 1. Field of the Invention
  • The present invention relates to methods, systems, and computer programs for dielectric etching of a semiconductor device, and more particularly, methods, systems, and computer programs for dielectric etching of a semiconductor device in a dual-module capacitively-coupled plasma (CCP) chamber.
  • 2. Description of the Related Art
  • The manufacturing of integrated circuits includes immersing silicon substrates (wafers) containing regions of doped silicon into chemically-reactive plasmas, where the submicron device features (e.g., transistors, capacitors, etc.) are etched onto the surface. Once the first layer is manufactured, several insulating (dielectric) layers are built on top of the first layer, where holes, also referred to as vias, and trenches are etched into the material for placement of the conducting interconnectors.
  • SiO2 is a common dielectric used in semiconductor manufacturing. The plasmas used for SiO2 etching often include fluorocarbon gases such as carbon tetrafluoride CF4 and octafluorocyclobutane (C—C4F8), along with argon (Ar) and oxygen (O2) gases. The word plasma is used to refer to those gases in which the constituent atoms and molecules have been partially or wholly ionized. Capacitive radio frequency (RF) power coupling is often used for striking and sustaining the plasma because of the low dissociation rates obtained, favoring larger passivating molecules and high ion energies at the surface. To obtain independent control of the ion energy and the ion flux to the silicon substrate, dual frequency capacitive discharges (DF-CCP) are sometimes used.
  • Current plasma processing systems used in semiconductor wafer fabrication rely on highly interdependent control parameters to control radical separation, radical flux, ion energy, and ion flux delivered to the wafer. For example, current plasma processing systems attempt to achieve necessary radical separation, radical flux, ion energy, and ion flux by controlling a single plasma generated in the presence of the wafer. Unfortunately, chemistry dissociation and radical formation are coupled to ion production and plasma density and often do not work in concert to achieve the desired plasma processing conditions.
  • Some semiconductor processing equipment uses pulsed RF power sources. The current pulsed RF plasma technology does not provide control of the afterglow plasma during the RF OFF period when the plasma shuts off. Typically, during the RF OFF period, the plasma potential collapses and electrons escape to the walls of the chamber. In the afterglow, the electron density drops and the negative ion density increases. Then ions to escape to the walls as well. The charged species dynamics determines the distribution of charges inside the chamber and, therefore, its etching properties, but unfortunately these dynamics and fluxes of charged species are mostly uncontrolled. The only controls available for the afterglow period are the frequency of the modulation and the duty cycle.
  • Another problem with pulsed plasma technology is plasma re-ignition when the RF power turns on. If the plasma and the afterglow are extinguished completely during the RF OFF period, re-striking the plasma requires high RF voltage levels. Further, there can be trouble with RF issues, especially when operating at low gas pressures.
  • It is in this context that embodiments arise.
  • SUMMARY
  • Embodiments of the present invention provide systems, methods, and computer programs for processing a semiconductor substrate in a pulsed plasma chamber in a dual chamber configuration.
  • It should be appreciated that the present invention can be implemented in numerous ways, such as a process, an apparatus, a system, a device or a method on a computer readable medium. Several inventive embodiments of the present invention are described below.
  • In one embodiment, a wafer processing apparatus with a top chamber and a bottom chamber separated by a plate that fluidly connects the top chamber to the bottom chamber includes a continuous wave (CW) controller, a pulse controller, and a system controller. The CW controller is operable to set the voltage and the frequency for a first radio frequency (RF) power source coupled to a top electrode in the top chamber. The pulse controller is operable to set voltage, frequency, ON-period duration, and OFF-period duration for a pulsed RF signal generated by a second RF power source coupled to the bottom electrode in the bottom chamber. Further, the system controller is operable to set parameters for the CW controller and the pulse controller to regulate the flow of species from the top chamber to the bottom chamber through the plate during operation of the chamber. The flow of species assists in the negative ion density control during afterglow in the OFF period, and assists in the re-striking of the plasma in the bottom chamber during the ON period.
  • In another embodiment, a method, for processing a wafer in a wafer processing apparatus with a top chamber and a bottom chamber separated by a plate that fluidly connects the top chamber to the bottom chamber, includes an operation for setting first parameters for a continuous radio frequency (RF) signal generated by a first RF power source coupled to a top electrode in the top chamber. The first parameters include a first voltage and a first frequency. Further, the method includes an operation for setting second parameters for a pulsed RF signal generated by a second RF power source coupled to a bottom electrode in the bottom chamber. The second parameters include a second voltage, a second frequency, ON-period duration, and OFF-period duration. The continuous RF signal is applied to the top electrode, and the pulsed RF signal is applied to the bottom electrode. Setting the first parameters and the second parameters regulates the flow of species from the top chamber to the bottom chamber during operation of the chamber. The flow of species assists in a negative ion density control during afterglow in the OFF period, and assists in re-striking a plasma in the bottom chamber during the ON period.
  • In yet another embodiment, a wafer processing apparatus, with a top chamber and a bottom chamber separated by a plate that fluidly connects the top chamber to the bottom chamber, comprises a CW controller, a pulse controller, and a system controller. The CW controller is operable to set first parameters for a first radio frequency (RF) power source coupled to a top electrode in the top chamber, and the pulse controller is operable to set second parameters for a second pulsed RF signal generated by a second RF power source coupled to a bottom electrode in the bottom chamber. The pulse controller is further operable to set third parameters for a third pulsed RF signal generated by a third RF power source coupled to the bottom electrode. Additionally, the system controller is operable to transfer the first, second, and third parameters to regulate a flow of species from the top chamber to the bottom chamber through the plate during operation of the chamber. The flow of species assists in the negative ion density control during afterglow in the OFF period, and assists in re-striking the plasma in the bottom chamber during the ON period.
  • Other aspects will become apparent from the following detailed description, taken in conjunction with the accompanying drawings.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • The invention may best be understood by reference to the following description taken in conjunction with the accompanying drawings.
  • FIG. 1 shows an etching chamber, according to one embodiment.
  • FIG. 2 illustrates the behavior of a pulsed plasma chamber, according to one embodiment.
  • FIG. 3 illustrates the effect of RF power frequency and chamber pressure on the plasma density, according to one embodiment.
  • FIG. 4 shows a semiconductor wafer processing apparatus with two chambers, according to one embodiment of the invention.
  • FIG. 5 shows a semiconductor wafer processing apparatus, in accordance with one embodiment of the present invention.
  • FIG. 6 shows the chamber of FIG. 5 with an upper plasma and a lower plasma, in accordance with one embodiment of the present invention.
  • FIG. 7 illustrates the normalized ion flux as a function of the plate thickness, according to one embodiment.
  • FIG. 8 shows the flow of an algorithm for operating a semiconductor wafer processing apparatus, in accordance with one embodiment of the invention.
  • FIG. 9 shows the flow of an algorithm for processing a wafer, in accordance with one embodiment of the invention.
  • FIG. 10 is a simplified schematic diagram of a computer system for implementing embodiments of the present invention.
  • DETAILED DESCRIPTION
  • The following embodiments provide systems, methods, and computer programs for processing a semiconductor substrate in a pulsed plasma chamber in a dual chamber configuration. It will be apparent, that the present embodiments may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail in order not to unnecessarily obscure the present embodiments.
  • FIG. 1 shows an etching chamber, according to one embodiment. Exciting an electric field between two electrodes is one of the methods to obtain RF gas discharge in an etching chamber. When an oscillating voltage is applied between the electrodes, the discharge obtained is referred to as a capacitive coupled plasma (CCP) discharge.
  • Plasma can be created utilizing stable feedstock gases to obtain a wide variety of chemically reactive by-products created by the dissociation of the various molecules caused by electron-neutral collisions. The chemical aspect of etching involves the reaction of the neutral gas molecules and their dissociated by-products with the molecules of the to-be-etched surface, and producing volatile molecules, which can be pumped away. When plasma is created, the positive ions are accelerated from the plasma across a space-charge sheath separating the plasma from the walls, to strike the wafer surface with enough energy to remove material from the surface of the wafer. This is known as ion bombardment or ion sputtering. Some industrial plasmas, however, do not produce ions with enough energy to efficiently etch a surface by purely physical means. It has been proven that that the combined actions of both neutral-gas etching and ion bombardment produces a faster etch rate than simply adding the effects of each method.
  • In one embodiment, Fluorocarbon gases, such as CF4 and C—C4F8, are used in the dielectric etch process for their anisotropic and selective etching capabilities, but the principles of the invention can be applied to other plasma-creating gases. The Fluorocarbon gases are readily dissociated into smaller molecular and atomic radicals. These chemically reactive by-products etch away the dielectric material, which in one embodiment can be SiO2 or SiOCH for low-k devices.
  • The chamber of FIG. 1 includes a top electrode 104 connected to ground, and a bottom electrode 108 powered by low-frequency RF generator 118 and high-frequency RF generator 116. The bottom electrode 108 is connected, via matching network 114, to the low-frequency RF generator 118 and to the high-frequency RF generator 116. In one embodiment, low-frequency RF generator 118 has an RF frequency of 2 MHz, and high-frequency RF generator 116 has an RF frequency of 27 MHz.
  • The chamber of FIG. 1 includes a gas showerhead on the top electrode 104 to input gas in the chamber, and a perforated confinement ring 112 that allows the gas to be pumped out of the chamber. When substrate 106 is present in the chamber, silicon focus ring 110 is situated next to the substrate such that there is a uniform RF field at the bottom surface of the plasma 102 for uniform etching on the surface of the wafer.
  • In one embodiment, low-frequency RF generator 118 is pulsing while high-frequency RF generator 116 is not pulsing. In another embodiment, both RF generators are pulsing, and, in yet another embodiment, the high-frequency RF generator 116 is pulsing while low-frequency RF generator 118 is not pulsing, i.e., low-frequency RF generator 118 is always turned on while processing the wafer.
  • FIG. 2 illustrates the behavior of a pulsed plasma chamber, according to one embodiment. The pulsed plasma chamber associated with FIG. 1 includes one pulsing RF power source. Graph 202 illustrates the voltage of the RF power source, that includes an ON period, when the RF power source is turned on, and an OFF period, when the RF power source is turned off. The graph 204 illustrates that the power of the RF power source has two levels, one level during the ON period, which is greater than zero, and a second level during the OFF period, which is equal to 0, i.e., the RF power is turned off.
  • The ON period has two phases: a first phase when the plasma is being ignited (i.e., turned on), and a second phase corresponding to a steady-state when the plasma is present in the chamber. In the turn-on phase, the plasma sheaths are forming and changing as the plasma ignites. There is a larger electron average energy, and a low ion flux density. In addition, the power is not well matched in the turn-on phase due to the varying plasma impedance while igniting the plasma. In the steady state phase, the electron density is nearly constant, and there is a large positive ion flux density. The power is well matched with an almost constant plasma impedance, and the plasma sheets oscillate in steady fashion.
  • The OFF period has two phases: a first phase when the plasma is being turned off, and a second phase named “late afterglow.” In the turn-off phase, there is a rapidly decreasing electron average energy, a rapidly falling ion flux density, and a decreasing plasma potential. The plasma sheaths disintegrate as the electron density decay. In the late-afterglow phase, the power level is zero with a small electron average energy. There is also a small ion flux density, and the negative ions can reach the surfaces of the chamber. The plasma sheaths disintegrate as the electron density decays.
  • Graph 206 shows the electron energy changing during the ON and OFF periods. In the ON period, the electron energy is high, and in the OFF period, the electron energy decreases to zero. Graph 208 shows the density of electrons 220, and the positive ion density 222. The positive ion density 222 is high during the ON period, and decreases in the OFF period. Therefore, etching with positive ions takes place mainly during the ON period.
  • Graph 210 shows the evolution of the plasma potential over time. As discussed above, the plasma potential spikes at the beginning of the turn on phase and then reaches a stable value. In the turned off phase, the plasma potential decays until the plasma potential reaches a value of zero. Graph 212 shows the value of the positive ion flux, which is almost constant during the ON period, and quickly decays to 0 in the OFF period.
  • In addition, graph 214 shows the value of the negative ion flux over time. The negative ion flux is substantially 0 during the ON period, but the negative ion flux has a positive spike in the OFF period, which causes etching in the wafer with negative ions and neutralizing excessive positive charge on the wafer surface during the OFF period.
  • Pulsing the RF power source helps etching performance because trenching, notching and charging damages can be reduced, when compared to a non-pulsing RF power source. Charges can build up between the top and the bottom of a well during continues discharge, which can cause the deflection of ions. The charge buildup can be reduced in pulsed discharges because the low electron density in the afterglow regime allows more negative ions and electrons to be pulled to the well bottom, to neutralize the positive charges that might have accumulated at the bottom of the well.
  • FIG. 3 illustrates the effect of RF power frequency and chamber pressure on the plasma density, according to one embodiment. FIG. 3 illustrates some measurements taken on a non-pulsing plasma chamber under different conditions of RF power frequency and pressure in the chamber. The measurements were taken with a single RF power source at 400 W, in a chamber with oxygen and 5% Argon.
  • Line 302 charts the values for the positive ion flux at different levels of pressure and with an RF frequency of 2 MHz. As the pressure in the chamber increases, the negative ion flux increases to about a maximum positive ion flux at about 300 mTorr. Therefore, for a low RF frequency (2 MHz), the chamber is more efficient at high pressure. Line 306 charts the volumes when the RF frequency is 27 MHz. In this case, the flux gradually increases until the pressure is about 100 mTorr, and then remains substantially constant. Line 304 charts the values for the flux when using an RF frequency of 60 MHz. At this high frequency, the chamber is more efficient at low pressure, and less efficient as the pressure increases.
  • In general, when using a pulsed RF power, it is more desirable to run the chamber at low pressure, so the ions can penetrate deep in the holes. However, it is relatively hard to strike plasma in a low pressure plasma chamber, because there are fewer electrons when operating at low pressure than when operating at high pressure.
  • Embodiments of the invention utilize a dual chamber configuration, where the bottom chamber is pulsed on the top chamber is not pulsed. As discussed in more detail below with reference to FIGS. 4-6, the two chambers are separated by a perforated grid that provides flow of species from the top chamber to the bottom chamber. Electrons escape the top plasma and flow to the bottom chamber to assist in the re-striking of the plasma. Since there are have more electrons in the bottom chamber, it is easier to re-strike the plasma. Therefore, the use of the dual chamber facilitates having a low pressure chamber and a pulsed RF power source at the same time.
  • FIG. 4 shows a semiconductor wafer processing apparatus with two chambers, according to one embodiment of the invention. The semiconductor wafer processing apparatus includes a dual volume plasma source. Top chamber 414 is a Continuous Wave (CW) Radical Control Plasma (RCP), separated from lower pulsed RF capacitive plasma chamber 420 by perforated grounded electrode 424, also referred to herein as plate or grid. The lower volume is a pulsing CCP plasma chamber, and the upper volume acts as a source of radicals, electrons, and ions that are injected into the lower volume.
  • During the afterglow in the OFF period of the pulsed lower-chamber RF, the flux of neutral and charged species in the lower chamber can be controlled by adjusting the parameters in the top chamber. Having charged species from the RCP top chamber flowing to the lower chamber also helps with re-striking the bottom plasma 418 during the RF ON period. In one embodiment, the afterglow and re-striking is controlled by using different plasma sources in the upper chamber. For example, using an inductively coupled or helicon plasma in the top chamber.
  • This configuration improves performance of the chamber, because the upper plasma 416 source provides control of the plasma afterglow in the bottom chamber, and provides control of the charged species dynamics for etching substrate 422. Furthermore, the RCP in the top chamber helps to re-ignite the plasma 418 in CCP bottom chamber by providing initial charged species to strike the CCP plasma.
  • In a single volume pulsing chamber, the only control for negative ion etching is the ON and OFF period cycles. In a dual-volume chamber, since the upper chamber is always on, there is a constant flow of species coming from the top chamber, even in the bottom chamber OFF period. Therefore, it is possible to control the etching process both in the ON and OFF periods. The electrons from the top plasma 416 go through the through-holes 426 that connect the top chamber to the bottom chamber. The electrons carry energy, so the through-holes 426 form electron beams into the bottom chamber.
  • In one embodiment, bottom chamber 420 is powered by a first pulsed RF power source 406 and by a second pulsed RF power source 410. The RF power sources are connected to the bottom electrode in chamber 420 via respective RF Matches 408 and 412. The top electrode in top chamber 414 is connected to a third RF power source 402 via matching network 404. In one embodiment, the third RF power source 402 provides a continuous wave RF power to top chamber 414.
  • A pulse controller 430 controls the parameters for the RF power generated by the first pulsed RF power source 406 and by the second pulsed RF power source 410. The parameters that control the first and the second RF power sources include the pulsing cycle (i.e., the duration of the ON and OFF periods) of the RF power sources, the frequency, the voltages, and the power levels for the first and second RF power sources. By controlling the parameters of the RF power sources, the system controls, for example, the RF OFF period and the plasma afterglow in the bottom chamber. This control of the RF parameters also enables the system to control the flux of neutral and charged species from the top chamber. Having charged species from the top chamber traveling to the lower chamber also assists with the re-striking of the plasma at the beginning of the RF ON period, which means that plasma re-strikes faster than in the case of a single chamber device with the same RF power.
  • A continuous wave controller 428 controls the RF power generated by third RF power source 402. Thus, the continuous wave controller 428 controls the parameters of the RF power on the top chamber, which include frequency, voltage, and power. System controller 432 is in communication with pulse controller 430 and continuous wave controller 428, and system controller 432 sets the control parameters for the RF power in the top and bottom chambers. By controlling the parameters for the CW controller and the pulse controller, the system controller 432 is operable to regulate the flow of species from the top chamber to the bottom chamber through the plate during operation of the chamber, where the flow of species assists in the negative-ion etching and in neutralizing excessive positive charge on the wafer surface during afterglow in the OFF period, and assists in the re-striking of the plasma in the bottom chamber during the ON period. System controller 432 has plasma recipe setting 434 as an input. The plasma recipe setting 434 includes the parameters for the three RF power sources, including frequency, voltage, power, and ON/OFF cycles, and other parameters for the operation of the chamber. Other values in the plasma recipe setting may include the configuration of the plate separating the chambers (e.g., the number of through-holes, the thickness of the plate, the distribution of the through-holes, etc.), the pressure in the top chamber, the pressure in the bottom chamber, duration of the etching cycle, gas flow into the chambers, etc.
  • Besides controlling the RF power sources, system controller 432 is also operable to control other parameters of the chamber, such as the pressure in the top chamber, the pressure in the bottom chamber, and the configuration of the plate 424 situated between the top and bottom chambers.
  • The top and bottom chambers have independent controls for the gas flow into the respective chambers. There is a separate source of gas intake in the top chamber. The grid 424 also includes gas outlets that form a gas showerhead into the bottom chamber. Grid 424 has an outside surface which is an insulator dielectric, such as aluminum oxide. In one embodiment, grid 424 is made of aluminum and coated with aluminum oxide. In another embodiment, the grid is made of silicon. Grid 424 is connected to ground. In one embodiment, grid is 27 mm thick, (i.e., the through-holes have the length of 27 mm), and the through-holes have a diameter of 2 mm, although other values are also possible.
  • Having dual volumes increases the amount of negative ions in the bottom chamber during the OFF period, which improves the etching with negative ions. As electrons from the top chamber arrive at the bottom chamber, the electrons attach to ions and create more negative ions in the chamber during the OFF period.
  • There are several parameters of the top chamber that affect the performance of the bottom chamber. First, the electron density in the top chamber. The higher the density, the higher the number of electrons traveling to the bottom chamber. Second, the voltage on the sheath of the top chamber, which defines the energy of some electrons, such as the secondary electrons. Third, the pressure in the chamber. The higher the pressure in the top chamber, the more particles (electrons, ions) that will travel to the bottom chamber. Fourth, the thickness of the plate 424 and the density of through-holes 426. The bigger the thickness of the plate, the less number of species that will travel to the bottom chamber. In addition, the higher the density of the through-holes 426, the more species that will travel to the bottom.
  • The embodiment of FIG. 4 includes a first pulsed RF power source 406 at 2 MHz and a second pulsed RF power source 410 at 27 MHz. The RF power sources are connected to the bottom electrode in chamber 420 via respective RF Matches 408 and 412. The top electrode in top chamber 414 is connected to a third RF power source 402 via matching network 404. The third RF power source 402 is not pulsing.
  • It is noted that the embodiment illustrated in FIG. 4 is exemplary. Other embodiments may utilize different types of chambers, different frequencies, only one RF power source in the bottom chamber, different size separation plates, different pressures in top and bottom chambers, etc. For example, in one embodiment, top chamber is a CCP plasma chamber. Furthermore, some of the modules described above in the semiconductor wafer processing apparatus may be combined into a single module, or the functionality of a single module may be performed by a plurality of modules. For example, in one embodiment, continuous wave controller 428 and pulse controller 430 are integrated within system controller 432, although other configurations are also possible. The embodiment illustrated in FIG. 5 should therefore not be interpreted to be exclusive or limiting, but rather exemplary or illustrative.
  • In one embodiment, the top electrode is connected to a RF power source at 27 MHz, and the bottom electrode in the bottom chamber is connected to an RF power source at 2 MHz. In another embodiment, the pressure in the top chamber has a value between 20 mTorr and 60 mTorr, and the pressure in the bottom chamber has a value between 10 mTorr and 19 mTorr.
  • In yet another embodiment, the top chamber has a single RF power source with a frequency between 27 MHz and 100 MHz, and the bottom chamber has a single RF power source with a frequency between 0.4 MHz and 25 MHz. The voltage in the top power source can be in the range of hundreds of volts (e.g., 100 V to 2000 V or more). The bottom RF power source can have a voltage up to 6000 V or more. In one embodiment, the voltage is 1000 V. In another embodiment, the voltage of the top RF power source has a value between 100 V and 600 V, and the voltage of the bottom RF power source has a value between 1000 V and 6000V.
  • The pressure in the top chamber and the bottom chamber can have a value between 10 mTorr to 500 mTorr. In one embodiment, the top chamber operates at a pressure of 20 mTorr and the bottom chamber operates at 15 mTorr.
  • FIG. 5 shows a semiconductor wafer processing apparatus, in accordance with one embodiment of the present invention. The apparatus includes a chamber 500 formed by a top plate 500A, a bottom plate 500B, and walls 500C. In one embodiment, the walls 500C form a contiguous cylindrical shaped wall 500C. In other embodiments, the walls 500C can have other configurations, so long as an interior cavity 500D of the chamber 500 can be isolated from an external environment outside the chamber 500. In various embodiments, the top plate 500A, bottom plate 500B, and walls 500C of the chamber 500 can be formed of a metal that is a good conductor of electricity and heat, and that is chemically compatible with the process gases to which the interior cavity 500D is to be exposed during wafer processing. For example, in various embodiments, metals such as aluminum, stainless steel, or the like, maybe used to form the chamber 500 components.
  • The chamber 500 structure, including the top plate 500A, bottom plate 500B and walls 500C, is formed of an electrically conducting material and is electrically connected to a reference ground potential. The chamber 500 includes an exhaust port 535 which provides for fluid connection of the interior cavity 500D to an external exhaust pump 537, such that a negative pressure can be applied through the exhaust port 535 to remove gases and particulates from within the interior cavity 500D. In various embodiments, the exhaust pump 537 can be implemented in different ways, so long as the exhaust pump 537 is capable of applying a suction at the exhaust port 535 to draw a fluid flow from the interior cavity 500D of the chamber 500.
  • A dual plasma processing apparatus is disposed within the interior cavity 500D of the chamber 500. The dual plasma processing apparatus includes an upper plasma chamber 512 that includes an upper plasma generation volume 503. The dual plasma processing apparatus also includes a lower plasma chamber 514 that includes a lower plasma generation volume 509. The upper and lower plasma chambers 512 and 514 are physically and fluidly connected by a gas distribution unit 515, which is disposed to separate the upper and lower plasma generation volumes 503 and 509.
  • The upper plasma chamber 512 is formed in part by an outer structural member 504 defined around a periphery of the upper plasma chamber 512 and connected to the top plate 500A. The upper plasma chamber 512 also includes a showerhead electrode 501 disposed above the upper plasma generation volume 503 within the outer structural member 504.
  • During operation, radiofrequency (RF) power is transmitted from an RF power source 505 to the showerhead electrode 501. In one embodiment, the RF power source 505 is defined to provide RF power at multiple frequencies. In one embodiment, frequencies of the RF power source 505 are set within a range extending from 5 kHz to 500 MHz. In another embodiment, frequencies of the RF power source 505 are set within a range extending from 400 kHz to 60 MHz.
  • Additionally, in one embodiment, the showerhead electrode 501 is connected to a DC bias source 520 to enable control of plasma potential within the upper plasma generation volume 503 independent of the plasma density. The DC bias source 520 is defined to control a bias of the showerhead electrode 501 at various voltage settings extending upward from ground. In one embodiment, the DC bias source 520 of the showerhead electrode 501 can be defined to operate in a pulsed manner to synchronize the plasma in the upper plasma generation volume 503 with the plasma in the lower plasma generation volume 509. More specifically, this pulsed control of the DC bias source 520 can be used to control a time-dependent voltage differential between the plasmas in the upper and lower plasma generation volumes 503 and 509.
  • Each of the through-holes 517 is defined in open fluid communication through the upper surface of the gas distribution unit 515. However, the gas supply ports 519 are not fluidly exposed through the upper surface of the gas distribution unit 515. Therefore, the gas supply ports 519 are defined to flow plasma process gas into only the lower plasma generation volume 509. In contrast, the through-holes 517 are defined to enable fluid communication between the upper and lower plasma generation volumes 503 and 509. Fluid flow through the through-holes 517 of the gas distribution unit 515 may be controlled by a pressure differential between the upper plasma generation volume 503 and the lower plasma generation volume 509.
  • It should be understood that the gas distribution unit 515 serves as a RF return path electrode, plasma process gas manifold, fluid flow baffle plate, and ion filter. In various embodiments the gas distribution unit 515 can be formed of metal that is a good conductor of electricity and heat, and that is chemically compatible with the processes to be conducted in the upper and lower plasma generation volumes 503 and 509, such as aluminum, stainless steel, silicon, silicon carbide, silicon oxide, yttrium oxide, or essentially any other material that provides adequate plasma resistance, electrical conduction, and thermal conduction for the plasma processes to which it is exposed.
  • In various embodiments, the gas distribution unit 515 is connected to its own DC bias source 524 and RF power source 522 to enable the gas distribution unit 515 to provide an appropriate ground return path for the RF power sources 505 and 511, while also providing appropriate bias to affect ions generated in the upper plasma generation volume 503. The RF power source 522 can also be defined to provide RF power at multiple frequencies. Additionally, in one embodiment, electrodes 530 are embedded within the gas distribution unit 515 and are connected to the DC bias source 524 to provide bias voltage for influencing ions generated in the upper plasma generation volume 503. In one embodiment, the embedded electrodes 530 within the gas distribution unit 515 are defined around the through-holes 517, such that bias voltage applied to the embedded electrodes 530 can be used to either accelerate or decelerate ions passing through the through-holes 517. Also, in one embodiment, the embedded electrodes 530 within the gas distribution unit 515 are defined in multiple separately controllable zones, with each zone connected to its own DC bias source 524. This embodiment enables independent regional biasing across the gas distribution unit 515, to provide for independent regional ion control across the gas distribution unit 515.
  • In one embodiment, portions of the gas distribution unit 515 that are exposed to plasma in either the upper or lower plasma generation volumes 503 and 509 are protected by a covering of plasma resistant material. In one embodiment, the plasma resistant material is formed as a coating. In another embodiment, the plasma resistant material is formed as a protective structure, e.g., plate, that conformally covers the gas distribution unit 515. In either of these embodiments, the plasma resistant material is secured to the gas distribution unit 515 to ensure adequate electrical and thermal conduction between the plasma resistant material and the gas distribution unit 515. In the embodiment of the plasma resistant protective structure, the protective structure, may be secured to the gas distribution unit 515 by a pressure differential between the upper and lower plasma generation volumes 503 and 509, by a number of fasteners, or by a combination thereof. In various embodiments, the plasma resistant coating, the protective structure, used to protect the gas distribution unit 515 can be formed of silicon, silicon carbide, silicon oxide, yttrium oxide, or essentially any other material that provides adequate plasma resistance, electrical conduction, and thermal conduction for the plasma processes to which it is exposed.
  • Each of the gas supply ports 519 and through-holes 517 is defined to optimize fluid flow through it, while simultaneously preventing adverse intrusion of plasma into it. Fluid flow and plasma intrusion through each of the gas supply ports 519 and though-holes 517 is directly proportional to its size. Therefore, it is necessary to define each of the gas supply ports 519 and though-holes 517 such that its size is small enough to prevent adverse plasma intrusion into it, while remaining large enough to provide adequate fluid flow through it. In various embodiments, the diameter of the gas supply ports 519 is sized within a range extending from about 0.1 mm to about 3 mm. In various embodiments, the diameter of the through-holes 517 is sized within a range extending from about 0.5 mm to about 5 mm. It should be understood, however, that in various embodiments the gas supply ports 519 and through-holes 517 can be respectively defined with essentially any diameter size, so long as the diameter size provides for adequate fluid flow there through while simultaneously providing for adequate suppression of plasma intrusion therein.
  • A chuck 507 is disposed within the interior cavity 500D of the chamber 500 below the lower plasma generation volume 509. In one embodiment, the chuck 507 is cantilevered from the wall 500C of the chamber 500. In one embodiment, the chuck 507 is an electrostatic chuck and provides an electrode for transmitting RF power to the lower plasma generation volume 509. The chuck 507 is defined to hold a substrate 513, i.e., wafer 513, in exposure to the lower plasma generation volume 509. In one embodiment, a wafer edge ring 549 is disposed on the chuck 507 about the periphery of a substrate 513 holding area on the chuck 507. In various embodiments, the wafer edge ring is formed of quartz or silicon. Also, in one embodiment, a conductor 548 is disposed below the wafer edge ring 549, and is connected to drive DC bias through the wafer edge ring 549.
  • A vertical distance across the lower plasma generation volume 509, as measured perpendicular to both the chuck 507 and the gas distribution unit 515, can be set and controlled by controlling the vertical position of the chuck 507. The vertical distance across the lower plasma generation volume 509 can be set to achieve a sufficient center-to-edge plasma uniformity and density, and can also be set to avoid printing on the wafer 513 by jets of gas flowing from the gas supply ports 519 and through-holes 517. In various embodiments, the vertical distance across the lower plasma generation volume 509 can be set within a range extending from about 1 cm to about 5 cm, or from about 2 cm to about 3.6 cm.
  • The chuck 507 is further defined to supply RF power from an RF power source 511 to the lower plasma generation volume 509, such that chuck 507 serves as an electrode for the lower plasma generation volume 509. It should be understood that the RF power source 511 of the lower plasma chamber is separate and independent from the RF power source 505 of the upper plasma chamber. Therefore, the RF power supplied to the upper and lower plasma generation volumes 503 and 509 can be separately and independently controlled.
  • In one embodiment, the RF power source 511 provides a pulsing RF power, with an ON cycle and an OFF cycle. In another embodiment, the RF power source 511 provides RF power at two different frequencies, where the RF power for both frequencies is pulsing. In another embodiment, one RF power at a first frequency is pulsing and the other RF power at a second frequency is not pulsing. Pulse controller 430 is coupled to RF power source 511, and pulse controller 430 sets the parameters for the RF power provided by RF power source 511. These parameters include the frequency, power, and ON/OFF duty cycle of the RF power generated by the power source 511. In addition, continuous wave controller 428 is coupled to the RF power source 505, and continuous wave controller 428 sets the parameters for the RF power generated by RF power source 505, including frequency and power of the RF power generated in the top chamber.
  • In one embodiment, the RF power source 511 is defined to provide RF power and multiple frequencies. For example, the RF power source 511 can be defined to provide RF power at frequencies of 2 MHz, 27 MHz, and 60 MHz. It should be understood that each of the RF power sources 505 and 511 for the upper and lower plasma chambers 512 and 514, respectively, are connected through their own matching networks to enable transmission of the RF power to the showerhead electrode 501 and the chuck 507, respectively. As previously discussed, in one embodiment, the gas distribution unit 515 serves as a reference ground electrode in the RF power return path for both the upper and lower plasma generation volumes 503 and 509.
  • The upper plasma chamber is defined to include an exhaust channel 525 through which gases within the upper plasma generation volume 503 are exhausted into the interior cavity 500D of the chamber 500. A pressure throttle ring 527 is defined to move within the exhaust channel 525 to throttle a fluid flow, i.e., flow of gases, from the upper plasma generation volume 503 through the exhaust channel 525 to the interior cavity 500D of the chamber 500. In one embodiment, the pressure throttle ring 527 is defined to move vertically within a conformally defined recessed region within the outer structural member 504 of the upper plasma chamber 512. In this embodiment, the pressure throttle ring 527 can be moved in a controlled manner down into the exhaust channel 525 to reduce a flow area through the exhaust channel 525 and thereby throttle the fluid flow from the upper plasma generation volume 503. In one embodiment, the pressure throttle ring 527 is defined to enable a complete shutoff of flow from the upper plasma generation volume 503 through the exhaust channel 525 into the interior cavity 500D of the chamber 500.
  • It should be understood that the pressure throttle ring 527 configuration depicted in FIG. 5 is one example embodiment of its implementation. In other embodiments, the pressure throttle ring 527 can be implemented in different ways, so long as the pressure throttle ring 527 provides for control of fluid flow through the exhaust channel 525. The lower plasma chamber is defined to include a set of slotted exhaust channels 529 through which gases within the lower plasma generation volume 509 are exhausted into the interior cavity 500D of the chamber 500.
  • A pressure control ring 531 is defined to move toward and away from the set of slotted exhaust channels 529 to throttle a fluid flow, i.e., flow of gases, from the lower plasma generation volume 509 through the set of slotted exhaust channels 529 into the interior cavity 500D of the chamber 500. In one embodiment, the pressure control ring 531 is defined as a horizontally oriented annular-shaped disc which is movable in a vertical direction toward and away from the set of slotted exhaust channels 529. The pressure control ring 531 is defined to cover the set of slotted exhaust channels 529 (on the interior cavity 500D side) when placed against the set of slotted exhaust channels 529, i.e., when placed against a lower surface of the horizontally oriented portion of the outer structural member 506 within which the set of slotted exhaust channels 529 is formed.
  • Fluid flow from the lower plasma generation volume 509 through the set of slotted exhaust channels 529 to the interior cavity 500D of the chamber 500 can be throttled, i.e., controlled, through vertical movement of the pressure control ring 531 toward and away from the set of slotted exhaust channels 529. In one embodiment, the pressure control ring 531 is defined to enable a complete shutoff of flow from the lower plasma generation volume 509 through the set of slotted exhaust channels 529 into the interior cavity 500D of the chamber 500. Also, in one embodiment, a pressure manometer is disposed to measure the pressure within the lower plasma generation volume 509. In this embodiment, this measured pressure within the lower plasma generation volume 509 is used to generate feedback signals for controlling the position of the pressure control ring 531, which in turn provides active control of the pressure within the lower plasma generation volume 509.
  • It should be understood that both the upper plasma chamber 512 and the lower plasma chamber 514 enclose respective confined plasmas. A confined plasma is beneficial in that its residence time can be controlled by controlling volume, pressure, and flow within the plasma region, i.e., within the upper and lower plasma generation volumes 503 and 509. The plasma residence time affects the dissociation process, which is a factor in radical and neutron formation.
  • As previously discussed, the upper and lower plasma chambers 512 and 514 have respective RF power source controls, pressure controls, temperature controls, plasma process gas source controls, and gas flow controls. In various embodiments, a pressure within the upper plasma processing volume 503 can be controlled within a range extending from about 100 mTorr to about 1 Torr, or from about 200 mTorr to about 600 mTorr. In various embodiments, a pressure within the lower plasma processing volume 509 can be controlled within a range extending from about 5 mTorr to about 100 mTorr, or from about 10 mTorr to about 30 mTorr.
  • In the embodiment of FIG. 5 with the showerhead electrode 501, the upper plasma chamber 512 is a capacitively coupled plasma chamber. In this embodiment, a vertical distance across the upper plasma generation volume 503, as measured perpendicularly between the lower surface of the showerhead electrode 501 and the upper surface of the gas distribution unit 515, is set within a range extending from about 1 cm to about 5 cm. In one embodiment, this vertical distance across the upper plasma generation volume 503 is about 2 cm. In another embodiment, the showerhead electrode 501 can be functionally replaced by an induction coil, such that the upper plasma chamber 512 is an inductively coupled plasma chamber. In this embodiment, the vertical distance across the upper plasma generation volume 503 can be up to about 12 cm.
  • The gas distribution unit 515 is disposed between the upper plasma generation volume 503 and the lower plasma generation volume 509. The gas distribution unit 515 is defined as a plate formed to separate the upper plasma generation volume 503 from the lower plasma generation volume 509, such that an upper surface of the gas distribution unit 515 plate provides a lower boundary of the upper plasma generation volume 503, and such that a lower surface of the gas distribution unit 515 plate provides an upper boundary of the lower plasma generation volume 509.
  • The gas distribution unit 515 is held in a fixed position by the outer structural member 506 of the lower plasma chamber 514. The gas distribution unit 515 is defined to defined to supply a plasma process gas to the lower plasma generation volume 509 through an arrangement of gas supply ports 519. The gas distribution unit 515 is further defined to include an arrangement of through-holes 517 to provide controlled fluid communication between the upper plasma generation volume 503 and the lower plasma generation volume 509. Each of the through-holes 517 extends through the gas distribution unit 515 plate from its upper surface to its lower surface.
  • FIG. 6 shows the chamber 500 of FIG. 5 with an upper plasma 501 and a lower plasma 503, in accordance with one embodiment of the present invention. It should be understood that the independent control of the upper and lower plasma chambers 512 and 514 provides for extensive possibilities with regard to wafer processing recipes, particularly concerning the independent control of radical and neutral flux relative to ion flux. A couple of example wafer processes are provided below. However, it should be understood that the example wafer processes disclosed herein are provided as examples only and in no way represent any limitation on use of the dual plasma processing chamber 500 disclosed herein.
  • In one example embodiment, the chamber 500 is used to perform a wafer process that utilizes high fluorine radical and neutral flux with low dissociation of CxFy (C4F8, C4F6, etc.) in the wafer processing plasma. In this example embodiment, a mixture of Ar and NF3 is supplied as the plasma process gas to the upper plasma generation volume 503. The upper plasma generation volume 503 is operated at high pressure and high RF frequency (60 MHz). The high fluorine radical and neutral flux is generated in the upper plasma chamber 503 and is flowed through the through-holes 517 of the gas distribution unit 515. The ions generated in the upper plasma processing volume 503 are filtered by the gas distribution unit 515.
  • Also, in this example embodiment, a mixture Ar and CxFy gas is supplied as the plasma process gas to the lower plasma generation volume 509. The lower plasma generation volume 509 is operated at low pressure and low to medium RF frequency (2 MHz and 27 MHz) with pulsing RF power. The low RF frequency of the lower plasma generation volume 509 corresponds to low dissociation of CxFy in the plasma exposed to the wafer 513. It should be appreciated that the high power required in the upper plasma generation volume 503 to generate the necessary fluorine radical and neutral flux would cause high dissociation of CxFy if applied to the lower plasma generation volume 509. Therefore, the dual plasma chamber 500 enables performance of the above described process.
  • In another example embodiment, the chamber 500 is used to perform a wafer process that utilizes high dissociation of CxFy (C4F8, C4F6, etc.) in a high pressure volume with a high density Ar plasma in a low pressure volume. In this example embodiment, a mixture of CxFy and Ar is supplied as the plasma process gas to the upper plasma generation volume 503. The upper plasma generation volume 503 is operated at high pressure and high RF frequency (60 MHz) to cause high dissociation of CxFy. The highly dissociated CxFy generated in the upper plasma chamber 503 flows through the through-holes 517 of the gas distribution unit 515. The ions generated in the upper plasma processing volume 503 are filtered by the gas distribution unit 515. Also, in this example embodiment, Ar gas is supplied as the plasma process gas to the lower plasma generation volume 509. The lower plasma generation volume 509 is operated at low pressure and low to medium RF frequency (2 MHz and 27 MHz) to generate a high density Ar plasma with high ion flux.
  • It should be appreciated that the dual plasma chamber 500 is defined to decouple radical and neutral flux generation from ionic plasma generation. Also, in one embodiment, the lower plasma chamber 514 can be inactive, i.e., exhaust only, such that radical and neutral flux from the upper plasma chamber 512 can be applied to the wafer 513 without exposing the wafer 513 to a plasma.
  • FIG. 7 illustrates the normalized ion flux as a function of the plate thickness, according to one embodiment. One of the parameters that affect the interaction between the upper chamber on the lower chamber is the configuration of the plate between the chambers. The thickness defines the length of the through-holes, and the longer the through-holes are, the bigger the obstacle for the ions and electrons to travel from the upper chamber to the lower chamber.
  • The chart in FIG. 7 shows the measurements taken in a dual chamber for the normalized ion flux at different pressures in the lower chamber, with an RF frequency of 27 MHz at 300 W in argon chamber. As expected, the ion flux decreases as the length (depth) of the through-holes increases. In addition, the higher the pressure in the lower chamber, the lower the ion flux is because the higher pressure in the lower chamber increases the resistance for fluids and species to travel to the bottom chamber.
  • A second factor affecting the flow between the upper chamber and the lower chamber, is the diameter of the through-holes. As expected, the bigger the diameter of the through-holes is, the bigger the flux of particles to the lower chamber. Another factors affecting the interaction between the upper chamber on the lower chamber are the number and distribution of through-holes in the plate. The greater the number of through-holes is, the more electrons will travel from the upper chamber to the lower chamber, as there are more paths between the upper and lower chambers.
  • In one embodiment, grid is 27 mm thick, (i.e., the through-holes have a length of 27 mm), and the through-holes have a diameter of 2 mm, although other values are also possible. In one embodiment, the thickness of the grid is between 10 mm and 30 mm. In various embodiments, the diameter of the through-holes is sized within a range extending from about 0.5 mm to about 5 mm. It should be understood, however, that in various embodiments the through-holes can be respectively defined with essentially any diameter size, so long as the diameter size provides for adequate fluid flow there through while simultaneously providing for adequate suppression of plasma intrusion therein.
  • FIG. 8 shows the flow of an algorithm for operating a semiconductor wafer processing apparatus, in accordance with one embodiment of the invention. The embodiment of FIG. 8 illustrates the different operations that can be performed to control the flow of species between the upper chamber and the lower chamber.
  • In operation 802, the parameters for the top plasma chamber are set. These parameters include the operating frequency of the RF power source, the voltage and wattage of the RF power source, the pressure in the upper chamber, the gases injected in the upper chamber, etc. In operation 804, the parameters for the bottom plasma chamber are set. The same parameters described above for the upper chamber may also be adjusted for the bottom chamber. In addition, the parameters for the plate separating the upper chamber and the lower chamber are also defined. The parameters for the plate include the thickness of the plate, the number and distribution of through-holes in the plate, the diameter of the through-holes, etc.
  • In operation 806, a wafer is processed in the lower chamber with the parameters set in operations 802 and 804. After the wafer is processed, the operator may decide to adjust some of the parameters of the chamber to improve wafer processing. To determine the quality of etching in the chamber, probes can be used to measure the performance of the chamber. For example, a probe can be used to measure the ion flux from the top chamber to the bottom chamber.
  • In operation 810, a check is made to determine if the power is to be adjusted, and if the result of the check in operation 810 is that an adjustment is required, the method continues to operation 812. In operation 812, the wattage for the top or bottom chambers, or for both top and bottom chambers, are set. As the power is increased in the chambers, the number of particles in the plasma will also increase.
  • In operation 814, a check is performed to determine if the voltage of the RF power sources is to be adjusted, and if the voltage is to be adjusted, new voltage levels for the top and/or bottom chambers are set, in operation 816. As previously discussed, the bottom chamber includes a pulsing RF power source. A check is performed to determine if the pulsing cycle of the RF power source is to be adjusted, in operation 820. In operation 826, the durations of the ON and OFF periods (i.e., the cycle of the RF signal) are set. For example, if negative ion etching needs to be increased, the OFF period may be increased to allow for a higher afterglow etching.
  • In operation 822, a check is made to determine if the pressure in the first chamber of the second chamber is to be adjusted. If the pressure in either chamber is to be changed, in operation 828, the pressure from the top chamber, or the bottom chamber, or both chambers are adjusted. As described above with reference to FIG. 7, the higher the pressure difference between the top chamber and the bottom chamber, the higher the flow of particles between the chambers.
  • Further, in operation 824, a check is made to determine if the parameters of the plate need to be changed. As previously discussed, several parameters of the plate can be changed, such as thickness of the plate, the number, distribution, and size of the through-holes, etc. If the parameters of the plate are to be adjusted, in operation 830, any of the aforementioned parameters of the plate can be adjusted.
  • After all the parameters of the chamber are adjusted, if any, the method flows back to operation 806 and continues with the processing of wafers. It is noted that the embodiments illustrated in FIG. 8 are exemplary. Other embodiments may utilize different adjustments, or perform adjustments in a different order, or perform checks periodically, etc. The embodiments illustrated in FIG. 8 should therefore not be interpreted to be exclusive or limiting, but rather exemplary or illustrative.
  • FIG. 9 shows the flow of an algorithm for processing a wafer, in accordance with one embodiment of the invention. In operation 902, first parameters are set for a continuous radio frequency (RF) signal generated by a first RF power source coupled to a top electrode in the top chamber. The first parameters include a first voltage and a first frequency. Further, in operation 904, second parameters are set for a pulsed RF signal generated by a second RF power source coupled to a bottom electrode in the bottom chamber, where the second parameters include a second voltage, a second frequency, an ON-period duration, and an OFF-period duration.
  • In operation 906, the continuous RF signal is applied to the top electrode, and in operation 908, the pulsed RF signal is applied to the bottom electrode. Setting the first parameters and the second parameters regulates the flow of species from the top chamber to the bottom chamber during operation of the chamber. The flow of species assists in the negative-ion etching and in neutralizing excessive positive charge on the wafer surface during afterglow in the OFF period, and assists in re-striking the plasma in the bottom chamber during the ON period.
  • FIG. 10 is a simplified schematic diagram of a computer system for implementing embodiments of the present invention. It should be appreciated that the methods described herein may be performed with a digital processing system, such as a conventional, general-purpose computer system. Special purpose computers, which are designed or programmed to perform only one function, may be used in the alternative. The computer system includes a central processing unit (CPU) 1004, which is coupled through bus 1010 to random access memory (RAM) 1028, read-only memory (ROM) 1012, and mass storage device 1014. Phase control program 1008 resides in random access memory (RAM) 1028, but can also reside in mass storage 1014 or ROM 1012.
  • Mass storage device 1014 represents a persistent data storage device such as a floppy disc drive or a fixed disc drive, which may be local or remote. Network interface 1030 provides connections via network 1032, allowing communications with other devices. It should be appreciated that CPU 1004 may be embodied in a general-purpose processor, a special purpose processor, or a specially programmed logic device. Input/Output (I/O) interface provides communication with different peripherals and is connected with CPU 1004, RAM 1028, ROM 1012, and mass storage device 1014, through bus 1010. Sample peripherals include display 1018, keyboard 1022, cursor control 1024, removable media device 1034, etc.
  • Display 1018 is configured to display the user interfaces described herein. Keyboard 1022, cursor control 1024, removable media device 1034, and other peripherals are coupled to I/O interface 1020 in order to communicate information in command selections to CPU 1004. It should be appreciated that data to and from external devices may be communicated through I/O interface 1020. The invention can also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a wire-based or wireless network.
  • Embodiments of the present invention may be practiced with various computer system configurations including hand-held devices, microprocessor systems, microprocessor-based or programmable consumer electronics, minicomputers, mainframe computers and the like. The invention can also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a network.
  • With the above embodiments in mind, it should be understood that the invention can employ various computer-implemented operations involving data stored in computer systems. These operations are those requiring physical manipulation of physical quantities. Any of the operations described herein that form part of the invention are useful machine operations. The invention also relates to a device or an apparatus for performing these operations. The apparatus may be specially constructed for the required purpose, such as a special purpose computer. When defined as a special purpose computer, the computer can also perform other processing, program execution or routines that are not part of the special purpose, while still being capable of operating for the special purpose. Alternatively, the operations may be processed by a general purpose computer selectively activated or configured by one or more computer programs stored in the computer memory, cache, or obtained over a network. When data is obtained over a network the data maybe processed by other computers on the network, e.g., a cloud of computing resources.
  • One or more embodiments of the present invention can also be fabricated as computer readable code on a computer readable medium. The computer readable medium is any data storage device that can store data, which can be thereafter be read by a computer system. Examples of the computer readable medium include hard drives, network attached storage (NAS), read-only memory, random-access memory, CD-ROMs, CD-Rs, CD-RWs, magnetic tapes and other optical and non-optical data storage devices. The computer readable medium can include computer readable tangible medium distributed over a network-coupled computer system so that the computer readable code is stored and executed in a distributed fashion.
  • Although the method operations were described in a specific order, it should be understood that other housekeeping operations may be performed in between operations, or operations may be adjusted so that they occur at slightly different times, or may be distributed in a system which allows the occurrence of the processing operations at various intervals associated with the processing, as long as the processing of the overlay operations are performed in the desired way.
  • Although the foregoing invention has been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications can be practiced within the scope of the appended claims. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the invention is not to be limited to the details given herein, but may be modified within the scope and equivalents of the appended claims.

Claims (20)

1. A wafer processing apparatus with a top chamber and a bottom chamber separated by a plate that fluidly connects the top chamber to the bottom chamber, comprising:
a continuous wave (CW) controller operable to set a voltage and a frequency for a first radio frequency (RF) power source coupled to a top electrode in the top chamber;
a pulse controller operable to set voltage, frequency, ON-period duration, and OFF-period duration for a pulsed RF signal generated by a second RF power source coupled to a bottom electrode in the bottom chamber; and
a system controller operable to set parameters for the CW controller and the pulse controller to regulate a flow of species from the top chamber to the bottom chamber through the plate during operation of the chamber, wherein the flow of species assists in a negative-ion etching and in neutralizing excessive positive charge on the wafer surface during afterglow in the OFF period, and assists in re-striking a plasma in the bottom chamber during the ON period.
2. The wafer processing apparatus as recited in claim 1, wherein the system controller is further operable to set a first pressure in the top chamber and a second pressure in the bottom chamber, and wherein the first pressure is higher than the second pressure.
3. The wafer processing apparatus as recited in claim 2, wherein a duration of the ON period is different from a duration of the OFF period.
4. The wafer processing apparatus as recited in claim 2, wherein a duration of the ON period is equal to a duration of the OFF period.
5. The wafer processing apparatus as recited in claim 1, wherein a frequency of the first RF power source has a value between 27 MHz and 100 MHz.
6. The wafer processing apparatus as recited in claim 1, wherein a frequency of the second RF power source has a value between 0.4 MHz and 25 MHz.
7. The wafer processing apparatus as recited in claim 1, wherein a voltage of the first RF power source has a value between 100 V and 600 V.
8. The wafer processing apparatus as recited in claim 1, wherein a voltage of the second RF power source has a value between 1000 V and 6000 V.
9. The wafer processing apparatus as recited in claim 1, wherein the top chamber is operable to form a top plasma in the top chamber while processing the wafer.
10. The wafer processing apparatus as recited in claim 1, wherein the top chamber is operable to have a first pressure between 20 mTorr and 60 mTorr during processing, and wherein the bottom chamber is operable to have a second pressure between 10 mTorr and 19 mTorr during processing.
11. A method for processing a wafer in a wafer processing apparatus with a top chamber and a bottom chamber separated by a plate that fluidly connects the top chamber to the bottom chamber, the method comprising:
setting first parameters for a continuous radio frequency (RF) signal generated by a first RF power source coupled to a top electrode in the top chamber, wherein the first parameters include a first voltage and a first frequency;
setting second parameters for a pulsed RF signal generated by a second RF power source coupled to a bottom electrode in the bottom chamber, wherein the second parameters include a second voltage, a second frequency, ON-period duration, and OFF-period duration;
applying the continuous RF signal to the top electrode; and
applying the pulsed RF signal to the bottom electrode, wherein setting the first parameters and the second parameters regulates a flow of species from the top chamber to the bottom chamber during operation of the chamber, wherein the flow of species assists in a negative-ion etching and in neutralizing excessive positive charge on the wafer surface during afterglow in the OFF-period, and assists in re-striking a plasma in the bottom chamber during the ON period.
12. The method as recited in claim 11 further including:
setting a first pressure in the top chamber; and
setting a second pressure in the bottom chamber.
13. The method as recited in claim 12, further including:
increasing the first pressure to increase the flow of species from the top chamber to the bottom chamber.
14. The method as recited in claim 11 further including:
adjusting a length of through-holes in the plate separating the top chamber and the bottom chamber, wherein decreasing the length of the through-holes increases the flow of species from the top chamber to the bottom chamber.
15. The method as recited in claim 14 further including:
reducing a number of the through-holes in the plate to decrease the flow of species between the top chamber and bottom chamber.
16. The method as recited in claim 11, wherein setting the first parameters includes:
increasing the first voltage to increase the flow of species.
17. The method as recited in claim 11, wherein operations of the method are performed by a computer program when executed by one or more processors, the computer program being embedded in a non-transitory computer-readable storage medium.
18. A wafer processing apparatus with a top chamber and a bottom chamber separated by a plate that fluidly connects the top chamber to the bottom chamber, comprising:
a continuous wave (CW) controller operable to set first parameters for a first radio frequency (RF) power source coupled to a top electrode in the top chamber;
a pulse controller operable to set second parameters for a second pulsed RF signal generated by a second RF power source coupled to a bottom electrode in the bottom chamber, and to set third parameters for a third pulsed RF signal generated by a third RF power source coupled to the bottom electrode; and
a system controller operable to transfer the first, second, and third parameters to regulate a flow of species from the top chamber to the bottom chamber through the plate during operation of the chamber, wherein the flow of species assists in a negative-ion etching and in neutralizing excessive positive charge on the wafer surface during afterglow in the OFF period, and assists in re-striking a plasma in the bottom chamber during the ON period.
19. The wafer processing apparatus as recited in claim 18, wherein the first RF power source has a frequency between 30 MHz and 100 MHz, the second RF power source has a frequency between 0.4 MHz and 4 MHz, and the third RF power source has a frequency between 20 MHz and 100 MHz.
20. The wafer processing apparatus as recited in claim 18, wherein the top chamber is operable to have a first pressure between 20 mTorr and 60 mTorr during processing, and wherein the bottom chamber is operable to have a second pressure between 10 mTorr and 19 mTorr during processing.
US13/227,404 2010-08-04 2011-09-07 Pulsed Plasma Chamber in Dual Chamber Configuration Abandoned US20130059448A1 (en)

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US13/227,404 US20130059448A1 (en) 2011-09-07 2011-09-07 Pulsed Plasma Chamber in Dual Chamber Configuration
PCT/US2012/051460 WO2013036371A2 (en) 2011-09-07 2012-08-17 Pulsed plasma chamber in dual chamber configuration
CN201280043579.9A CN103890916B (en) 2011-09-07 2012-08-17 The pulsed plasma room of double-chamber structure
JP2014529751A JP6382719B2 (en) 2011-09-07 2012-08-17 Dual chamber pulse plasma chamber
KR1020147006299A KR101983866B1 (en) 2011-09-07 2012-08-17 Pulsed plasma chamber in dual chamber configuration
SG10201602732TA SG10201602732TA (en) 2011-09-07 2012-08-17 Pulsed plasma chamber in dual chamber configuration
CN201610643245.5A CN106128931B (en) 2011-09-07 2012-08-17 The pulsed plasma room of double-chamber structure
SG11201400364RA SG11201400364RA (en) 2011-09-07 2012-08-17 Pulsed plasma chamber in dual chamber configuration
TW105129203A TWI608544B (en) 2011-09-07 2012-09-07 Method for processing a wafer
TW101132728A TWI562232B (en) 2011-09-07 2012-09-07 Pulsed plasma chamber in dual chamber configuration
US15/011,112 US10553399B2 (en) 2010-08-04 2016-01-29 Pulsed plasma chamber in dual chamber configuration
US15/237,521 US20160358784A1 (en) 2011-09-07 2016-08-15 Plasma-enhanced etching in an augmented plasma processing system
JP2017198963A JP6441434B2 (en) 2011-09-07 2017-10-13 Dual chamber pulse plasma chamber
JP2018217816A JP6671446B2 (en) 2011-09-07 2018-11-21 Pulse plasma chamber with dual chamber configuration
US16/832,907 US11670486B2 (en) 2011-09-07 2020-03-27 Pulsed plasma chamber in dual chamber configuration
US18/330,262 US20230317412A1 (en) 2011-09-07 2023-06-06 Pulsed plasma chamber in dual chamber configuration

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US16/832,907 Division US11670486B2 (en) 2011-09-07 2020-03-27 Pulsed plasma chamber in dual chamber configuration
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Cited By (115)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130023064A1 (en) * 2011-07-21 2013-01-24 Lam Research Corporation Negative Ion Control for Dielectric Etch
US20130126486A1 (en) * 2011-11-22 2013-05-23 Ryan Bise Multi Zone Gas Injection Upper Electrode System
KR20140121367A (en) * 2013-04-05 2014-10-15 램 리써치 코포레이션 Internal plasma grid for semiconductor fabrication
US20150091441A1 (en) * 2013-10-01 2015-04-02 Lam Research Corporation Control of Impedance of RF Delivery Path
US9017526B2 (en) 2013-07-08 2015-04-28 Lam Research Corporation Ion beam etching system
US9039911B2 (en) 2012-08-27 2015-05-26 Lam Research Corporation Plasma-enhanced etching in an augmented plasma processing system
US9083182B2 (en) 2011-11-21 2015-07-14 Lam Research Corporation Bypass capacitors for high voltage bias power in the mid frequency RF range
US9147581B2 (en) 2013-07-11 2015-09-29 Lam Research Corporation Dual chamber plasma etcher with ion accelerator
US20150325413A1 (en) * 2014-05-12 2015-11-12 Moojin Kim Plasma apparatus and method of fabricating semiconductor device using the same
US20150332941A1 (en) * 2012-10-09 2015-11-19 Applied Materials, Inc. Methods and apparatus for processing substrates using an ion shield
US9230819B2 (en) 2013-04-05 2016-01-05 Lam Research Corporation Internal plasma grid applications for semiconductor fabrication in context of ion-ion plasma processing
US9396908B2 (en) 2011-11-22 2016-07-19 Lam Research Corporation Systems and methods for controlling a plasma edge region
US20160293386A1 (en) * 2015-04-03 2016-10-06 Tokyo Electron Limited Energetic negative ion impact ionization plasma
US9508530B2 (en) 2011-11-21 2016-11-29 Lam Research Corporation Plasma processing chamber with flexible symmetric RF return strap
US20170009348A1 (en) * 2013-07-03 2017-01-12 Lam Research Corporation Chemical Deposition Apparatus Having Conductance Control
US20170098549A1 (en) * 2015-10-02 2017-04-06 Applied Materials, Inc. Methods for atomic level resolution and plasma processing control
US9704690B2 (en) 2014-08-19 2017-07-11 Samsung Electronics Co., Ltd. Plasma apparatus and method of operating the same
US9793126B2 (en) 2010-08-04 2017-10-17 Lam Research Corporation Ion to neutral control for wafer processing with dual plasma source reactor
US9793097B2 (en) 2015-07-27 2017-10-17 Lam Research Corporation Time varying segmented pressure control
US9793104B2 (en) 2015-01-29 2017-10-17 Aixtron Se Preparing a semiconductor surface for epitaxial deposition
WO2018136121A1 (en) * 2017-01-17 2018-07-26 Lam Research Corporation Near-substrate supplemental plasma density generation with low bias voltage within inductively coupled plasma processing chamber
US20180254170A1 (en) * 2015-08-31 2018-09-06 Total S.A. Plasma generating apparatus and method of manufacturing patterned devices using spatially resolved plasma processing
US20180363141A1 (en) * 2015-05-04 2018-12-20 Sidel Participations Facility for treating containers by microwave plasma, comprising a solid-state generator and adjustment method
CN109216160A (en) * 2017-06-29 2019-01-15 朗姆研究公司 Edge roughness reduces
US10249476B2 (en) 2013-10-01 2019-04-02 Lam Research Corporation Control of impedance of RF return path
US10395894B2 (en) * 2017-08-31 2019-08-27 Lam Research Corporation Systems and methods for achieving peak ion energy enhancement with a low angular spread
US10424463B2 (en) * 2015-08-07 2019-09-24 Applied Materials, Inc. Oxide etch selectivity systems and methods
US10490418B2 (en) 2014-10-14 2019-11-26 Applied Materials, Inc. Systems and methods for internal surface conditioning assessment in plasma processing equipment
US10490406B2 (en) 2018-04-10 2019-11-26 Appled Materials, Inc. Systems and methods for material breakthrough
US10497573B2 (en) 2018-03-13 2019-12-03 Applied Materials, Inc. Selective atomic layer etching of semiconductor materials
US10504754B2 (en) 2016-05-19 2019-12-10 Applied Materials, Inc. Systems and methods for improved semiconductor etching and component protection
US10510575B2 (en) * 2017-09-20 2019-12-17 Applied Materials, Inc. Substrate support with multiple embedded electrodes
US10522371B2 (en) 2016-05-19 2019-12-31 Applied Materials, Inc. Systems and methods for improved semiconductor etching and component protection
US10529737B2 (en) 2017-02-08 2020-01-07 Applied Materials, Inc. Accommodating imperfectly aligned memory holes
US10541113B2 (en) 2016-10-04 2020-01-21 Applied Materials, Inc. Chamber with flow-through source
US10541184B2 (en) 2017-07-11 2020-01-21 Applied Materials, Inc. Optical emission spectroscopic techniques for monitoring etching
US10541246B2 (en) 2017-06-26 2020-01-21 Applied Materials, Inc. 3D flash memory cells which discourage cross-cell electrical tunneling
US10546729B2 (en) 2016-10-04 2020-01-28 Applied Materials, Inc. Dual-channel showerhead with improved profile
US10573496B2 (en) 2014-12-09 2020-02-25 Applied Materials, Inc. Direct outlet toroidal plasma source
US10573527B2 (en) 2018-04-06 2020-02-25 Applied Materials, Inc. Gas-phase selective etching systems and methods
US10586686B2 (en) 2011-11-22 2020-03-10 Law Research Corporation Peripheral RF feed and symmetric RF return for symmetric RF delivery
US10593560B2 (en) 2018-03-01 2020-03-17 Applied Materials, Inc. Magnetic induction plasma source for semiconductor processes and equipment
US10593523B2 (en) 2014-10-14 2020-03-17 Applied Materials, Inc. Systems and methods for internal surface conditioning in plasma processing equipment
US10593553B2 (en) 2017-08-04 2020-03-17 Applied Materials, Inc. Germanium etching systems and methods
US10600639B2 (en) 2016-11-14 2020-03-24 Applied Materials, Inc. SiN spacer profile patterning
US10607867B2 (en) 2015-08-06 2020-03-31 Applied Materials, Inc. Bolted wafer chuck thermal management systems and methods for wafer processing systems
US10615047B2 (en) 2018-02-28 2020-04-07 Applied Materials, Inc. Systems and methods to form airgaps
US10629473B2 (en) 2016-09-09 2020-04-21 Applied Materials, Inc. Footing removal for nitride spacer
US10672642B2 (en) 2018-07-24 2020-06-02 Applied Materials, Inc. Systems and methods for pedestal configuration
US10679870B2 (en) 2018-02-15 2020-06-09 Applied Materials, Inc. Semiconductor processing chamber multistage mixing apparatus
US10699879B2 (en) 2018-04-17 2020-06-30 Applied Materials, Inc. Two piece electrode assembly with gap for plasma control
CN111434039A (en) * 2017-12-07 2020-07-17 朗姆研究公司 Intra-pulse RF pulses for semiconductor RF plasma processing
US10727080B2 (en) 2017-07-07 2020-07-28 Applied Materials, Inc. Tantalum-containing material removal
US10755941B2 (en) 2018-07-06 2020-08-25 Applied Materials, Inc. Self-limiting selective etching systems and methods
US10770346B2 (en) 2016-11-11 2020-09-08 Applied Materials, Inc. Selective cobalt removal for bottom up gapfill
US10811381B2 (en) 2018-08-03 2020-10-20 Samsung Electronics Co., Ltd. Wafer to wafer bonding method and wafer to wafer bonding system
US10854426B2 (en) 2018-01-08 2020-12-01 Applied Materials, Inc. Metal recess for semiconductor structures
US10872778B2 (en) 2018-07-06 2020-12-22 Applied Materials, Inc. Systems and methods utilizing solid-phase etchants
US10886137B2 (en) 2018-04-30 2021-01-05 Applied Materials, Inc. Selective nitride removal
US10892198B2 (en) 2018-09-14 2021-01-12 Applied Materials, Inc. Systems and methods for improved performance in semiconductor processing
US10903054B2 (en) 2017-12-19 2021-01-26 Applied Materials, Inc. Multi-zone gas distribution systems and methods
US10903052B2 (en) 2017-02-03 2021-01-26 Applied Materials, Inc. Systems and methods for radial and azimuthal control of plasma uniformity
US10920319B2 (en) 2019-01-11 2021-02-16 Applied Materials, Inc. Ceramic showerheads with conductive electrodes
US10920320B2 (en) 2017-06-16 2021-02-16 Applied Materials, Inc. Plasma health determination in semiconductor substrate processing reactors
CN112424904A (en) * 2018-08-14 2021-02-26 东京毅力科创株式会社 System and method for controlling plasma processing
US10943834B2 (en) 2017-03-13 2021-03-09 Applied Materials, Inc. Replacement contact process
US10964512B2 (en) 2018-02-15 2021-03-30 Applied Materials, Inc. Semiconductor processing chamber multistage mixing apparatus and methods
US11004689B2 (en) 2018-03-12 2021-05-11 Applied Materials, Inc. Thermal silicon etch
US11024486B2 (en) 2013-02-08 2021-06-01 Applied Materials, Inc. Semiconductor processing systems having multiple plasma configurations
US11049755B2 (en) 2018-09-14 2021-06-29 Applied Materials, Inc. Semiconductor substrate supports with embedded RF shield
WO2021134000A1 (en) * 2019-12-24 2021-07-01 Eagle Harbor Technologies, Inc. Nanosecond pulser rf isolation for plasma systems
US11062887B2 (en) 2018-09-17 2021-07-13 Applied Materials, Inc. High temperature RF heater pedestals
US11101136B2 (en) 2017-08-07 2021-08-24 Applied Materials, Inc. Process window widening using coated parts in plasma etch processes
US11101113B2 (en) 2015-03-17 2021-08-24 Applied Materials, Inc. Ion-ion plasma atomic layer etch process
US11121002B2 (en) 2018-10-24 2021-09-14 Applied Materials, Inc. Systems and methods for etching metals and metal derivatives
US20210296131A1 (en) * 2019-10-30 2021-09-23 Applied Materials, Inc. Methods and apparatus for processing a substrate
US11158527B2 (en) 2015-08-06 2021-10-26 Applied Materials, Inc. Thermal management systems and methods for wafer processing systems
WO2021222726A1 (en) * 2020-05-01 2021-11-04 Mattson Technology, Inc. Methods and apparatus for pulsed inductively coupled plasma for surface treatment processing
US11222767B2 (en) 2018-07-27 2022-01-11 Eagle Harbor Technologies, Inc. Nanosecond pulser bias compensation
US11227745B2 (en) 2018-08-10 2022-01-18 Eagle Harbor Technologies, Inc. Plasma sheath control for RF plasma reactors
US11239061B2 (en) 2014-11-26 2022-02-01 Applied Materials, Inc. Methods and systems to enhance process uniformity
US11239056B2 (en) 2019-07-29 2022-02-01 Advanced Energy Industries, Inc. Multiplexed power generator output with channel offsets for pulsed driving of multiple loads
US11264213B2 (en) 2012-09-21 2022-03-01 Applied Materials, Inc. Chemical control features in wafer process equipment
US11276590B2 (en) 2017-05-17 2022-03-15 Applied Materials, Inc. Multi-zone semiconductor substrate supports
US11276559B2 (en) 2017-05-17 2022-03-15 Applied Materials, Inc. Semiconductor processing chamber for multiple precursor flow
US11284500B2 (en) 2018-05-10 2022-03-22 Applied Materials, Inc. Method of controlling ion energy distribution using a pulse generator
US11302519B2 (en) * 2012-11-01 2022-04-12 Applied Materials, Inc. Method of patterning a low-k dielectric film
US11328909B2 (en) 2017-12-22 2022-05-10 Applied Materials, Inc. Chamber conditioning and removal processes
US11404246B2 (en) 2019-11-15 2022-08-02 Eagle Harbor Technologies, Inc. Nanosecond pulser bias compensation with correction
US11417534B2 (en) 2018-09-21 2022-08-16 Applied Materials, Inc. Selective material removal
US11430635B2 (en) 2018-07-27 2022-08-30 Eagle Harbor Technologies, Inc. Precise plasma control system
US11437242B2 (en) 2018-11-27 2022-09-06 Applied Materials, Inc. Selective removal of silicon-containing materials
US11462389B2 (en) 2020-07-31 2022-10-04 Applied Materials, Inc. Pulsed-voltage hardware assembly for use in a plasma processing system
US11476145B2 (en) 2018-11-20 2022-10-18 Applied Materials, Inc. Automatic ESC bias compensation when using pulsed DC bias
US11476090B1 (en) 2021-08-24 2022-10-18 Applied Materials, Inc. Voltage pulse time-domain multiplexing
US11476093B2 (en) 2015-08-27 2022-10-18 Applied Materials, Inc. Plasma etching systems and methods with secondary plasma injection
US11495470B1 (en) 2021-04-16 2022-11-08 Applied Materials, Inc. Method of enhancing etching selectivity using a pulsed plasma
US11508554B2 (en) 2019-01-24 2022-11-22 Applied Materials, Inc. High voltage filter assembly
US11532457B2 (en) 2018-07-27 2022-12-20 Eagle Harbor Technologies, Inc. Precise plasma control system
US11569066B2 (en) 2021-06-23 2023-01-31 Applied Materials, Inc. Pulsed voltage source for plasma processing applications
US11578407B2 (en) * 2018-05-21 2023-02-14 Tokyo Electron Limited Film-forming apparatus and film-forming method
US11587768B2 (en) 2018-07-27 2023-02-21 Eagle Harbor Technologies, Inc. Nanosecond pulser thermal management
US11594428B2 (en) 2015-02-03 2023-02-28 Applied Materials, Inc. Low temperature chuck for plasma processing systems
US11594400B2 (en) * 2011-11-23 2023-02-28 Lam Research Corporation Multi zone gas injection upper electrode system
US11670484B2 (en) 2018-11-30 2023-06-06 Eagle Harbor Technologies, Inc. Variable output impedance RF generator
US11682560B2 (en) 2018-10-11 2023-06-20 Applied Materials, Inc. Systems and methods for hafnium-containing film removal
US11694911B2 (en) * 2016-12-20 2023-07-04 Lam Research Corporation Systems and methods for metastable activated radical selective strip and etch using dual plenum showerhead
US11699572B2 (en) 2019-01-22 2023-07-11 Applied Materials, Inc. Feedback loop for controlling a pulsed voltage waveform
US11721527B2 (en) 2019-01-07 2023-08-08 Applied Materials, Inc. Processing chamber mixing systems
US11776788B2 (en) 2021-06-28 2023-10-03 Applied Materials, Inc. Pulsed voltage boost for substrate processing
US11791138B2 (en) 2021-05-12 2023-10-17 Applied Materials, Inc. Automatic electrostatic chuck bias compensation during plasma processing
US11798790B2 (en) 2020-11-16 2023-10-24 Applied Materials, Inc. Apparatus and methods for controlling ion energy distribution
US11810760B2 (en) 2021-06-16 2023-11-07 Applied Materials, Inc. Apparatus and method of ion current compensation
US11901157B2 (en) 2020-11-16 2024-02-13 Applied Materials, Inc. Apparatus and methods for controlling ion energy distribution
US11948780B2 (en) 2021-05-12 2024-04-02 Applied Materials, Inc. Automatic electrostatic chuck bias compensation during plasma processing

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130059448A1 (en) 2011-09-07 2013-03-07 Lam Research Corporation Pulsed Plasma Chamber in Dual Chamber Configuration
US9589799B2 (en) * 2013-09-30 2017-03-07 Lam Research Corporation High selectivity and low stress carbon hardmask by pulsed low frequency RF power
JP6247087B2 (en) * 2013-12-18 2017-12-13 東京エレクトロン株式会社 Processing apparatus and method for generating active species
JP6157385B2 (en) * 2014-03-11 2017-07-05 東京エレクトロン株式会社 Plasma processing apparatus and plasma processing method
US9865484B1 (en) * 2016-06-29 2018-01-09 Applied Materials, Inc. Selective etch using material modification and RF pulsing
US9773643B1 (en) * 2016-06-30 2017-09-26 Lam Research Corporation Apparatus and method for deposition and etch in gap fill
US10283330B2 (en) * 2016-07-25 2019-05-07 Lam Research Corporation Systems and methods for achieving a pre-determined factor associated with an edge region within a plasma chamber by synchronizing main and edge RF generators
US10262910B2 (en) * 2016-12-23 2019-04-16 Lam Research Corporation Method of feature exaction from time-series of spectra to control endpoint of process
CN108666197B (en) * 2017-03-31 2020-02-14 北京北方华创微电子装备有限公司 Pulse power source and semiconductor equipment
US20180358206A1 (en) * 2017-06-09 2018-12-13 Mattson Technology, Inc. Plasma Processing Apparatus
US10777386B2 (en) * 2017-10-17 2020-09-15 Lam Research Corporation Methods for controlling plasma glow discharge in a plasma chamber
KR102453450B1 (en) * 2017-10-23 2022-10-13 삼성전자주식회사 apparatus for processing plasma, manufacturing system of semiconductor device and manufacturing method of the same
JP7002921B2 (en) * 2017-11-10 2022-01-20 東京エレクトロン株式会社 Board processing method and board processing equipment
KR101886755B1 (en) * 2017-11-17 2018-08-09 한국원자력연구원 Systems and methods for continuously supplying negative ions using multi-pulsed plasma sources
CN107979910B (en) * 2017-11-29 2020-06-05 中国人民解放军陆军工程大学 Active control method for surface potential of dielectric material in high vacuum environment
JP2021509525A (en) * 2017-12-27 2021-03-25 マトソン テクノロジー インコーポレイテッドMattson Technology, Inc. Plasma processing equipment and methods
WO2019143474A1 (en) * 2018-01-18 2019-07-25 Applied Materials, Inc. Etching apparatus and methods
US11069514B2 (en) * 2018-07-27 2021-07-20 Applied Materials, Inc. Remote capacitively coupled plasma source with improved ion blocker
WO2020243342A1 (en) 2019-05-29 2020-12-03 Lam Research Corporation High selectivity, low stress, and low hydrogen diamond-like carbon hardmasks by high power pulsed low frequency rf
KR20220103781A (en) * 2019-11-27 2022-07-22 어플라이드 머티어리얼스, 인코포레이티드 processing chamber with multiple plasma units
CN113838730A (en) * 2020-06-08 2021-12-24 中微半导体设备(上海)股份有限公司 Gas shield ring, plasma processing apparatus and method for regulating and controlling polymer distribution
US11189462B1 (en) 2020-07-21 2021-11-30 Tokyo Electron Limited Ion stratification using bias pulses of short duration
TW202309969A (en) * 2021-05-06 2023-03-01 日商東京威力科創股份有限公司 Plasma processing apparatus and endpoint detection method
WO2023042857A1 (en) * 2021-09-15 2023-03-23 東京エレクトロン株式会社 Plasma treatment device
WO2024023877A1 (en) * 2022-07-25 2024-02-01 株式会社日立ハイテク Plasma processing method

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6013580A (en) * 1995-01-31 2000-01-11 Sony Corporation Preprocessing method of metal film forming process
US6162323A (en) * 1997-08-12 2000-12-19 Tokyo Electron Yamanashi Limited Plasma processing apparatus
US6214162B1 (en) * 1996-09-27 2001-04-10 Tokyo Electron Limited Plasma processing apparatus
US20040221958A1 (en) * 2003-05-06 2004-11-11 Lam Research Corporation RF pulsing of a narrow gap capacitively coupled reactor
US20050025791A1 (en) * 2002-06-21 2005-02-03 Julius Remenar Pharmaceutical compositions with improved dissolution
US6851384B2 (en) * 2000-06-29 2005-02-08 Nec Corporation Remote plasma apparatus for processing substrate with two types of gases
US20070000611A1 (en) * 2003-10-28 2007-01-04 Applied Materials, Inc. Plasma control using dual cathode frequency mixing
US20070247073A1 (en) * 2006-04-24 2007-10-25 Applied Materials, Inc. Plasma reactor apparatus with a VHF capacitively coupled plasma source of variable frequency
US20080178805A1 (en) * 2006-12-05 2008-07-31 Applied Materials, Inc. Mid-chamber gas distribution plate, tuned plasma flow control grid and electrode
US7695590B2 (en) * 2004-03-26 2010-04-13 Applied Materials, Inc. Chemical vapor deposition plasma reactor having plural ion shower grids

Family Cites Families (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4263088A (en) * 1979-06-25 1981-04-21 Motorola, Inc. Method for process control of a plasma reaction
US5367139A (en) * 1989-10-23 1994-11-22 International Business Machines Corporation Methods and apparatus for contamination control in plasma processing
JPH0689880A (en) * 1992-09-08 1994-03-29 Tokyo Electron Ltd Etching equipment
JP2764524B2 (en) * 1993-09-28 1998-06-11 名古屋大学長 Radical control device
JPH0845858A (en) * 1994-07-27 1996-02-16 Sony Corp Plasma treatment system
US6794301B2 (en) * 1995-10-13 2004-09-21 Mattson Technology, Inc. Pulsed plasma processing of semiconductor substrates
JP3386651B2 (en) * 1996-04-03 2003-03-17 株式会社東芝 Semiconductor device manufacturing method and semiconductor manufacturing apparatus
JP3561080B2 (en) * 1996-04-23 2004-09-02 松下電器産業株式会社 Plasma processing apparatus and plasma processing method
EP0821395A3 (en) * 1996-07-19 1998-03-25 Tokyo Electron Limited Plasma processing apparatus
JPH1079372A (en) * 1996-09-03 1998-03-24 Matsushita Electric Ind Co Ltd Plasma treating method and plasma treating equipment
JPH11219938A (en) * 1998-02-02 1999-08-10 Matsushita Electron Corp Plasma etching method
JP4212210B2 (en) * 1999-12-07 2009-01-21 株式会社小松製作所 Surface treatment equipment
US6350317B1 (en) * 1999-12-30 2002-02-26 Lam Research Corporation Linear drive system for use in a plasma processing system
US6261408B1 (en) * 2000-02-16 2001-07-17 Applied Materials, Inc. Method and apparatus for semiconductor processing chamber pressure control
JP2001332534A (en) * 2000-05-25 2001-11-30 Matsushita Electric Ind Co Ltd Plasma processing method and plasma processing apparatus
US7037813B2 (en) * 2000-08-11 2006-05-02 Applied Materials, Inc. Plasma immersion ion implantation process using a capacitively coupled plasma source having low dissociation and low minimum plasma voltage
US6492774B1 (en) * 2000-10-04 2002-12-10 Lam Research Corporation Wafer area pressure control for plasma confinement
US20030013314A1 (en) * 2001-07-06 2003-01-16 Chentsau Ying Method of reducing particulates in a plasma etch chamber during a metal etch process
WO2003054912A1 (en) * 2001-12-20 2003-07-03 Tokyo Electron Limited Method and apparatus comprising a magnetic filter for plasma processing a workpiece
US20040025791A1 (en) * 2002-08-09 2004-02-12 Applied Materials, Inc. Etch chamber with dual frequency biasing sources and a single frequency plasma generating source
JP2004153240A (en) * 2002-10-09 2004-05-27 Advanced Lcd Technologies Development Center Co Ltd Plasma processing apparatus
US7144521B2 (en) * 2003-08-22 2006-12-05 Lam Research Corporation High aspect ratio etch using modulation of RF powers of various frequencies
US20050103265A1 (en) * 2003-11-19 2005-05-19 Applied Materials, Inc., A Delaware Corporation Gas distribution showerhead featuring exhaust apertures
US7740737B2 (en) * 2004-06-21 2010-06-22 Tokyo Electron Limited Plasma processing apparatus and method
US7381291B2 (en) * 2004-07-29 2008-06-03 Asm Japan K.K. Dual-chamber plasma processing apparatus
US7364623B2 (en) * 2005-01-27 2008-04-29 Lam Research Corporation Confinement ring drive
US7829243B2 (en) * 2005-01-27 2010-11-09 Applied Materials, Inc. Method for plasma etching a chromium layer suitable for photomask fabrication
JP2007088199A (en) * 2005-09-22 2007-04-05 Canon Inc Processing equipment
US20070264427A1 (en) * 2005-12-21 2007-11-15 Asm Japan K.K. Thin film formation by atomic layer growth and chemical vapor deposition
US8192576B2 (en) * 2006-09-20 2012-06-05 Lam Research Corporation Methods of and apparatus for measuring and controlling wafer potential in pulsed RF bias processing
US8043430B2 (en) * 2006-12-20 2011-10-25 Lam Research Corporation Methods and apparatuses for controlling gas flow conductance in a capacitively-coupled plasma processing chamber
US20090277587A1 (en) * 2008-05-09 2009-11-12 Applied Materials, Inc. Flowable dielectric equipment and processes
US8357435B2 (en) * 2008-05-09 2013-01-22 Applied Materials, Inc. Flowable dielectric equipment and processes
US9493875B2 (en) * 2008-09-30 2016-11-15 Eugene Technology Co., Ltd. Shower head unit and chemical vapor deposition apparatus
US8043434B2 (en) * 2008-10-23 2011-10-25 Lam Research Corporation Method and apparatus for removing photoresist
JP5221403B2 (en) * 2009-01-26 2013-06-26 東京エレクトロン株式会社 Plasma etching method, plasma etching apparatus and storage medium
US8475673B2 (en) * 2009-04-24 2013-07-02 Lam Research Company Method and apparatus for high aspect ratio dielectric etch
US9287086B2 (en) * 2010-04-26 2016-03-15 Advanced Energy Industries, Inc. System, method and apparatus for controlling ion energy distribution
US8749053B2 (en) * 2009-06-23 2014-06-10 Intevac, Inc. Plasma grid implant system for use in solar cell fabrications
US8404598B2 (en) * 2009-08-07 2013-03-26 Applied Materials, Inc. Synchronized radio frequency pulsing for plasma etching
US20110073257A1 (en) * 2009-09-28 2011-03-31 Rajinder Dhindsa Unitized confinement ring arrangements and methods thereof
US20110177694A1 (en) * 2010-01-15 2011-07-21 Tokyo Electron Limited Switchable Neutral Beam Source
US9190289B2 (en) * 2010-02-26 2015-11-17 Lam Research Corporation System, method and apparatus for plasma etch having independent control of ion generation and dissociation of process gas
US20130059448A1 (en) * 2011-09-07 2013-03-07 Lam Research Corporation Pulsed Plasma Chamber in Dual Chamber Configuration
US9793126B2 (en) * 2010-08-04 2017-10-17 Lam Research Corporation Ion to neutral control for wafer processing with dual plasma source reactor
US9184028B2 (en) * 2010-08-04 2015-11-10 Lam Research Corporation Dual plasma volume processing apparatus for neutral/ion flux control
US20130168352A1 (en) * 2011-12-28 2013-07-04 Andreas Fischer Methods and apparatuses for controlling plasma properties by controlling conductance between sub-chambers of a plasma processing chamber
US9881772B2 (en) * 2012-03-28 2018-01-30 Lam Research Corporation Multi-radiofrequency impedance control for plasma uniformity tuning
US9255326B2 (en) * 2013-03-12 2016-02-09 Novellus Systems, Inc. Systems and methods for remote plasma atomic layer deposition
US9425058B2 (en) * 2014-07-24 2016-08-23 Applied Materials, Inc. Simplified litho-etch-litho-etch process

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6013580A (en) * 1995-01-31 2000-01-11 Sony Corporation Preprocessing method of metal film forming process
US6214162B1 (en) * 1996-09-27 2001-04-10 Tokyo Electron Limited Plasma processing apparatus
US6162323A (en) * 1997-08-12 2000-12-19 Tokyo Electron Yamanashi Limited Plasma processing apparatus
US6851384B2 (en) * 2000-06-29 2005-02-08 Nec Corporation Remote plasma apparatus for processing substrate with two types of gases
US20050025791A1 (en) * 2002-06-21 2005-02-03 Julius Remenar Pharmaceutical compositions with improved dissolution
US20040221958A1 (en) * 2003-05-06 2004-11-11 Lam Research Corporation RF pulsing of a narrow gap capacitively coupled reactor
US20070000611A1 (en) * 2003-10-28 2007-01-04 Applied Materials, Inc. Plasma control using dual cathode frequency mixing
US7695590B2 (en) * 2004-03-26 2010-04-13 Applied Materials, Inc. Chemical vapor deposition plasma reactor having plural ion shower grids
US20070247073A1 (en) * 2006-04-24 2007-10-25 Applied Materials, Inc. Plasma reactor apparatus with a VHF capacitively coupled plasma source of variable frequency
US20080178805A1 (en) * 2006-12-05 2008-07-31 Applied Materials, Inc. Mid-chamber gas distribution plate, tuned plasma flow control grid and electrode

Cited By (149)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9793126B2 (en) 2010-08-04 2017-10-17 Lam Research Corporation Ion to neutral control for wafer processing with dual plasma source reactor
US20130023064A1 (en) * 2011-07-21 2013-01-24 Lam Research Corporation Negative Ion Control for Dielectric Etch
US9117767B2 (en) * 2011-07-21 2015-08-25 Lam Research Corporation Negative ion control for dielectric etch
US9083182B2 (en) 2011-11-21 2015-07-14 Lam Research Corporation Bypass capacitors for high voltage bias power in the mid frequency RF range
US9508530B2 (en) 2011-11-21 2016-11-29 Lam Research Corporation Plasma processing chamber with flexible symmetric RF return strap
US9396908B2 (en) 2011-11-22 2016-07-19 Lam Research Corporation Systems and methods for controlling a plasma edge region
US10586686B2 (en) 2011-11-22 2020-03-10 Law Research Corporation Peripheral RF feed and symmetric RF return for symmetric RF delivery
US11127571B2 (en) 2011-11-22 2021-09-21 Lam Research Corporation Peripheral RF feed and symmetric RF return for symmetric RF delivery
US10622195B2 (en) * 2011-11-22 2020-04-14 Lam Research Corporation Multi zone gas injection upper electrode system
US20130126486A1 (en) * 2011-11-22 2013-05-23 Ryan Bise Multi Zone Gas Injection Upper Electrode System
US9263240B2 (en) 2011-11-22 2016-02-16 Lam Research Corporation Dual zone temperature control of upper electrodes
US11594400B2 (en) * 2011-11-23 2023-02-28 Lam Research Corporation Multi zone gas injection upper electrode system
US9039911B2 (en) 2012-08-27 2015-05-26 Lam Research Corporation Plasma-enhanced etching in an augmented plasma processing system
US9418859B2 (en) 2012-08-27 2016-08-16 Lam Research Corporation Plasma-enhanced etching in an augmented plasma processing system
US11264213B2 (en) 2012-09-21 2022-03-01 Applied Materials, Inc. Chemical control features in wafer process equipment
US20150332941A1 (en) * 2012-10-09 2015-11-19 Applied Materials, Inc. Methods and apparatus for processing substrates using an ion shield
US11302519B2 (en) * 2012-11-01 2022-04-12 Applied Materials, Inc. Method of patterning a low-k dielectric film
US11024486B2 (en) 2013-02-08 2021-06-01 Applied Materials, Inc. Semiconductor processing systems having multiple plasma configurations
US9245761B2 (en) 2013-04-05 2016-01-26 Lam Research Corporation Internal plasma grid for semiconductor fabrication
US9633846B2 (en) 2013-04-05 2017-04-25 Lam Research Corporation Internal plasma grid applications for semiconductor fabrication
US11171021B2 (en) * 2013-04-05 2021-11-09 Lam Research Corporation Internal plasma grid for semiconductor fabrication
KR102270841B1 (en) * 2013-04-05 2021-06-29 램 리써치 코포레이션 Internal plasma grid for semiconductor fabrication
US20160141188A1 (en) * 2013-04-05 2016-05-19 Lam Research Corporation Internal plasma grid for semiconductor fabrication
KR20140121367A (en) * 2013-04-05 2014-10-15 램 리써치 코포레이션 Internal plasma grid for semiconductor fabrication
US10224221B2 (en) 2013-04-05 2019-03-05 Lam Research Corporation Internal plasma grid for semiconductor fabrication
US9230819B2 (en) 2013-04-05 2016-01-05 Lam Research Corporation Internal plasma grid applications for semiconductor fabrication in context of ion-ion plasma processing
US20170009348A1 (en) * 2013-07-03 2017-01-12 Lam Research Corporation Chemical Deposition Apparatus Having Conductance Control
US9017526B2 (en) 2013-07-08 2015-04-28 Lam Research Corporation Ion beam etching system
US9257295B2 (en) 2013-07-08 2016-02-09 Lam Research Corporation Ion beam etching system
US9147581B2 (en) 2013-07-11 2015-09-29 Lam Research Corporation Dual chamber plasma etcher with ion accelerator
US9431269B2 (en) 2013-07-11 2016-08-30 Lam Research Corporation Dual chamber plasma etcher with ion accelerator
US10134605B2 (en) 2013-07-11 2018-11-20 Lam Research Corporation Dual chamber plasma etcher with ion accelerator
US10249476B2 (en) 2013-10-01 2019-04-02 Lam Research Corporation Control of impedance of RF return path
US20150091441A1 (en) * 2013-10-01 2015-04-02 Lam Research Corporation Control of Impedance of RF Delivery Path
US9401264B2 (en) * 2013-10-01 2016-07-26 Lam Research Corporation Control of impedance of RF delivery path
US20150325413A1 (en) * 2014-05-12 2015-11-12 Moojin Kim Plasma apparatus and method of fabricating semiconductor device using the same
US9490107B2 (en) * 2014-05-12 2016-11-08 Samsung Electronics Co., Ltd. Plasma apparatus and method of fabricating semiconductor device using the same
US9704690B2 (en) 2014-08-19 2017-07-11 Samsung Electronics Co., Ltd. Plasma apparatus and method of operating the same
US10490418B2 (en) 2014-10-14 2019-11-26 Applied Materials, Inc. Systems and methods for internal surface conditioning assessment in plasma processing equipment
US10593523B2 (en) 2014-10-14 2020-03-17 Applied Materials, Inc. Systems and methods for internal surface conditioning in plasma processing equipment
US10796922B2 (en) 2014-10-14 2020-10-06 Applied Materials, Inc. Systems and methods for internal surface conditioning assessment in plasma processing equipment
US10707061B2 (en) 2014-10-14 2020-07-07 Applied Materials, Inc. Systems and methods for internal surface conditioning in plasma processing equipment
US11239061B2 (en) 2014-11-26 2022-02-01 Applied Materials, Inc. Methods and systems to enhance process uniformity
US11637002B2 (en) 2014-11-26 2023-04-25 Applied Materials, Inc. Methods and systems to enhance process uniformity
US10573496B2 (en) 2014-12-09 2020-02-25 Applied Materials, Inc. Direct outlet toroidal plasma source
US9793104B2 (en) 2015-01-29 2017-10-17 Aixtron Se Preparing a semiconductor surface for epitaxial deposition
US11594428B2 (en) 2015-02-03 2023-02-28 Applied Materials, Inc. Low temperature chuck for plasma processing systems
US11101113B2 (en) 2015-03-17 2021-08-24 Applied Materials, Inc. Ion-ion plasma atomic layer etch process
US20160293386A1 (en) * 2015-04-03 2016-10-06 Tokyo Electron Limited Energetic negative ion impact ionization plasma
US9799494B2 (en) * 2015-04-03 2017-10-24 Tokyo Electron Limited Energetic negative ion impact ionization plasma
US20180363141A1 (en) * 2015-05-04 2018-12-20 Sidel Participations Facility for treating containers by microwave plasma, comprising a solid-state generator and adjustment method
US9793097B2 (en) 2015-07-27 2017-10-17 Lam Research Corporation Time varying segmented pressure control
US11158527B2 (en) 2015-08-06 2021-10-26 Applied Materials, Inc. Thermal management systems and methods for wafer processing systems
US10607867B2 (en) 2015-08-06 2020-03-31 Applied Materials, Inc. Bolted wafer chuck thermal management systems and methods for wafer processing systems
US10424463B2 (en) * 2015-08-07 2019-09-24 Applied Materials, Inc. Oxide etch selectivity systems and methods
US10424464B2 (en) * 2015-08-07 2019-09-24 Applied Materials, Inc. Oxide etch selectivity systems and methods
US11476093B2 (en) 2015-08-27 2022-10-18 Applied Materials, Inc. Plasma etching systems and methods with secondary plasma injection
US20180254170A1 (en) * 2015-08-31 2018-09-06 Total S.A. Plasma generating apparatus and method of manufacturing patterned devices using spatially resolved plasma processing
US20170098549A1 (en) * 2015-10-02 2017-04-06 Applied Materials, Inc. Methods for atomic level resolution and plasma processing control
US9978606B2 (en) * 2015-10-02 2018-05-22 Applied Materials, Inc. Methods for atomic level resolution and plasma processing control
US11735441B2 (en) 2016-05-19 2023-08-22 Applied Materials, Inc. Systems and methods for improved semiconductor etching and component protection
US10522371B2 (en) 2016-05-19 2019-12-31 Applied Materials, Inc. Systems and methods for improved semiconductor etching and component protection
US10504754B2 (en) 2016-05-19 2019-12-10 Applied Materials, Inc. Systems and methods for improved semiconductor etching and component protection
US10629473B2 (en) 2016-09-09 2020-04-21 Applied Materials, Inc. Footing removal for nitride spacer
US10541113B2 (en) 2016-10-04 2020-01-21 Applied Materials, Inc. Chamber with flow-through source
US11049698B2 (en) 2016-10-04 2021-06-29 Applied Materials, Inc. Dual-channel showerhead with improved profile
US10546729B2 (en) 2016-10-04 2020-01-28 Applied Materials, Inc. Dual-channel showerhead with improved profile
US10770346B2 (en) 2016-11-11 2020-09-08 Applied Materials, Inc. Selective cobalt removal for bottom up gapfill
US10600639B2 (en) 2016-11-14 2020-03-24 Applied Materials, Inc. SiN spacer profile patterning
US11694911B2 (en) * 2016-12-20 2023-07-04 Lam Research Corporation Systems and methods for metastable activated radical selective strip and etch using dual plenum showerhead
US10242845B2 (en) 2017-01-17 2019-03-26 Lam Research Corporation Near-substrate supplemental plasma density generation with low bias voltage within inductively coupled plasma processing chamber
WO2018136121A1 (en) * 2017-01-17 2018-07-26 Lam Research Corporation Near-substrate supplemental plasma density generation with low bias voltage within inductively coupled plasma processing chamber
US10903052B2 (en) 2017-02-03 2021-01-26 Applied Materials, Inc. Systems and methods for radial and azimuthal control of plasma uniformity
US10529737B2 (en) 2017-02-08 2020-01-07 Applied Materials, Inc. Accommodating imperfectly aligned memory holes
US10943834B2 (en) 2017-03-13 2021-03-09 Applied Materials, Inc. Replacement contact process
US11915950B2 (en) 2017-05-17 2024-02-27 Applied Materials, Inc. Multi-zone semiconductor substrate supports
US11276590B2 (en) 2017-05-17 2022-03-15 Applied Materials, Inc. Multi-zone semiconductor substrate supports
US11361939B2 (en) 2017-05-17 2022-06-14 Applied Materials, Inc. Semiconductor processing chamber for multiple precursor flow
US11276559B2 (en) 2017-05-17 2022-03-15 Applied Materials, Inc. Semiconductor processing chamber for multiple precursor flow
US10920320B2 (en) 2017-06-16 2021-02-16 Applied Materials, Inc. Plasma health determination in semiconductor substrate processing reactors
US10541246B2 (en) 2017-06-26 2020-01-21 Applied Materials, Inc. 3D flash memory cells which discourage cross-cell electrical tunneling
CN109216160A (en) * 2017-06-29 2019-01-15 朗姆研究公司 Edge roughness reduces
US10727080B2 (en) 2017-07-07 2020-07-28 Applied Materials, Inc. Tantalum-containing material removal
US10541184B2 (en) 2017-07-11 2020-01-21 Applied Materials, Inc. Optical emission spectroscopic techniques for monitoring etching
US10593553B2 (en) 2017-08-04 2020-03-17 Applied Materials, Inc. Germanium etching systems and methods
US11101136B2 (en) 2017-08-07 2021-08-24 Applied Materials, Inc. Process window widening using coated parts in plasma etch processes
US10395894B2 (en) * 2017-08-31 2019-08-27 Lam Research Corporation Systems and methods for achieving peak ion energy enhancement with a low angular spread
US10510575B2 (en) * 2017-09-20 2019-12-17 Applied Materials, Inc. Substrate support with multiple embedded electrodes
CN111434039A (en) * 2017-12-07 2020-07-17 朗姆研究公司 Intra-pulse RF pulses for semiconductor RF plasma processing
US10903054B2 (en) 2017-12-19 2021-01-26 Applied Materials, Inc. Multi-zone gas distribution systems and methods
US11328909B2 (en) 2017-12-22 2022-05-10 Applied Materials, Inc. Chamber conditioning and removal processes
US10861676B2 (en) 2018-01-08 2020-12-08 Applied Materials, Inc. Metal recess for semiconductor structures
US10854426B2 (en) 2018-01-08 2020-12-01 Applied Materials, Inc. Metal recess for semiconductor structures
US10679870B2 (en) 2018-02-15 2020-06-09 Applied Materials, Inc. Semiconductor processing chamber multistage mixing apparatus
US10699921B2 (en) 2018-02-15 2020-06-30 Applied Materials, Inc. Semiconductor processing chamber multistage mixing apparatus
US10964512B2 (en) 2018-02-15 2021-03-30 Applied Materials, Inc. Semiconductor processing chamber multistage mixing apparatus and methods
US10615047B2 (en) 2018-02-28 2020-04-07 Applied Materials, Inc. Systems and methods to form airgaps
US10593560B2 (en) 2018-03-01 2020-03-17 Applied Materials, Inc. Magnetic induction plasma source for semiconductor processes and equipment
US11004689B2 (en) 2018-03-12 2021-05-11 Applied Materials, Inc. Thermal silicon etch
US10497573B2 (en) 2018-03-13 2019-12-03 Applied Materials, Inc. Selective atomic layer etching of semiconductor materials
US10573527B2 (en) 2018-04-06 2020-02-25 Applied Materials, Inc. Gas-phase selective etching systems and methods
US10490406B2 (en) 2018-04-10 2019-11-26 Appled Materials, Inc. Systems and methods for material breakthrough
US10699879B2 (en) 2018-04-17 2020-06-30 Applied Materials, Inc. Two piece electrode assembly with gap for plasma control
US10886137B2 (en) 2018-04-30 2021-01-05 Applied Materials, Inc. Selective nitride removal
US11284500B2 (en) 2018-05-10 2022-03-22 Applied Materials, Inc. Method of controlling ion energy distribution using a pulse generator
US11578407B2 (en) * 2018-05-21 2023-02-14 Tokyo Electron Limited Film-forming apparatus and film-forming method
US10872778B2 (en) 2018-07-06 2020-12-22 Applied Materials, Inc. Systems and methods utilizing solid-phase etchants
US10755941B2 (en) 2018-07-06 2020-08-25 Applied Materials, Inc. Self-limiting selective etching systems and methods
US10672642B2 (en) 2018-07-24 2020-06-02 Applied Materials, Inc. Systems and methods for pedestal configuration
US11430635B2 (en) 2018-07-27 2022-08-30 Eagle Harbor Technologies, Inc. Precise plasma control system
US11532457B2 (en) 2018-07-27 2022-12-20 Eagle Harbor Technologies, Inc. Precise plasma control system
US11222767B2 (en) 2018-07-27 2022-01-11 Eagle Harbor Technologies, Inc. Nanosecond pulser bias compensation
US11587768B2 (en) 2018-07-27 2023-02-21 Eagle Harbor Technologies, Inc. Nanosecond pulser thermal management
US10811381B2 (en) 2018-08-03 2020-10-20 Samsung Electronics Co., Ltd. Wafer to wafer bonding method and wafer to wafer bonding system
US11227745B2 (en) 2018-08-10 2022-01-18 Eagle Harbor Technologies, Inc. Plasma sheath control for RF plasma reactors
CN112424904A (en) * 2018-08-14 2021-02-26 东京毅力科创株式会社 System and method for controlling plasma processing
US11049755B2 (en) 2018-09-14 2021-06-29 Applied Materials, Inc. Semiconductor substrate supports with embedded RF shield
US10892198B2 (en) 2018-09-14 2021-01-12 Applied Materials, Inc. Systems and methods for improved performance in semiconductor processing
US11062887B2 (en) 2018-09-17 2021-07-13 Applied Materials, Inc. High temperature RF heater pedestals
US11417534B2 (en) 2018-09-21 2022-08-16 Applied Materials, Inc. Selective material removal
US11682560B2 (en) 2018-10-11 2023-06-20 Applied Materials, Inc. Systems and methods for hafnium-containing film removal
US11121002B2 (en) 2018-10-24 2021-09-14 Applied Materials, Inc. Systems and methods for etching metals and metal derivatives
US11476145B2 (en) 2018-11-20 2022-10-18 Applied Materials, Inc. Automatic ESC bias compensation when using pulsed DC bias
US11437242B2 (en) 2018-11-27 2022-09-06 Applied Materials, Inc. Selective removal of silicon-containing materials
US11670484B2 (en) 2018-11-30 2023-06-06 Eagle Harbor Technologies, Inc. Variable output impedance RF generator
US11721527B2 (en) 2019-01-07 2023-08-08 Applied Materials, Inc. Processing chamber mixing systems
US10920319B2 (en) 2019-01-11 2021-02-16 Applied Materials, Inc. Ceramic showerheads with conductive electrodes
US11699572B2 (en) 2019-01-22 2023-07-11 Applied Materials, Inc. Feedback loop for controlling a pulsed voltage waveform
US11508554B2 (en) 2019-01-24 2022-11-22 Applied Materials, Inc. High voltage filter assembly
US11239056B2 (en) 2019-07-29 2022-02-01 Advanced Energy Industries, Inc. Multiplexed power generator output with channel offsets for pulsed driving of multiple loads
US20210296131A1 (en) * 2019-10-30 2021-09-23 Applied Materials, Inc. Methods and apparatus for processing a substrate
US11404246B2 (en) 2019-11-15 2022-08-02 Eagle Harbor Technologies, Inc. Nanosecond pulser bias compensation with correction
WO2021134000A1 (en) * 2019-12-24 2021-07-01 Eagle Harbor Technologies, Inc. Nanosecond pulser rf isolation for plasma systems
US11527383B2 (en) 2019-12-24 2022-12-13 Eagle Harbor Technologies, Inc. Nanosecond pulser RF isolation for plasma systems
WO2021222726A1 (en) * 2020-05-01 2021-11-04 Mattson Technology, Inc. Methods and apparatus for pulsed inductively coupled plasma for surface treatment processing
US11848176B2 (en) 2020-07-31 2023-12-19 Applied Materials, Inc. Plasma processing using pulsed-voltage and radio-frequency power
US11776789B2 (en) 2020-07-31 2023-10-03 Applied Materials, Inc. Plasma processing assembly using pulsed-voltage and radio-frequency power
US11462389B2 (en) 2020-07-31 2022-10-04 Applied Materials, Inc. Pulsed-voltage hardware assembly for use in a plasma processing system
US11462388B2 (en) 2020-07-31 2022-10-04 Applied Materials, Inc. Plasma processing assembly using pulsed-voltage and radio-frequency power
US11798790B2 (en) 2020-11-16 2023-10-24 Applied Materials, Inc. Apparatus and methods for controlling ion energy distribution
US11901157B2 (en) 2020-11-16 2024-02-13 Applied Materials, Inc. Apparatus and methods for controlling ion energy distribution
US11495470B1 (en) 2021-04-16 2022-11-08 Applied Materials, Inc. Method of enhancing etching selectivity using a pulsed plasma
US11791138B2 (en) 2021-05-12 2023-10-17 Applied Materials, Inc. Automatic electrostatic chuck bias compensation during plasma processing
US11948780B2 (en) 2021-05-12 2024-04-02 Applied Materials, Inc. Automatic electrostatic chuck bias compensation during plasma processing
US11810760B2 (en) 2021-06-16 2023-11-07 Applied Materials, Inc. Apparatus and method of ion current compensation
US11569066B2 (en) 2021-06-23 2023-01-31 Applied Materials, Inc. Pulsed voltage source for plasma processing applications
US11887813B2 (en) 2021-06-23 2024-01-30 Applied Materials, Inc. Pulsed voltage source for plasma processing
US11776788B2 (en) 2021-06-28 2023-10-03 Applied Materials, Inc. Pulsed voltage boost for substrate processing
US11476090B1 (en) 2021-08-24 2022-10-18 Applied Materials, Inc. Voltage pulse time-domain multiplexing

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