US3345610A - Signal detection apparatus - Google Patents
Signal detection apparatus Download PDFInfo
- Publication number
- US3345610A US3345610A US356143A US35614364A US3345610A US 3345610 A US3345610 A US 3345610A US 356143 A US356143 A US 356143A US 35614364 A US35614364 A US 35614364A US 3345610 A US3345610 A US 3345610A
- Authority
- US
- United States
- Prior art keywords
- potential
- signal
- signals
- output
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/085—Error detection or correction by redundancy in data representation, e.g. by using checking codes using codes with inherent redundancy, e.g. n-out-of-m codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M11/00—Coding in connection with keyboards or like devices, i.e. coding of the position of operated keys
- H03M11/22—Static coding
Definitions
- ABSTRACT OF THE DISCLOSURE accumulating device ABSTRACT OF THE DISCLOSURE accumulating device.
- This invention pertains to signal transfer apparatus and more particularly to apparatus for detecting the simultaneous presence of signals from more than one of a plurality of sources.
- the invention contemplates apparatus which includes a plurality of signal sources which transmit sub stantially equiamplitude signals to a utilization device and includes means for indicating the simultaneous transmission of signals by more than one of the plurality of sources.
- the indicating means comprises a signal generating means with a plurality of inputs for receiving the aquiamplitude signals from the signal sources.
- the signal generating means includes means for generating a signal having a first amplitude when a signal is received by only one of the inputs and for generating a signal at least equal to a second amplitude when signals are received by two or more of the inputs.
- the signal generating means further includes an output for transmitting the generated signals to a signal threshold detection means.
- the signal threshold means transmits an indicating signal whenever it receives a signal having an amplitude between the first and second amplitudes.
- Switch 2A has an input terminal 2A1 connected to source of potential 0V, an output terminal 2A0 connected via hold down resistor 2AR to a source or negative potential 6V, and a bridging contact ZAC.
- switch 2A When switch 2A is open, as shown, the output terminal 2A0 is at the negative six volt potential and no signal is said to be transmitted therefrom.
- switch 2A is closed (bridging contact 2AC connecting input terminal 2AI to output terminal 2A0) output terminal 2A0 is at ground potential and is said to be transmitting a signal.
- Switches 2 can, for example, be key operated wherein the switches and associated keys are of a set included in a clerk-operated ticket issuing machine of a parimutual system. Each key is associated with a different animal in a contest.
- each switch 2 is connected via line 4, agate 6 and a line 8 to an accumulator 10.
- an accumulator 10 During normal operation it can be assumed that there is a direct connection between the lines 4 via the gates 6 to lines 8. Accordingly, each time a switch 2 is closed one of the accumulators 10 associated with the closed switch accumulates a signal. If each signal received represents a transaction then the accumulator keeps a count of the transactions.
- the accumulators 10 can be any conventional accumulators such as cascaded binary counters or other registers employed in the digital computer art.
- a signal generating means 12 feeding a signal threshold detector 14 which transmits signals to error indicator 16 and via invertor 17 and line 18 to control inputs 20 of gates 6. Wherifa'signal is present on only one of the lines 4 signal generating means 12 transmits a signal of a first amplitude from its output terminal 13 to signal threshold detector 14; however, if signals are present on more than one of the lines 4 signal generating means 12 transmits a signal at least equal a second amplitude to threshold detector 14. Threshold detector 15 normally transmits a signal, i.e. is at ground potential representing logical 1.
- Signal generating means 12 includes a plurality of inputs connected to lines 4. Each input has a serially connected diode 22 and resistor 24. The anodes of diodes 22 are respectively connected to lines 4 and the cathodes are respectively connected to one end of resistors 24. The other ends of resistors 24 are connected together at junction 26. Junction 26 is connected via resistor 28 to source of negative potential 26V. A potential divider including serially connected resistors 30 and 32 connect junction 26 to source of positive potential 20V. The output 34 of the potential divider is connected to the input of emitter-follower amplifier 36.
- Amplifier 36 includes a PNP transistor T1 having a base connected to output 34, a collector connected to source of negative potential 8.2V and an emitter connected via resistor 38 to source of potential V and via resistor 40 to source of positive potential 20V. Junction 13 connected to the emitter of transistor T1 is the output of emitter-follower amplifier 36.
- junction 26 When no signals are present on any lines 4, i.e. they are at a potential of minus six volts, junction 26 is at a potential of less than minus six volts. If a signal is present on one of the lines 4, say line 4A is at ground potential, then by virtue, primarily, of the divider action of resistors 24A and 28, junction 26 will be at a first potential of approximately minus six volts. If signals are present on two lines, say lines 4A and 4B are both at ground potential, then junction 26 is approximately at a second potential of minus 3.6 volts. For good signal discrimination it is desirable to consider the changeover point from the one signal condition to the more than one signal condition to be a potential of about minus five volts.
- junction 26 when junction 26 is below a potential of minus five volts this indicates only one of the lines 4 is transmitting a signal and when above this potential more than one of the lines 4 is transmitting a signal.
- the resistors 30 and 32 are chosen to shift this changeover point at output 34 to a negative potential of about 0.25 volts because of the sensitivity of threshold detector 14.
- Emitterfollower amplifier 36 merely provides without level shifting or signal attenuation a high impedance load for junction 26.
- Threshold detector 14 is designed to transmit a signal (ground potential representing logical 1) as long as it receives a signal of less than minus 0.25 volt potential and to transmit no signal (minus six volt potential representing logical 0) when it receives a signal of greater than minus 0.25 volt potential.
- Detector 14 includes a transistor T2 having a very narrow active region from the cut-off state to the full-on state.
- Transistor T2 of the PNP type has a base connected via current limiting resistor 42 to output 13, an emitter connected to ground potential and a collector connected via resistor 44 to source of negative potential 26V and to the output 15 of threshold detector 14.
- transistor T2 When transistor T2 is cut off diode 46 clamps the output 15 to a minus six volt potential (the so-called signal transmiting state for detector 14). When transistor T2 is full conducting the output 15 is at ground potential (the so-called no signal transmitting state for detector 14).
- the Voltages on line 18 control the action of gates 6. This action will now be described.
- a typical gate 6N which includes diodes 48N and 50N.
- the anodes of diodes 48N and 50N are connected together at junction 52N which is connected to line 8N and via resistor 54N to source of positive potential 20V.
- the cathode of diode 48N is connected to line 4N; and the cathode of diode 50N is connected to the control input 20C of gates 6N.
- the gate 6N is open since the signal on line 8N depends on the signal an line 4N.
- Apparatus for detecting the simultaneous presence of signals which swing from a first potential to a second potential from more than one of a plurality of sources comprising signal generating means including a plurality of inputs for receiving the equiamplitude signals from said sources wherein each input is connected to one of said sources, each of said inputs including a unidirectional conducting device and a resistor connected in series, the resistance of said resistors being substantially equal, the ends of said unidirectional conducting devices remote from said resistors being connected to said signal sources and said unidirectional conducting devices being polarized in the same direction, said direction being such that signals from said sources are transmitted to said resistors, the ends of said resistors remote from said unidirectional conducting devices being connected to a common junction, a source of potential, a common resistor for connecting said common junction to a first source of potential, the amplitude of the potential at said source of potential being greater than the potentials through which said signals swing, the resistance of said common resistor being chosen with respect to the resistance of any one said resistor
- said coupling means includes an emitter-follower amplifier means including an input and an output, means for connecting the input of said emitter-follower amplifier means to said common junction and means for connecting the output of said emitter-follower amplifier means to the input of said signal threshold means.
- said means for connecting the input of said emitter-follower amplifier means includes a resistance potential. divider including first and second terminals and an output, means for conmeeting said first terminal to said common junction, means for connecting said second terminal to another source of potential and means for connecting the output of said resistance potential divider to the input of said emitterfollower amplifier means and wherein said signal threshold means includes a common base amplifier means which switches between a cut-off state and a full conducting state over an input signal range of less than one-half a volt.
- Apparatus for detecting the simultaneous presence of signals from more than one of a plurality of sources comprising a plurality of gate means, each of said gate means including a first input connected to one of said signal sources; a control input and an output for transmitting a signal from its input to its output only when an inhibiting signal is not present at its control input; a signal utilization means connected to the outputs of said gate means; signal generating means including a plurality of inputs for receiving signals from said signal sources wherein each input is connected to one of said signal sources, said signal generating means including means for generating a signal of a first amplitude when a signal is received by one of its inputs, and for transmitting a signal at least equal to a second amplitude when signals are received simultaneously by two or more of its inputs, and output means for transmitting said generated signals; a signal threshold detection means including an input connected to the output of said signal generating means and an output for transmitting a signal upon receipt of a signal having an amplitude between said first and second ampli
Description
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US356143A US3345610A (en) | 1964-03-31 | 1964-03-31 | Signal detection apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US356143A US3345610A (en) | 1964-03-31 | 1964-03-31 | Signal detection apparatus |
Publications (1)
Publication Number | Publication Date |
---|---|
US3345610A true US3345610A (en) | 1967-10-03 |
Family
ID=23400305
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US356143A Expired - Lifetime US3345610A (en) | 1964-03-31 | 1964-03-31 | Signal detection apparatus |
Country Status (1)
Country | Link |
---|---|
US (1) | US3345610A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4328586A (en) * | 1979-11-28 | 1982-05-04 | Beckman Instruments, Inc. | Optically coupled serial communication bus |
US4794388A (en) * | 1980-02-20 | 1988-12-27 | Summagraphics Corporation | Method of and apparatus for controlling a display |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2999637A (en) * | 1959-04-29 | 1961-09-12 | Hughes Aircraft Co | Transistor majority logic adder |
US3134032A (en) * | 1962-03-23 | 1964-05-19 | Westinghouse Electric Corp | Error canceling decision circuit |
US3245033A (en) * | 1960-03-24 | 1966-04-05 | Itt | Code recognition system |
-
1964
- 1964-03-31 US US356143A patent/US3345610A/en not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2999637A (en) * | 1959-04-29 | 1961-09-12 | Hughes Aircraft Co | Transistor majority logic adder |
US3245033A (en) * | 1960-03-24 | 1966-04-05 | Itt | Code recognition system |
US3134032A (en) * | 1962-03-23 | 1964-05-19 | Westinghouse Electric Corp | Error canceling decision circuit |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4328586A (en) * | 1979-11-28 | 1982-05-04 | Beckman Instruments, Inc. | Optically coupled serial communication bus |
US4794388A (en) * | 1980-02-20 | 1988-12-27 | Summagraphics Corporation | Method of and apparatus for controlling a display |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US2712065A (en) | Gate circuitry for electronic computers | |
US2735005A (en) | Add-subtract counter | |
US2589465A (en) | Monitoring system | |
US3051855A (en) | Self-correcting ring counter | |
US2869000A (en) | Modified binary counter circuit | |
US2894254A (en) | Conversion of binary coded information to pulse pattern form | |
US3345610A (en) | Signal detection apparatus | |
US2737647A (en) | Keyboard alarm | |
US3495217A (en) | Digital data transmission apparatus | |
US2978174A (en) | Counting apparatus | |
US3660826A (en) | Noise protection and rollover lockout for keyboards | |
US3099720A (en) | Translator checking circuit for telephone switching system | |
US3000001A (en) | Parallel binary comparator circuit | |
US3047817A (en) | Electronic ring circuit distributor including selectable interrupting means and output gates to provide non-overlapping operation | |
US3553491A (en) | Circuit for sensing binary signals from a high-speed memory device | |
US3137839A (en) | Binary digital comparator | |
GB1354027A (en) | Electrical data transmission and gating systems | |
US3137789A (en) | Digital comparator | |
US3590378A (en) | Fault-detecting monitor for integrated circuit units | |
US2921190A (en) | Serial coincidence detector | |
US3150350A (en) | Parallel parity checker | |
US3492644A (en) | Parallel comparator using transistor logic | |
US3102994A (en) | Gating circuit | |
US3025508A (en) | Variation of high speed redundancy check generator | |
US3341713A (en) | "and" gate, "or" gate, or "at least" gate |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: DATA 100 CORPORATION, A MN. CORP. (CHANGED INTO) Free format text: CERTIFIED COPY OF A CERTIFICATE FILED IN THE OFFICE OF THE SECRETARY OF STATE OF MINNESOTA, SHOWINGMERGER OF ASSIGNORS AND CHANGE OF NAME OF THE SURVIVING CORPORATION ON MAY 30, 1979 EFFECTIVE AY 31, 179,;ASSIGNORS:NORTHERN TELECOM COMPUTERS, INC., A CORP. OF DE.;SYCOR, INC. A CORP. OF DE. (MERGED INTO);REEL/FRAME:004006/0654;SIGNING DATES FROM Owner name: NORTHERN TELECOM INC. (CHANGED INTO) Free format text: CERTIFIED COPY OF MERGER FILED IN THE OFFICE OF THE SECRETARY OF STATE OF DELAWARE, SHOWING MERGEROF ASSIGNORS AND CHANGE OF NAME OF THE SURVIVING CORPORATION ON DEC. 17, 1980, EFFECTIVE DEC. 31, 1980;ASSIGNOR:NORTHERN TELECOM SYSTEMS CORPORATIO A CORP. OF MN. (MERGED INTO);REEL/FRAME:004006/0661 Effective date: 19800918 Owner name: DATA 100 CORPORATION, STATELESS Free format text: CERTIFIED COPY OF A CERTIFICATE FILED IN THE OFFICE OF THE SECRETARY OF STATE OF MINNESOTA, SHOWINGMERGER OF ASSIGNORS AND CHANGE OF NAME OF THE SURVIVING CORPORATION ON MAY 30, 1979 EFFECTIVE AY 31, 179,;ASSIGNOR:NORTHERN TELECOM COMPUTERS, INC., A CORP. OF DE.;REEL/FRAME:004006/0654 Effective date: 19871212 Owner name: NORTHERN TELECOM INC., STATELESS Free format text: CERTIFIED COPY OF MERGER FILED IN THE OFFICE OF THE SECRETARY OF STATE OF DELAWARE, SHOWING MERGEROF ASSIGNORS AND CHANGE OF NAME OF THE SURVIVING CORPORATION ON DEC. 17, 1980, EFFECTIVE DEC. 31, 1980;ASSIGNOR:NORTHERN TELECOM SYSTEMS CORPORATIO A CORP. OF MN. (MERGED INTO);REEL/FRAME:004006/0661 Effective date: 19800918 |
|
AS | Assignment |
Owner name: DATA 100 CORPORATION, A MN CORP. Free format text: ASSIGNS NUNC PRO TUNC AS OF DECEMBER 31, 1977 THE ENTIRE INTEREST IN SAID PATENTS.;ASSIGNOR:IOMEC, INC., A CORP. OF DE;REEL/FRAME:004064/0072 Effective date: 19820902 Owner name: DATA 100 CORPORATION, A MN CORP., STATELESS Free format text: ASSIGNS NUNC PRO TUNC AS OF DECEMBER 31, 1977 THE ENTIRE INTEREST IN SAID PATENTS;ASSIGNOR:IOMEC, INC., A CORP. OF DE;REEL/FRAME:004064/0072 Effective date: 19820902 |