Veröffentlichungsnummer | US3746847 A |

Publikationstyp | Erteilung |

Veröffentlichungsdatum | 17. Juli 1973 |

Eingetragen | 10. Juni 1971 |

Prioritätsdatum | 16. Juni 1970 |

Veröffentlichungsnummer | US 3746847 A, US 3746847A, US-A-3746847, US3746847 A, US3746847A |

Erfinder | Maritsas D |

Ursprünglich Bevollmächtigter | Maritsas D |

Zitat exportieren | BiBTeX, EndNote, RefMan |

Patentzitate (7), Referenziert von (42), Klassifizierungen (7) | |

Externe Links: USPTO, USPTO-Zuordnung, Espacenet | |

US 3746847 A

Zusammenfassung

Pseudo-random pulse or number sequences having a specified probability distribution are generated from other electrical signals having some other probability distribution in a way including transforming those signals to produce further signals directly or indirectly representing pulses or numbers in the desired probability distribution. The invention provides a generator for the initial probability distribution that is based on two chain-code generators with outputs taken jointly by exclusive-OR gating.

Ansprüche auf verfügbar

Beschreibung (OCR-Text kann Fehler enthalten)

United States Patent 1191 Maritsas 1451 July 17, 1973 1 1 GENERATING PSEUDO-RANDOM SEQUENCES Dimitris Maritsas, 73 Palatine Rd., Manchester 20, England [22] Filed: June 10, 1971 [21] Appl. No.: 151,736

[76] Inventor:

[30] Foreign Application Priority Data June 16, 1970 Great Britain 29,067/70 3,456,208 7/1969 Ratz 328/157 X 3,366,779 l/l968 Cathcrall et a1. r 235/152 3,614,400 10/1971 Farnett 235/152 3,171,082 2/1965 Dillard ct al 323/60 Primary Examiner-Malcolm A. Morrison Assistant ExaminerJames F, Gottman Att0rney-Hane, Baxley & Spiecens [57] ABSTRACT Pseudo-random pulse or number sequences having a specified probability distribution are generated from other electrical signals having some other probability distribution in a way including transforming those signals to produce further signals directly or indirectly representing pulses or numbers in the desired probability distribution. The invention provides a generator for [56] References Clted the initial probability distribution that is based on two UNITED STATES PATENTS chain-code generators with outputs taken jointly by ex- 3,614,399 10/1971 Linz 235/152 clusiveglt gating, 3,612,845 10/1971 Lawlor 1 1 235/156 3,423,683 H1969 Kelsey et a1. 328/61 14 Claims, 6 Drawing Figures ,so at ,32 32 ,2--

as siouA SGML sicuAL L,

PULSE GENERATOR CONVERSlON V TRANSFORMATlON BUFFER CONVERSION,

Patented July 17, 1973 3,746,847

3 Sheets-Sheet -15 --CQUNTEP\ AND EQ COMPARATOR 19 2O 2 1/ 2 CLOCK GEN COUNTER v 22 g Q COMPARATOR COUNTER INVENTOR Duvwrms MARI S S BYWMWJG *w ATTORNEYS GENERATING PSEUDO-RANDOM SEQUENCES BACKGROUND OF THE INVENTION This invention relates to apparatus for generating pseudo-random pulse sequences which represent events with the intervals between them distributed according to a specified probability distribution function and/or sequences of pseudo-random numbers distributed according to a specified probability distribution function.

It is known to amplify and shape the output of a thermal noise source, such as a temperature limited diode, to produce a train of pulses in which the intervals between pulses follow a random distribution. Such a train of pulses may be applied to a counter, the registration of which is read out at fixed intervals. The numbers read out in this way may have a random distribution. This type of generator suffers from disadvantages that the sequences are not repeatable at will, and that the performance is unduly sensitive to changes in operating conditions, such as ambient temperature and power supply voltages.

The above mentioned disadvantages can be avoided by the use of so-called chain code generators. These consist essentially of a cyclic storage device, such as a ring connected shift register, in which the input signal to the device at any time is determined by the logical combination of the output signal and the signal present in one, or more intermediate positions of the device. Appropriate choice of the stages and the logical operations will cause the device to generate a pulse sequence which repeats only after a known interval and has a random distribution over this interval. Such a generator is referred to for convenience as a pseudo-random generator.

Pseudo-random numbers may be generated by the use of an appropriate program on a general purpose computer. In general, such programs start with a given binary number and perform some fairly complex operations to form a new number, which is the first in the series of random numbers. The operations are then repeated on this number to generate the next number, and so on. The program may occupy a substantial amount of computer time if many random numbers have to be generated.

It will be appreciated that the output of, say, a thermal noise pulse source is a sequence of pulses in which the intervals between successive pulses are distributed according to a particular probability distribution. Thus the number of intervals of a particular'duration which occur during a sufficiently long operating period of the source will conform approximately to that predicted by the particular probability distribution. Since the source of pulses is an analogue device, the distribution of the intervals is a continuous function. In the case of a digital device, such as a chain code generator, the distribution of the intervals is not a continuous function because the intervals can only be equal to, or a multiple of, the clock pulse interval. Nevertheless, the distribution of the intervals can conform to a satisfactory degree of approximation to the theoretical continuous distribution. Pulse sources in which the intervals between successive pulses conform to a particular probability distribution are used, for example, in the solution of problems concerned with the theory of queues.

If such a train of pseudo-random pulses is applied to a counter which is read out at fixed intervals, the values read out are dependent upon the number of pulses which have occurred during the corresponding inter vals. It can be shown that the distribution of these values approximates to a random probability function. Such sequences of pseudo-random numbers may be used, for example, in the solutions of problems by the Monte Carlo method.

SUMMARY OF THE INVENTION Broadly the invention contemplates generating an electrical signal successively representative of a first probability function, and operating on or using that electrical signal to produce another electrical signal successively representing or permitting derivation of a specified probability function. Apparatus for generating pseudo-random pulse sequences with a specified probability distribution of the intervals between successive pulses may include first means for providing a pseudo-random pulse sequence with a first probability distribution of pulse intervals, second means for converting the pulse intervals into a first electrical signal successively representative of the intervals, third means for transforming the first electrical signal related to the first probability distribution into a second electrical sig nal related to the specified probability distribution, and fourth means for utilising the second electrical signal to produce a sequence of pulses with the intervals con forming to said specified probability distribution, and wherein the first means comprises two chain code generators with at least one signal from each chain code generator connected to a half-adder for providing said first pulse sequence.

Apparatus for generating sequences of pseudorandom numbers with a specified probability distribution may include a uniform pseudo-random number generator comprising two chain code generators each utilising a multistage register with outputs from selected pairs of stages one from each generator being connected to distinct half adders, respectively, to pro vide first electrical signals representative of digits of uniform pseudo-random numbers, and means for transforming the first electrical signal into a second electrical signal which is representative of a sequence of numbers with said specified probability distribution.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 3 is a block diagram ofagenerator of this invention for generating a sequence of pseudo-random numbers with a uniform distribution, and a Bernoulli trials generator;

FIG. 4 is a block schematic drawing of a system for generating a geometric or a negative exponential distribution;

FIG. 5 is a block schematic drawing of a system for generating an Erlang or a negative binomial distribution; and

FIG. 6 is a block schematic drawing of a system for generating sequences of pulses with intervals between pulses distributed according to a. a normal distribution b. a specified skew distribution DESCRTPTION OF THE PREFERRED EMBODIMENTS The time interval between successive pulses in a random sequence of pulses is the random variable which determines the distribution. Embodiments of the invention are used in systems for the generation of new distributions by operating in a predetermined way on the time intervals of a uniform pseudo-random distribution. A basis for these systems is illustrated in FIG. l.

A pseudo-random pulse generator 30 provides a sequence of pulses of constant amplitude with successive puises being separated by intervals which conform to a uniform probability distribution as will be described for FIG. 3. The generator 30 is based on chaincode generators. Several such chain-code generators are described in two articles by M.G. Hartley, published in Proc.

Vol. 116 No. l and entitled Development, design and test procedures for random generators using chaincodes and Evaluation of performance of random generators employing chaincodes.

The pulse sequence from the generator 3th is fed to a signal conversion unit 311, the output of which consists of a sequence of signals with the same interval distribution and with successive values in a distribution corresponding to the gap distribution. This new sequence of signals is fed to a signal transformation unit 32 which modifies the signal value distribution in acordance with a specified transformation function. Thus, the output from unit 32 is a signal value sequence with the same interval distribution but a modified amplitude distribution.

The modified signal sequence is fed to a buffer store 33 the output of which is fed to a voltage to signal conversion unit 34. The output on line 35 consists of a sequence of pulses, the intervals between the successive pulses being determined by the modified signal value distribution, which was produced by unit 32. Hence, by using an appropriate transformation function for unit 32, a specified distribution of the pulse intervals of the output sequence may be secured. The buffer 33 insures that a signal value from unit 32 cannot pass to unit 34 before it has completed conversion of the previous signal value.

The functions provided by the units 3H, 32 and 34 may be provided by circuits which operate on an analogue or a hybrid analogue/digital basis. Such circuits, as individual units, are well known in relation to pulse code modulation systems in which pulse intervals are converted to corresponding amplitudes and vice-versa. However, in order to provide uniformity and repeatability of operation, it is preferred to use digital operation throughout.

Specific digital arrangements for generating certain distributions will now be described as examples. In order to relate these examples to the generalised form of FIG. ll, it should be realised that it may be more convenient to represent the signal values as numbers. Furthermore, signals successively representing a sequence of pseudo-random numbers may be generated directly without starting from a single specific random interval pulse sequence, but, rather, with a plurality of such sequences one for each digit as will be described for FIG. 3, thus effectively combining the units 30 and 31. Then, the transformation of unit 32 may be performed wholly or partly during a conversion to a pulse sequence with further transformation, if required, during subsequent reverse type conversion. In this way the functions of the units 311 and 32 may be merged. For example, if a counter counts clock pulses in the intervals between pulses of a pseudo-random sequence and is read out each time a pulse occurs, the signal values correspond ing to numbers which are read out represent the pulse intervals. Furthermore, if the counter is so arranged that, for example, the clock pulses are subtracted from a preset value, then a transformation of the equivalent number has also been performed.

The arrangement shown in FIG. 2 generates a psuedo-random number sequence with a binomial distribu tion. A clock pulse generator 1 provides a train of regularly spaced timing pulses on line 2. The output of the clock generator 1 drives a pseudo-random number generator 3, the output of which consists of a sequence of binary numbers with a pseudo-random uniform distribution. One particular form of generator is shown in more detail in H0. 3. However, any form of generator may be used which is capable of producing sequences of numbers with a uniform distribution and a sufficiently long period.

The random numbers provided by the number generator 3 are fed to a comparator 4, which is set to compare each number with a predetermined value and to provide an output pulse on the occurrence of a clock pulse if the random number is equal to, or less than, the predetermined value. The probability, p, of a pulse being generated any particular comparison is (f+ l G, where f is the value preset on the comparator 4, and G is the maximum number from the generator 3. The binomial distribution is described by:

(y) P0 2/) )p( p) Where p(k;y) is the probability of having it successes in y trials, when the probability of success is p.

The probability p is represented by the random pulse sequence produced by the comparator 4. This pulse sequence is fed to the input of a counter 5. The clock pulses on the line 2 are fedito the input of a counter 6, which may be set to count any desired number of pulses. This number corresponds to the selected value of y. When this number of pulses has been counted, an output pulse is produced by the counter. This pulse is applied to AND gate 7 which is also controlled by the stages of the counter 5. The counter output pulse allows the AND gate 7 to pass to output line 8 signals representing the current setting of the counter 5, that is, the number of random pulses the comparator 4 which have been received by the counter 5 during one counting cycle of the counter 6. The counter output signal is also applied to the counter 5, through a signal delay element 9, to reset the counter to were immediately after the current value has been read out on the line 8. Thus, the values read out on the line 8 represent values of k for the particular chosen values ofp and y. The values ofp and y required for different binomial distributions are selected by appropriate setting of the predetermined value in the comparator 4 and the maximum permitted count of the counter 6.

The AND gate 7 and delay element 9 may be replaced in any desired way. For example, the output of the counter 6 may be used to operate inhibit gates in the inputs to the counters 5 and 6 and also to signal control logic for signalling a buffer to accept output from the counter 5. When this has occurred the control logic produces a pulse for resetting the counters 5 and 6 and disabling the inhibit gates on the counter inputs.

A portion of FIG. 2 which is enclosed in dotted lines is shown in more detail in FIG. 3. The clock pulses on line 2 are applied as shift pulses to two registers and 11. The register 10 has 33 stages 10(1) to 10(33), respectively. The register 11 has 25 stages 11(1) to 11(25), respectively.

The output from the last stage 10(33) of register 10 is applied to one input of a half adder 12, which also receives an input from stage 10( 13). The output of the half adder is applied to the input of stage 10(1). Similarly, the outputs of stages 11(3) and 11(25) control a half adder 13, the output of which is applied to the stage 11(1). Each of these shift register arrangements constitutes a chain-code generator.

Selected pairs of stages of the registers 10 and 1 1, respectively, are connected to individual half adders, the outputs of which constitute individual random pulse sequences and are applied to individual stages of a register 14. For the sake of clarity, the connections for two pairs of stages only are shown, namely, stages 10( 14) and 11(15) through half adder to stage 14(1) and stages 10(1) and 11(25) through half adder 16 to stage 14(8). The interconnection pattern of the stages of the three registers is set out below:

Register 14 Stage Register 10 Stage Register 11 Stage 1 14 1S 2 26 5 3 32 2 4 8 9 5 28 4 6 23 8 7 18 10 8 l 25 9 33 l 10 5 21 ll 22 9 12 3O 3 13 24 7 14 4 22 15 11 16 l6 l5 l3 l7 17 ll 18 9 l8 l9 1O 17 20 7 20 21 3 23 22 6 23 l6 l2 24 2 24 The two registers 10 and 11 form two chaincode generators and the general mode of operation of the device in setting the register 14 with a 24 bit binary pattern each time a clock pulse is applied to the two registers will be understood readily from the articles by Hartley, which have been referred to above. The particular listed set of interconnections between the stages has been found to give a sequence of twenty-four bit pseudo-random of high quality, that is the sequence is substantially random over the full cycle of approximately 2 numbers. Any desired part of the sequence may be reproduced at will by initially setting the stages of the registers 10 and 11 to the approrpiate starting condition.

It will be understood that other interconnection patterns may be used provided that the sequences produced by the different interconnections are statistically independent. For example, it would not be satisfactory to connect the stages in ordered pairs 10( 1) and 11(1), 10(2) and 11(2) and so on. Furthermore, the lengths and the numbers of the chaincode registers may be varied.

The individual stages of the register 14 are connected to a conventional multi-digit comparison network 15, which is also connected to corresponding stages of a register 26. Any desired value may be set in the register 26 by applying suitable signals over input line 17. The clock pulses on line 2 are fed to the comparison network 15 to strobe the state of the network so that, for example, output line 18 assumes a zero condition if the value in the register 14 is greater than the value in the register 16 and assumes a one condition if the converse occurs.

The arrangement of FIG. 2 may also provide a close approximation to a Poisson distribution by setting the comparator to provide a value for p which is equal to the mean of the Poisson process and is very small compared with unity. The counter 6 is set to count that number of clock pulses which occur in the desired time interval of the Poisson process, and the readout from the counter 5 provides the value of the random variable.

The modification shown in FIG. 4 provides for the generation of geometric and negative exponential distributions. The geometric distribution describes the distribution of the intervals between the pulses produced by the comparator 4 and is given by the formula:

where p is the probability of success, and

k is the number of failures between one success and the next.

Corresponding elements in FIG. 2 and 4 are similarly referenced.

The clock pulses on line are counted by a counter 19. Each time the comparator 4 produces a pulse the current value in the counter 19 is readout via AND gate 20 on output line 21, in a similar manner to the reading out of counter 5 of FIG. 2. The comparator output pulse is also applied to the counter 19 via delay element 22 to reset the counter to zero. It will be apparent that the readout and reset operation must be completed in the interval between two successive clock pulses to avoid errors in the counting. Thus, the values readout on the line 21 represent the value k.

A negative exponential distribution describes the distribution of the intervals between the successive events of a Poisson process. Hence, if the comparator is set to operate in the Poisson mode as described in connection with FIG. 2, the readout on the line 21 represents the value of the random variable expressed in terms of the interval between successive clock pulses.

Instead of using the AND gate 20 and delay element 22, the output of the counter 19 may be taken by a buffer when signalled by control logic in response to the output of the comparator 4 indicating that a random number is available in the counter 19. In this case the output of the comparator also serves to operate an inhibit gate in the output of the clock generator 1. A strobe pulse from the control logic indicating that the buffer can take the counter output controls such transfer resetting of the counter and disabling of the inhibit gate.

Pascal and Erlang distributions correspond to the geometric and negative exponential distributions, except that the intervals are between an event and the kth subsequent event, instead of between successive events. Hence, these two former distributions may be generated by modifying the arrangement of FIG. 4 by the inclusion of a counter 23, as shown in FIG. 5. The counter 23 is set to count the required value of k, so that the counter T9 is read out and reset after every kth pulse from the comparator, instead of after every pulse from the comparator.

As with H6. 4, the counter output may be via a buffer controlled by control logic responsive to the output of the counter 23 which also serves to inhibit the clock output.

The random variable in the case of the negative exponential, Erlang and normal distributions should be a continuous function. Since the generation systems are controlled by clock pulses, it is clear that the variable generated in a discrete, and not a continuous function. Thus the generated distribution will not conform exactly to the theoretical distribution. if the error is significant in a particular application, a closer approximation to a continuous function may be obtained by using the generated output as the most significant digits of a composite number, the remaining digits of less significance being provided by a group of digits taken directly from the output of the number generator 3.

it will be understood from the foregoing description that the various random distributions have been produced by subjecting the output of the uniform random number generator 3 to the logical operations of comparison and counting. These operations may be replaced by logical equivalents. For example, two numbers may be compared by subtracting one from the other, the sign of the remainder indicating the comparison result. An accumulator consisting of an adder and register will perform the counting function.

A system which may be adjusted to provide any one of several different distributions will now be described with reference to FIG. 6.

A first pseudo-random pulse generator 40 of the type shown in FIG. 3, feeds a chain consisting of a counter ill, a signal converter 42 and a buffer store 43. A second pseudo-random pulse generator 44, also of the type shown in H6. 3, feeds a chain consisting of a counter 45 and a buffer store 48. The outputs from the buffers 43 and 48 are combined in a adder 49. The output from the adder 49 is fed via a further buffer store 50 to a signal conversion unit 51. The output pulse sequence with the selected probability distribution of the pulse intervals appears on line 52.

The counter 41 provides an output pulse to unit 42 after a preset number of input pulses. The time intervals between successive output pulses follow an Erlang distribution. The unit 42 produces pulses which have amplitudes following the same distribution as the pulse intervals.

The chain of units 44, 45 and 46 operates in a similar manner, but the output of unit 46 is subtracted from a fixed value in unit 47, and the result is then stored in buffer 48. As a result, the intervals of the pulse sequence fed to the buffer 48 follow an Erlang distribution and the amplitudes follow a reflected Erlang distribution.

The contents of the buffers 43 and 48 are combined by the adder 49 and the sum is stored in the buffer 50.

The stored sums are then converted back to time intervals by unit 511. If the preset values for the counters 41 and 45 are equal, and are equal to or greater than 5, the pulse sequence on the line 52 has intervals which follow a normal distribution. If the preset values of the counter 411 and 45 are different, the intervals of the pulse sequence on the line 52 follow a skew distribu tion. Finally, if the generator 40 is made unoperative, the preset count of counter 45 is unity, and the unit 47 adds instead of subtracts, the intervals of the pulse sequence on the line 52 follow a shifted negative exponential distribution.

in implementing the units of FIG. 6 in digital form, the unit 42 may consist of a counter which counts clock pulses and is read out and reset to zero each time the counter 411 produces a pulse. Thus, units 41 and 42 are similar to counters 19 and 23, delay 22 and AND gate 20 of HG. 5. Each value which is read out of unit 42 is stored in turn in buffer 43.

The units 46 and 47 may consist of a subtracting counter which counts clock pulses and is read out and reset to a predetermined value each time the counter 45 produces a pulse. The adder 49 may consist of a conventional parallel binary adder.

The unit Ell may consist of a subtracting circuit which controls an AND gate to provide a binary one output on the line 52 when the subtracting circuit is registering zero and a binary zero for any other subtracting circuit value. One of the words stored in the buffer 50 can be transferred into the subtracting circuit under control of a timing signal but only if the counter is also registering zero.

Pseudo-random numbers of selected probability distribution could be derived from the AND gate output, or, conceivably, taken directly from the subtracting circuit of unit 511, or the adder 49, or the bufier 50.

lit will be apparent that the buffers must provide multiword storage on a conventional first in/first out basis. in theory, each buffer should be sufficiently large to en sure that no input word to a buffer is ever lost because the buffer is already full. The maximum rate at which successive words can arise in, say, buffer 43 is determined by the clock pulse rate. However, the average rate is very much less than this, since it is determined by the average rate of arrival of pulses from the counter 41.. The distribution of the pulse interval in the pulse sequence from the counter 4ll is known in terms of the clock pulse interval. Consequently, it is possible to calculate the size of buffer which is necessary to ensure that information may be processed without substantial loss because of overflow. An overflow condition may occur, but if it occurs sufficiently infrequently the overall operation of the system will not be affected to any appreciable extent.

One useful modification of the system shown in FIG. 6 involves combining it uniformly distributed pseudorandom numbers with the outputs of the buffers 43 and 48. This may be done at an adder unit (49) followed by a unit providing the cumulative sum of n 2 numbers at its output. This output, as well as feeding a buffer (50) if required, is also returned as an input to the adder unit. lln another configuration, a separate adder feeds a unit providing the cumulative sum of n numbers at its input and receives both the uniformly distributed numbers and the cumulative sum. The cumulative sum and the output of the adder 49 are then supplied as inputs to a further separate adder feeding the buffer 50.

In both cases, for a setting k of the counters all and 45, the accuracy of the resulting normal distribution depends on the ratio k/n.

I claim:

1. Apparatus for generating pseudo-random pulse sequences with a specified probability distribution of the intervals between successive pulses, comprising first means for providing a pseudo-random pulse sequence with a first probability distribution of pulse intervals, second means for converting the pulse intervals into a first electrical signal successively representative of the pulse intervals, third means for transfonning the first electrical signals related to the first probability distribution into a second electrical signal related to the speci fied probability distribution, and fourth means responsive to the second electrical signal to produce a pulse sequence with intervals conforming to said specified probability distribution, and wherein the first means comprises two chain-code generators with at least one 1 signal from each chain-code generator connected to a half adder for providing the first pulse sequence.

2. Apparatus according to claim 1, comprising fifth means of the same type as said first means and operative for providing another pseudo-random pulse sequence with a predetermined probability distribution of pulse intervals, sixth means for converting into an electrical signal successively representative of the latter pulse intervals, said fourth means being responsive jointly to the outputs of the third and sixth means.

3. Apparatus according to claim 2, wherein the third means is for subtracting the first signal from a fixed value to provide the second Signal.

4. Apparatus according to claim 2, wherein the first and fifth means each further comprise a counter arranged to count input pulses from the generator and presettable to give an output pulse after a desired number of counted pulses.

5. Apparatus according to claim 2, wherein the sixth means comprises a counter arranged to count clock pulses and be read out and reset by each pulse from the fifth means, the second and third means are constituted by a subtracting counter arranged to count clock pulses and be readout and reset by each pulse from the first means, and the fourth means comprises a subtracting circuit operative relative to a fixed valve and arranged to control a gate to provide a pulse only when the subtracting circuit registers zero.

6. Apparatus according to claim 2, comprising means for arithmetically combining the outputs of the third and sixth means to form an input to the fourth means.

7. Apparatus for generating sequences of pseudorandom numbers with a specified probability distribution comprising a first means for generating uniform pseudo-random numbers and having two chain-code generators each utilizing a multistage register with outputs from selected pairs of stages, one from each generator, being connected to distinct half-adders, respectively, to provide first electrical signals representative of digits of uniform pseudo-random numbers, and second means for transforming the first electrical signals into second electrical signals representative of a sequence of numbers with said specified probability distribution.

8. Apparatus according to claim 7, wherein the second means provides for comparison and counting operations relative to said signal values.

Apparatus according to claim 8, wherein the second means comprises a comparator for producing a pulse for each predetermined relationship between a reference number and said numbers from the pseudorandom generator, and a counter arranged to be read out and reset at regular intervals and to advance its state by unity for each pulse from the comparator.

10. Apparatus according to claim 9, comprising a further counter arranged to count regular clock pulses and to give, after predetermined pulse counts, an output signal for controlling readout and resetting of the firstmentioned counter.

l H. Apparatus according to claim 8, wherein the second means comprises a comparator for producing a pulse for each predetermined relationship between a reference number and said numbers from the pseudorandom generator, and a counter arranged to count regular clock signals and to be readout and reset by each pulse from the comparator.

12. Apparatus according to claim 8, wherein the second means comprises a comparator for providing a pulse for each predetermined relationship between a reference number and said numbers from the pseudorandom generator, a first counter for counting pulses from the comparator and arranged to give an output signal after each counting of a predetermined number of pulses, and a second counter arranged to count regular clock pulses and to be readout and reset by each signal from the first counter.

113. A pseudo-random pulse sequence generator comprising two chain-code generators each including a multistage shift register with feed to the first stage from a half-adder supplied from selected stages of the same shift register, at least one selected shift register stage of each chain code generator also being connected to a half-adder for supplying a pulse sequence as the shift registers are clocked in synchronism.

14. A pseudo-random pulse sequence generator according to claim 13, further comprising additional halfadders each supplied from a different pair of shift register stages, one from each chain-code generator, to provide other pseudo-random pulse sequences; and an out put register of which each stage is supplied by a different one of the pulse sequence producing half-adders to form a uniform random number represented by the contents of the output register stages.

Patentzitate

Zitiertes Patent | Eingetragen | Veröffentlichungsdatum | Antragsteller | Titel |
---|---|---|---|---|

US3171082 * | 4. Febr. 1963 | 23. Febr. 1965 | California Inst Of Techn | Random permutation generator employing pulse width generator and circulating shift register |

US3366779 * | 20. Juli 1965 | 30. Jan. 1968 | Solartron Electronic Group | Random signal generator |

US3423683 * | 31. März 1966 | 21. Jan. 1969 | Northern Electric Co | Binary random number generator using switching tree and wide-band noise source |

US3456208 * | 18. Jan. 1967 | 15. Juli 1969 | Ratz Alfred G | Random noise generator having gaussian amplitude probability distribution |

US3612845 * | 5. Juli 1968 | 12. Okt. 1971 | Lawlor Reed C | Computer utilizing random pulse trains |

US3614399 * | 30. Aug. 1968 | 19. Okt. 1971 | Linz John C | Method of synthesizing low-frequency noise |

US3614400 * | 26. Nov. 1969 | 19. Okt. 1971 | Rca Corp | Maximum length pulse sequence generators |

Referenziert von

Zitiert von Patent | Eingetragen | Veröffentlichungsdatum | Antragsteller | Titel |
---|---|---|---|---|

US3866029 * | 18. Sept. 1973 | 11. Febr. 1975 | Prayfel Inc | Two level random number generator having a controllable expected value |

US3940632 * | 4. März 1974 | 24. Febr. 1976 | Calspan Corporation | Nonpredictable actuator for switches or the like |

US3946215 * | 30. Sept. 1974 | 23. März 1976 | The Boeing Company | Pseudo-random code generator |

US3984668 * | 19. März 1975 | 5. Okt. 1976 | U.S. Philips Corporation | Method for generating pseudo-random bit sequence words and a device for carrying out the method |

US4090242 * | 15. Juli 1976 | 16. Mai 1978 | Odetics, Inc. | Method and means for evaluating phase encoded communication systems |

US4213101 * | 15. Juni 1977 | 15. Juli 1980 | Francis Bourrinet | Pseudo-random binary sequence generator |

US4218748 * | 25. Sept. 1978 | 19. Aug. 1980 | Sangamo Weston, Inc. | Apparatus and method for digitally obtaining signals having specified statistical distributions |

US4408298 * | 26. Juni 1981 | 4. Okt. 1983 | Rca Corporation | Pseudo random number generator apparatus |

US4472784 * | 11. Dez. 1981 | 18. Sept. 1984 | At&T Bell Laboratories | Ensuring sample independence in random sampling systems |

US4511988 * | 16. Juli 1982 | 16. Apr. 1985 | Urien Michel | Electronic event or bit generator having a predetermined occurrence rate with a predetermined event or bit distribution |

US4785410 * | 2. Juni 1986 | 15. Nov. 1988 | Clarion Co., Ltd. | Maximum length shift register sequences generator |

US4905176 * | 28. Okt. 1988 | 27. Febr. 1990 | International Business Machines Corporation | Random number generator circuit |

US5245659 * | 17. Nov. 1978 | 14. Sept. 1993 | The United States Of America As Represented By The Director, National Security Agency | Constant ratio coding for multipath rejection and ECCM enhancement |

US5412587 * | 28. Dez. 1988 | 2. Mai 1995 | The Boeing Company | Pseudorandom stochastic data processing |

US6281822 | 28. Mai 1999 | 28. Aug. 2001 | Dot Wireless, Inc. | Pulse density modulator with improved pulse distribution |

US6289067 | 28. Mai 1999 | 11. Sept. 2001 | Dot Wireless, Inc. | Device and method for generating clock signals from a single reference frequency signal and for synchronizing data signals with a generated clock |

US6340919 * | 19. Apr. 2000 | 22. Jan. 2002 | Oki Electric Industry Co., Ltd. | Random number generating circuit |

US6452959 | 28. Mai 1999 | 17. Sept. 2002 | Dot Wireless, Inc. | Method of and apparatus for generating data sequences for use in communications |

US6490329 | 12. Juli 2001 | 3. Dez. 2002 | Dot Wireless, Inc. | Device and method for generating clock signals from a single reference frequency signal and for synchronizing data signals with a generated clock |

US6539049 | 28. Mai 1999 | 25. März 2003 | Dot Wireless, Inc. | Device and method for maintaining time synchronous with a network master time |

US6549563 | 19. Okt. 2000 | 15. Apr. 2003 | Dot Wireless, Inc. | Methods and apparatus for use in generating spreading sequences for multiple modes of communication |

US6624768 * | 24. Febr. 2000 | 23. Sept. 2003 | Robert Bosch Gmbh | Method and device for coding/decoding |

US6625199 | 19. Okt. 2000 | 23. Sept. 2003 | Texas Instruments Incorporated | Methods and apparatus for use in simultaneously generating multiple data sequences using a single data access module |

US6650687 | 19. Okt. 2000 | 18. Nov. 2003 | Texas Instruments Incorporated | Methods and apparatus for use in simultaneously generating data sequences for spread spectrum communications |

US6654405 | 19. Okt. 2000 | 25. Nov. 2003 | Texas Instruments Incorporated | Methods and apparatus for use in performing dot product operations for spread spectrum communications |

US6727765 * | 28. Juni 2002 | 27. Apr. 2004 | Cypress Semiconductor Corporation | Stochastic pulse generator device and method of same |

US6728305 | 21. Juni 2002 | 27. Apr. 2004 | Ntt Mobile Communications Network, Inc. | Simultaneous plural code series generator and CDMA radio receiver using same |

US6738411 | 19. Nov. 1998 | 18. Mai 2004 | Ntt Mobile Communications Network Inc. | Simultaneous plural code series generator and CDMA radio receiver using same |

US6748006 | 28. Mai 1999 | 8. Juni 2004 | Texas Instruments Incorporated | Method and apparatus for controlling system timing with use of a master timer |

US6850871 * | 18. Okt. 1999 | 1. Febr. 2005 | Agilent Technologies, Inc. | Method and apparatus for extraction of nonlinear black-box behavioral models from embeddings of the time-domain measurements |

US7426527 * | 23. Sept. 2004 | 16. Sept. 2008 | Infineon Technologies Ag | Random number generator and method for generating a random number |

US7860912 * | 8. Dez. 2006 | 28. Dez. 2010 | Nvidia Corporation | Random number generator with improved uniformity for networking |

US8044612 | 7. Juni 2007 | 25. Okt. 2011 | Cypress Semiconductor Corporation | Method and apparatus for networked illumination devices |

US8093825 | 13. Nov. 2007 | 10. Jan. 2012 | Cypress Semiconductor Corporation | Control circuit for optical transducers |

US8476846 | 23. Febr. 2012 | 2. Juli 2013 | Cypress Semiconductor Corporation | Stochastic signal density modulation for optical transducer control |

US9226355 | 2. Juli 2013 | 29. Dez. 2015 | Cypress Semiconductor Corporation | Stochastic signal density modulation for optical transducer control |

US20050125471 * | 23. Sept. 2004 | 9. Juni 2005 | Infineon Technologies Ag | Random number generator and method for generating a random number |

US20060258424 * | 13. Jan. 2004 | 16. Nov. 2006 | Unitab Limited | Gaming systems |

US20080180040 * | 7. Juni 2007 | 31. Juli 2008 | Cypress Semiconductor Corporation | Method and apparatus for networked illumination devices |

US20080243978 * | 17. März 2008 | 2. Okt. 2008 | Kabushiki Kaisha Toshiba | Random number generator |

EP0963070A1 * | 19. Nov. 1998 | 8. Dez. 1999 | Ntt Mobile Communications Network Inc. | Device for generating a plurality of code series simultaneously and cdma radio receiver comprising the device |

WO1999049381A1 * | 16. März 1999 | 30. Sept. 1999 | Ford Motor Company | Dither noise source with notched frequency spectrum |

Klassifizierungen

US-Klassifikation | 708/250, 708/252, 331/78 |

Internationale Klassifikation | H03K3/84, H03K3/00 |

Unternehmensklassifikation | H03K3/84 |

Europäische Klassifikation | H03K3/84 |

Drehen