US5250446A - Method of manufacturing a semiconductor device by forming at least three regions of different lifetimes of carriers at different depths - Google Patents

Method of manufacturing a semiconductor device by forming at least three regions of different lifetimes of carriers at different depths Download PDF

Info

Publication number
US5250446A
US5250446A US07/959,465 US95946592A US5250446A US 5250446 A US5250446 A US 5250446A US 95946592 A US95946592 A US 95946592A US 5250446 A US5250446 A US 5250446A
Authority
US
United States
Prior art keywords
ion
regions
ions
different
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
US07/959,465
Inventor
Akihiko Osawa
Yoshiro Baba
Mitsuhiko Kitagawa
Tetsujiro Tsunoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of US5250446A publication Critical patent/US5250446A/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/2658—Bombardment with radiation with high-energy radiation producing ion implantation of a molecular ion, e.g. decaborane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/30—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface
    • H01L29/32—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface the imperfections being within the semiconductor body
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/128—Proton bombardment of silicon

Definitions

  • This invention relates to a semiconductor device in which the lifetime of carriers can be controlled in a substrate and to a method of manufacturing the same.
  • a proton irradiation technique is known as a technique of controlling the lifetime of carriers locally by irradiating charged particles.
  • protons are injected into a semiconductor substrate, forming a large number of crystal defects in a proton stopping region (in the semiconductor substrate).
  • the crystal defects trap carriers, thus shortening the lifetime of carriers in a limited area of the substrate.
  • the depth of the proton stopping region from a surface of the substrate can be controlled by changing acceleration energy of the protons.
  • a density of crystal defects at a deep level for example, at a level 0.39 eV lower than a conductive band Ec can be controlled locally.
  • the region I in FIG. 1 is the proton stopping region.
  • the region I having a large number of the crystal defects can be formed in a desired local area in the substrate.
  • FIG. 2 is a cross sectional view showing an arrangement of a conventional high speed switching diode.
  • a high speed switching device which can be turned on by a low voltage, for example, can be obtained.
  • N-impurities are injected in a high concentration into an N + -silicon layer 31, on which an N - -epitaxial layer 32 of a low concentration is formed.
  • a P + -region 33 of a high concentration is formed on a portion of the surface region of the epitaxial layer 32.
  • the diode is turned on when a forward voltage is applied thereto, and turned off when a reverse voltage is applied thereto.
  • a depletion region 34 is formed in a region near the PN junction between the regions 32 and 33, as indicated by a dotted line in FIG. 2.
  • Carriers remain in the depletion region 34 at a beginning of an OFF period. Because of the presence of the carriers, the switching operation of the diode is made slow. To prevent this slow operation, the protons are injected by the proton irradiation technique into the region near the PN junction, in which the depletion region 34 is formed, thereby forming a trap region 35 having a great number of the crystal defects.
  • a crystal defect region can be formed in a limited area of the substrate by injecting the protons and therefore a resistance component of the switching device is not influenced substantially by the injection.
  • the switching device which can be turned on at high speed by a low voltage can be obtained by forming a great number of crystal defects locally in the substrate at a predetermined depth from the surface of the substrate, thereby controlling the lifetime of carriers.
  • This technique can be applied to various devices having a PN junction, such as transistor, thyristor, and the like.
  • An acceleration voltage and a dosage of the protons i.e., an amount of the protons irradiating the substrate are given as basic parameters of the technique of controlling the lifetime of the carriers by means of proton irradiation.
  • the proton stopping region in a silicon layer is determined by the acceleration voltage, and the crystal defect density in the proton stopping region is determined by the dosage of the protons.
  • the present invention was made in consideration of the above-mentioned drawbacks, and its objects are to provide a semiconductor device in which a plurality of regions of different lifetimes of carriers can be formed in a substrate without increasing the number of the manufacturing steps, and to provide a method of manufacturing such a semiconductor device.
  • the present invention provides the semiconductor device comprises: at least three regions of different lifetimes of carriers formed in a semiconductor substrate by introducing at least two types of charged particles, having substantially the same value e/m obtained by dividing the electric charge by the mass, into the semiconductor substrate.
  • the present invention provides the method of manufacturing a semiconductor device comprises the steps of: introducing a mixture of at least two kinds of charged particles having substantially the same value e/m obtained by dividing the electric charge of an ion by the mass of the ion into a semiconductor substrate; and forming at least three regions of different lifetimes of carriers in the semiconductor substrate.
  • a mixture of at least two types of charged particles having the same value e/m e.g. a mixture of charged particles including hydrogen molecular ions H 2 + and deuterium ions D + , is accelerated in a charged particle accelerator. Since the mass spectrograph unit in the accelerator cannot divide H 2 + ions and D + ions, both ions are accelerated together.
  • H 2 + ion collides against the silicon substrate it is divided into two hydrogen ions 2H + . Since the hydrogen ion H + and deuterium ion D + have different ranges in silicon, two regions including a great number of crystal defects are formed in the silicon substrate in one ion irradiating step. As a result, at least three regions of different lifetimes of carriers are formed at different depths in the semiconductor substrate.
  • FIG. 1 is a diagram showing a distribution of a crystal defect region formed at a deep level of a semiconductor substrate according to a conventional method of manufacturing a semiconductor device;
  • FIG. 2 is a cross sectional view showing an arrangement of a conventional high speed switching diode
  • FIG. 3 is a cross sectional view showing an arrangement of an embodiment of a semiconductor device according to the present invention.
  • FIG. 4 is a schematic view for explaining a method of manufacturing a semiconductor device according to the present invention.
  • FIG. 5 is a diagram showing a distribution of crystal defect regions formed at a deep level of a silicon semiconductor substrate according to the method of the present invention.
  • FIG. 3 is a cross sectional view showing an arrangement of an embodiment a semiconductor device according to the present invention.
  • the semiconductor device of this embodiment is a high-speed switching diode.
  • a semiconductor substrate 25 is constituted by an N + -silicon layer 11 of a high impurity concentration and an N - -epitaxial layer 12 of a low impurity concentration formed thereon.
  • a P + -region 13 of a high impurity concentration is formed in a portion of the surface region of the epitaxial layer 12.
  • the protons are introduced in the diode to control the lifetime of the carriers. More specifically, a mixture of charged particles of hydrogen molecular ions H 2 + and deuterium ions D + is irradiated on the substrate 25, as will be described later.
  • the deuterium ions D + are introduced into a region of the N - -epitaxial layer 12 near the PN junction between the P + -region 13 and the N - -epitaxial layer 12, thereby forming a first crystal defect region 14 including a great number of crystal defects.
  • the hydrogen ions H + are also introduced into a region at a predetermined depth in the N - -epitaxial layer 12 near the boundary of the N + -silicon substrate 11, thereby forming a second crystal defect region 15.
  • the hydrogen ions H + pass through the first crystal defect region 14 and form the second crystal defect region 15 in a deep portion of the substrate.
  • the first and second crystal defect regions 14 and 15 are formed in one ion injection step.
  • FIG. 4 shows an arrangement of a charged particle accelerator for use in the present method.
  • the charged particle accelerator in FIG. 4 comprises an ion generating unit 21, a mass spectrograph unit 22, a particle accelerator unit 23, and irradiating unit 24.
  • a silicon substrate 25 is disposed so as to face ion beams.
  • the ion generating unit 21 generates a mixture of charged particles of the hydrogen molecular ions H 2 + and the deuterium ions D + .
  • the mass spectrograph unit 22 separates the ions by utilizing the principle that circular orbits of the ions passing through a magnetic field are different depending on the value e/m, where e: the electric charge of an ion, and m: the mass of an ion.
  • the hydrogen molecular ion H 2 + is made up of two protons (p+p) and a deuterium ion D + is made up of one proton and one deutron (p+n).
  • p+p the value e/m of the hydrogen ion H 2 + is substantially the same as that of the deuterium ion D + .
  • the mass spectrograph unit 22 cannot separate the hydrogen molecular ions H 2 + and the deuterium ions D + from each other, and both ions are supplied together to the particle accelerator unit 23. Since the other ions in the mixture have the values e/m greatly different from those of the hydrogen molecular ion H 2 + and the deuterium ion D + , they are separated from both ions by the mass spectrograph unit 22. As a result, only the two kinds of ions H 2 + and D + are irradiated on the substrate 25 since the particle accelerator unit 23 can not accelerate the ions other than the ions H 2 + and D + .
  • the hydrogen molecular ion H 2 + is divided into two hydrogen ions 2H + upon colliding against the substrate 25.
  • the deuterium ions D + and the hydrogen ions H + are injected into the substrate 25 at the same time.
  • these ions are stopped in the regions at different depths in the silicon substrate even if they are injected by the same acceleration voltage.
  • the substrate 25 is irradiated with a mixture of at least two kinds of charged particles having substantially the same value e/m, thereby forming at least two crystal defect regions including a great number of crystal defects.
  • FIG. 5 shows a distribution of crystal defect regions formed at deep levels in the silicon semiconductor substrate according to the method of the present invention. More specifically, FIG. 5 is a profile of crystal defect densities at deep levels (at a level 0.39 eV lower than a conductive band Ec) in a case where the hydrogen molecular ions H 2 + and the deuterium ions D + are accelerated by the acceleration voltage of 5 MeV in the charged particle accelerator in FIG. 4, and irradiated in the dosage of 1 ⁇ 10 13 cm -2 (the sum of the dosage of hydrogen molecular ions H 2 + and deuterium ions D + ), on the N-type silicon substrate 25 which has the resistance of 2 ⁇ cm and the face orientation (100). As shown in FIG.
  • two regions II and III of high crystal defect densities are formed in the substrate.
  • the regions II and III substantially correspond to the charged particle stopping regions.
  • the region II is a D + ion stopping region and the region III is an H 2 + ion stopping region.
  • the ranges of the hydrogen ions H + and the deuterium ions D + are different in silicon even if they are injected by the same acceleration voltage.
  • the hydrogen ions H + pass through the D + ion stopping region, and stop at the region III.
  • three kinds of regions which comprises the regions II and III and a region IV intervening therebetween and in which the lifetimes of the carriers are different are formed at the different depths in the semiconductor substrate 25.
  • the method of the present invention can be applied not only to the diode shown in FIG. 3, but also to various devices, such as a thyristor which requires two or more crystal defect regions to control the lifetime of the carriers.
  • the H 2 + ion stopping region III can serve as a trap region for trapping the carriers near the PN junction.
  • the present invention it is unnecessary to irradiate the protons by different acceleration voltages in the same number of times as that of the crystal defect regions required.
  • the number of steps of manufacturing the semiconductor device can be decreased and also the manufacturing cost can be reduced as compared to the conventional method and the conventional device.

Abstract

A mixture of at least two types of charged particles of ions having the same value obtained by dividing the electric charge of an ion by the mass of the ion, i.e., a mixture of charged particles including hydrogen molecular ions H2 + and deuterium ions D+, is accelerated in a charged particle accelerator. Since the mass spectrograph unit in the accelerator cannot divide the hydrogen molecular ions H2 + and the deuterium ion D+, both ions are accelerated together. When the hydrogen molecular ion H2 + collides against a silicon substrate, it is divided into two hydrogen ions 2H+. Since the hydrogen ion H+ and the deuterium ion D+ have different ranges in silicon, two regions including a great number of crystal defects are formed in the silicon substrate in one ion irradiating step. As a result, at least three regions of different lifetimes of carriers are formed at different depths of the semiconductor substrate.

Description

This application is a divisional application of application Ser. No. 07/865,626, filed Apr. 4, 1992, now abandoned, which was a continuation application of application Ser. No. 07/636,284, filed Dec. 31, 1990 now abandoned.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor device in which the lifetime of carriers can be controlled in a substrate and to a method of manufacturing the same.
2. Description of the Related Art
A proton irradiation technique is known as a technique of controlling the lifetime of carriers locally by irradiating charged particles. In this technique, protons are injected into a semiconductor substrate, forming a large number of crystal defects in a proton stopping region (in the semiconductor substrate). The crystal defects trap carriers, thus shortening the lifetime of carriers in a limited area of the substrate. The depth of the proton stopping region from a surface of the substrate can be controlled by changing acceleration energy of the protons. As a result, as shown in FIG. 1, a density of crystal defects at a deep level, for example, at a level 0.39 eV lower than a conductive band Ec can be controlled locally. The region I in FIG. 1 is the proton stopping region. Thus, the region I having a large number of the crystal defects can be formed in a desired local area in the substrate.
FIG. 2 is a cross sectional view showing an arrangement of a conventional high speed switching diode. By virtue of the above-mentioned proton irradiation technique, a high speed switching device which can be turned on by a low voltage, for example, can be obtained. As shown in FIG. 2, N-impurities are injected in a high concentration into an N+ -silicon layer 31, on which an N- -epitaxial layer 32 of a low concentration is formed. Further, a P+ -region 33 of a high concentration is formed on a portion of the surface region of the epitaxial layer 32.
The diode is turned on when a forward voltage is applied thereto, and turned off when a reverse voltage is applied thereto. When the diode is in an OFF state, a depletion region 34 is formed in a region near the PN junction between the regions 32 and 33, as indicated by a dotted line in FIG. 2. Carriers remain in the depletion region 34 at a beginning of an OFF period. Because of the presence of the carriers, the switching operation of the diode is made slow. To prevent this slow operation, the protons are injected by the proton irradiation technique into the region near the PN junction, in which the depletion region 34 is formed, thereby forming a trap region 35 having a great number of the crystal defects. The carriers remaining in the depletion region 34 at the beginning of the OFF period are trapped in the trap region 35. In general, a crystal defect region can be formed in a limited area of the substrate by injecting the protons and therefore a resistance component of the switching device is not influenced substantially by the injection.
As described above, the switching device which can be turned on at high speed by a low voltage can be obtained by forming a great number of crystal defects locally in the substrate at a predetermined depth from the surface of the substrate, thereby controlling the lifetime of carriers. This technique can be applied to various devices having a PN junction, such as transistor, thyristor, and the like.
An acceleration voltage and a dosage of the protons i.e., an amount of the protons irradiating the substrate are given as basic parameters of the technique of controlling the lifetime of the carriers by means of proton irradiation. The proton stopping region in a silicon layer is determined by the acceleration voltage, and the crystal defect density in the proton stopping region is determined by the dosage of the protons. Hence, when the substrate surface is irradiated once by the protons with the fixed acceleration voltage and the dosage, only one crystal defect region I is formed, as shown in FIG. 1. Accordingly, two or more crystal defect regions have to be formed to control the lifetime of carriers in a device that has a number of PN junctions at different depths in the substrate. It is necessary to irradiate the substrate of such device by the protons with various accelerating voltages in the same number of times as that of the crystal defect regions required. However, if the protons are irradiated repeatedly, the manufacturing steps are increased, resulting in high manufacturing cost and low productivity.
SUMMARY OF THE INVENTION
The present invention was made in consideration of the above-mentioned drawbacks, and its objects are to provide a semiconductor device in which a plurality of regions of different lifetimes of carriers can be formed in a substrate without increasing the number of the manufacturing steps, and to provide a method of manufacturing such a semiconductor device.
To achieve the object, the present invention provides the semiconductor device comprises: at least three regions of different lifetimes of carriers formed in a semiconductor substrate by introducing at least two types of charged particles, having substantially the same value e/m obtained by dividing the electric charge by the mass, into the semiconductor substrate.
Furthermore, the present invention provides the method of manufacturing a semiconductor device comprises the steps of: introducing a mixture of at least two kinds of charged particles having substantially the same value e/m obtained by dividing the electric charge of an ion by the mass of the ion into a semiconductor substrate; and forming at least three regions of different lifetimes of carriers in the semiconductor substrate.
A mixture of at least two types of charged particles having the same value e/m, e.g. a mixture of charged particles including hydrogen molecular ions H2 + and deuterium ions D+, is accelerated in a charged particle accelerator. Since the mass spectrograph unit in the accelerator cannot divide H2 + ions and D+ ions, both ions are accelerated together. When an H2 + ion collides against the silicon substrate, it is divided into two hydrogen ions 2H+. Since the hydrogen ion H+ and deuterium ion D+ have different ranges in silicon, two regions including a great number of crystal defects are formed in the silicon substrate in one ion irradiating step. As a result, at least three regions of different lifetimes of carriers are formed at different depths in the semiconductor substrate.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
BRIEF DESCRIPTION OF THE DRAWINGS
The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate presently preferred embodiments of the invention, and together with the general description given above and the detailed description of the preferred embodiments given below, serve to explain the principles of the invention.
FIG. 1 is a diagram showing a distribution of a crystal defect region formed at a deep level of a semiconductor substrate according to a conventional method of manufacturing a semiconductor device;
FIG. 2 is a cross sectional view showing an arrangement of a conventional high speed switching diode;
FIG. 3 is a cross sectional view showing an arrangement of an embodiment of a semiconductor device according to the present invention;
FIG. 4 is a schematic view for explaining a method of manufacturing a semiconductor device according to the present invention; and
FIG. 5 is a diagram showing a distribution of crystal defect regions formed at a deep level of a silicon semiconductor substrate according to the method of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
An embodiment of the invention will now be described with reference to the accompanying drawings.
FIG. 3 is a cross sectional view showing an arrangement of an embodiment a semiconductor device according to the present invention. The semiconductor device of this embodiment is a high-speed switching diode. A semiconductor substrate 25 is constituted by an N+ -silicon layer 11 of a high impurity concentration and an N- -epitaxial layer 12 of a low impurity concentration formed thereon. A P+ -region 13 of a high impurity concentration is formed in a portion of the surface region of the epitaxial layer 12. The protons are introduced in the diode to control the lifetime of the carriers. More specifically, a mixture of charged particles of hydrogen molecular ions H2 + and deuterium ions D+ is irradiated on the substrate 25, as will be described later. The deuterium ions D+ are introduced into a region of the N- -epitaxial layer 12 near the PN junction between the P+ -region 13 and the N- -epitaxial layer 12, thereby forming a first crystal defect region 14 including a great number of crystal defects. The hydrogen ions H+ are also introduced into a region at a predetermined depth in the N- -epitaxial layer 12 near the boundary of the N+ -silicon substrate 11, thereby forming a second crystal defect region 15. The hydrogen ions H+ pass through the first crystal defect region 14 and form the second crystal defect region 15 in a deep portion of the substrate. According to the present invention, the first and second crystal defect regions 14 and 15 are formed in one ion injection step.
Now, a method of manufacturing a semiconductor device according to the present invention will be described with reference to FIGS. 4 and 5.
FIG. 4 shows an arrangement of a charged particle accelerator for use in the present method. The charged particle accelerator in FIG. 4 comprises an ion generating unit 21, a mass spectrograph unit 22, a particle accelerator unit 23, and irradiating unit 24. In the irradiating unit 24, a silicon substrate 25 is disposed so as to face ion beams. The ion generating unit 21 generates a mixture of charged particles of the hydrogen molecular ions H2 + and the deuterium ions D+. The mass spectrograph unit 22 separates the ions by utilizing the principle that circular orbits of the ions passing through a magnetic field are different depending on the value e/m, where e: the electric charge of an ion, and m: the mass of an ion. The hydrogen molecular ion H2 + is made up of two protons (p+p) and a deuterium ion D+ is made up of one proton and one deutron (p+n). Hence, the value e/m of the hydrogen ion H2 + is substantially the same as that of the deuterium ion D+. For this reason, the mass spectrograph unit 22 cannot separate the hydrogen molecular ions H2 + and the deuterium ions D+ from each other, and both ions are supplied together to the particle accelerator unit 23. Since the other ions in the mixture have the values e/m greatly different from those of the hydrogen molecular ion H2 + and the deuterium ion D+, they are separated from both ions by the mass spectrograph unit 22. As a result, only the two kinds of ions H2 + and D+ are irradiated on the substrate 25 since the particle accelerator unit 23 can not accelerate the ions other than the ions H2 + and D+.
In the irradiation step, since two atoms of the hydrogen molecular ion H2 + are bonded each other with a low bonding energy, the hydrogen molecular ion H2 + is divided into two hydrogen ions 2H+ upon colliding against the substrate 25. As a result, the deuterium ions D+ and the hydrogen ions H+ are injected into the substrate 25 at the same time. In general, since the hydrogen ion H+ and the deuterium ion D+ have different ranges each other in silicon, these ions are stopped in the regions at different depths in the silicon substrate even if they are injected by the same acceleration voltage.
By use of the above-described charged particle accelerator, the substrate 25 is irradiated with a mixture of at least two kinds of charged particles having substantially the same value e/m, thereby forming at least two crystal defect regions including a great number of crystal defects.
FIG. 5 shows a distribution of crystal defect regions formed at deep levels in the silicon semiconductor substrate according to the method of the present invention. More specifically, FIG. 5 is a profile of crystal defect densities at deep levels (at a level 0.39 eV lower than a conductive band Ec) in a case where the hydrogen molecular ions H2 + and the deuterium ions D+ are accelerated by the acceleration voltage of 5 MeV in the charged particle accelerator in FIG. 4, and irradiated in the dosage of 1×1013 cm-2 (the sum of the dosage of hydrogen molecular ions H2 + and deuterium ions D+), on the N-type silicon substrate 25 which has the resistance of 2 Ωcm and the face orientation (100). As shown in FIG. 5, two regions II and III of high crystal defect densities are formed in the substrate. The regions II and III substantially correspond to the charged particle stopping regions. In other words, the region II is a D+ ion stopping region and the region III is an H2 + ion stopping region. As is also described above, the ranges of the hydrogen ions H+ and the deuterium ions D+ are different in silicon even if they are injected by the same acceleration voltage. Hence, the hydrogen ions H+ pass through the D+ ion stopping region, and stop at the region III. As a result, three kinds of regions which comprises the regions II and III and a region IV intervening therebetween and in which the lifetimes of the carriers are different are formed at the different depths in the semiconductor substrate 25.
The method of the present invention can be applied not only to the diode shown in FIG. 3, but also to various devices, such as a thyristor which requires two or more crystal defect regions to control the lifetime of the carriers. In such a device, the H2 + ion stopping region III can serve as a trap region for trapping the carriers near the PN junction.
As has been described above, according to the present invention, it is unnecessary to irradiate the protons by different acceleration voltages in the same number of times as that of the crystal defect regions required. Thus, the number of steps of manufacturing the semiconductor device can be decreased and also the manufacturing cost can be reduced as compared to the conventional method and the conventional device.
Additional advantages and modifications will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details, representative devices, and illustrated examples shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.

Claims (4)

What is claimed is:
1. A method of manufacturing a semiconductor device comprising the steps of:
introducing a mixture of at least two kinds of charged particles having substantially the same value e/m obtained by dividing the electric charge of an ion by the mass of the ion into a semiconductor substrate simultaneously and from the same surface of said semiconductor substrate; and
forming at least three regions of different lifetimes of carriers in said semiconductor substrate.
2. A method of manufacturing a semiconductor device according to claim 1, wherein said mixture of said charged particles is injected into said semiconductor substrate by predetermined acceleration voltage and in predetermined dosage, thereby forming said at least three regions with different crystal defect densities at different depths in said semiconductor substrate, said at least three regions of different lifetimes of carrier including two crystal defect regions and one substrate region between said two crystal defect regions in depth direction of said at least three regions.
3. A method of manufacturing a semiconductor device according to claim 1, wherein said mixture of the charged particles is subjected to mass spectrometry by a mass spectrograph, accelerated by a charged particle accelerator, and injected into the semiconductor substrate.
4. A method of manufacturing a semiconductor device according to claim 1, wherein said charged particles include hydrogen molecular ions H2 + and deuterium ions D+.
US07/959,465 1990-01-11 1992-10-09 Method of manufacturing a semiconductor device by forming at least three regions of different lifetimes of carriers at different depths Expired - Fee Related US5250446A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2-3870 1990-01-11
JP2003870A JPH0650738B2 (en) 1990-01-11 1990-01-11 Semiconductor device and manufacturing method thereof

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US07865626 Division 1992-04-04

Publications (1)

Publication Number Publication Date
US5250446A true US5250446A (en) 1993-10-05

Family

ID=11569227

Family Applications (1)

Application Number Title Priority Date Filing Date
US07/959,465 Expired - Fee Related US5250446A (en) 1990-01-11 1992-10-09 Method of manufacturing a semiconductor device by forming at least three regions of different lifetimes of carriers at different depths

Country Status (3)

Country Link
US (1) US5250446A (en)
JP (1) JPH0650738B2 (en)
KR (1) KR940002916B1 (en)

Cited By (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0709898A3 (en) * 1994-10-25 1996-06-12 Mitsubishi Electric Corp
US5576229A (en) * 1994-08-30 1996-11-19 Sharp Kabushiki Kaisha Method of fabricating a thin-film transistor and liquid-crystal display apparatus
EP0767500A2 (en) * 1995-10-03 1997-04-09 Hitachi, Ltd. Power semiconductor device with lattice defects
EP0837506A2 (en) * 1996-10-17 1998-04-22 Kabushiki Kaisha Toshiba Semiconductor device with defect layer and method of manufacturing the same
US5872387A (en) * 1996-01-16 1999-02-16 The Board Of Trustees Of The University Of Illinois Deuterium-treated semiconductor devices
US6071751A (en) * 1997-04-28 2000-06-06 Texas Instruments Incorporated Deuterium sintering with rapid quenching
US6103597A (en) * 1996-04-11 2000-08-15 Commissariat A L'energie Atomique Method of obtaining a thin film of semiconductor material
EP1039547A1 (en) * 1998-09-10 2000-09-27 Mitsubishi Denki Kabushiki Kaisha Semiconductor device
US6225192B1 (en) 1996-05-15 2001-05-01 Commissariat A L'energie Atomique Method of producing a thin layer of semiconductor material
WO2002027801A1 (en) * 2000-09-29 2002-04-04 eupec Europäische Gesellschaft für Leistungshalbleiter mbH & Co. KG Body consisting of semiconductor material, comprising a reduced mean free path length
US6521977B1 (en) 2000-01-21 2003-02-18 International Business Machines Corporation Deuterium reservoirs and ingress paths
US20030077885A1 (en) * 2000-05-30 2003-04-24 Bernard Aspar Embrittled substrate and method for making same
US6833306B2 (en) 1996-01-16 2004-12-21 Board Of Trustees Of The University Of Illinois Deuterium treatment of semiconductor device
US7883994B2 (en) 1997-12-30 2011-02-08 Commissariat A L'energie Atomique Process for the transfer of a thin film
US7902038B2 (en) 2001-04-13 2011-03-08 Commissariat A L'energie Atomique Detachable substrate with controlled mechanical strength and method of producing same
US7960248B2 (en) 2007-12-17 2011-06-14 Commissariat A L'energie Atomique Method for transfer of a thin layer
US20110233731A1 (en) * 2008-11-10 2011-09-29 Toyota Jidosha Kabushiki Kaisha Semiconductor device and method of producing the same
US8048766B2 (en) 2003-06-24 2011-11-01 Commissariat A L'energie Atomique Integrated circuit on high performance chip
US8142593B2 (en) 2005-08-16 2012-03-27 Commissariat A L'energie Atomique Method of transferring a thin film onto a support
US8193069B2 (en) 2003-07-21 2012-06-05 Commissariat A L'energie Atomique Stacked structure and production method thereof
US8252663B2 (en) 2009-06-18 2012-08-28 Commissariat A L'energie Atomique Et Aux Energies Alternatives Method of transferring a thin layer onto a target substrate having a coefficient of thermal expansion different from that of the thin layer
US8309431B2 (en) 2003-10-28 2012-11-13 Commissariat A L'energie Atomique Method for self-supported transfer of a fine layer by pulsation after implantation or co-implantation
US8389379B2 (en) 2002-12-09 2013-03-05 Commissariat A L'energie Atomique Method for making a stressed structure designed to be dissociated
US8664084B2 (en) 2005-09-28 2014-03-04 Commissariat A L'energie Atomique Method for making a thin-film element
US8778775B2 (en) 2006-12-19 2014-07-15 Commissariat A L'energie Atomique Method for preparing thin GaN layers by implantation and recycling of a starting substrate
US20160276446A1 (en) * 2014-10-03 2016-09-22 Fuji Electric Co., Ltd. Semiconductor device, and method of manufacturing semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001177114A (en) * 1999-12-17 2001-06-29 Fuji Electric Co Ltd Semiconductor device

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3865633A (en) * 1972-01-31 1975-02-11 Philips Corp Methods of manufacturing semiconductor bodies
JPS56110247A (en) * 1980-02-04 1981-09-01 Nippon Telegr & Teleph Corp <Ntt> Forming method of insulation region in semiconductor substrate
US4290825A (en) * 1978-02-13 1981-09-22 United Kingdom Atomic Energy Authority Semiconductor devices containing protons and deuterons implanted regions
JPS61166032A (en) * 1985-01-17 1986-07-26 Matsushita Electronics Corp Semiconductor substrate
US4620211A (en) * 1984-08-13 1986-10-28 General Electric Company Method of reducing the current gain of an inherent bipolar transistor in an insulated-gate semiconductor device and resulting devices
US4752818A (en) * 1985-09-28 1988-06-21 Kabushiki Kaisha Toyota Chuo Kenkyusho Semiconductor device with multiple recombination center layers
US4987087A (en) * 1988-05-19 1991-01-22 Siemens Aktiengesellschaft Process for manufacturing a thyristor with proton irradiation

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3865633A (en) * 1972-01-31 1975-02-11 Philips Corp Methods of manufacturing semiconductor bodies
US4290825A (en) * 1978-02-13 1981-09-22 United Kingdom Atomic Energy Authority Semiconductor devices containing protons and deuterons implanted regions
JPS56110247A (en) * 1980-02-04 1981-09-01 Nippon Telegr & Teleph Corp <Ntt> Forming method of insulation region in semiconductor substrate
US4620211A (en) * 1984-08-13 1986-10-28 General Electric Company Method of reducing the current gain of an inherent bipolar transistor in an insulated-gate semiconductor device and resulting devices
JPS61166032A (en) * 1985-01-17 1986-07-26 Matsushita Electronics Corp Semiconductor substrate
US4752818A (en) * 1985-09-28 1988-06-21 Kabushiki Kaisha Toyota Chuo Kenkyusho Semiconductor device with multiple recombination center layers
US4987087A (en) * 1988-05-19 1991-01-22 Siemens Aktiengesellschaft Process for manufacturing a thyristor with proton irradiation

Cited By (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5576229A (en) * 1994-08-30 1996-11-19 Sharp Kabushiki Kaisha Method of fabricating a thin-film transistor and liquid-crystal display apparatus
CN1045844C (en) * 1994-08-30 1999-10-20 夏普公司 Method of fabricating a thin-film transistor and liquid-crystal display apparatus
EP0709898A3 (en) * 1994-10-25 1996-06-12 Mitsubishi Electric Corp
EP0767500A2 (en) * 1995-10-03 1997-04-09 Hitachi, Ltd. Power semiconductor device with lattice defects
EP0767500A3 (en) * 1995-10-03 1999-07-28 Hitachi, Ltd. Power semiconductor device with lattice defects
US6147014A (en) * 1996-01-16 2000-11-14 The Board Of Trustees, University Of Illinois, Urbana Forming of deuterium containing nitride spacers and fabrication of semiconductor devices
US6888204B1 (en) 1996-01-16 2005-05-03 The Board Of Trustees Of The University Of Illinois Semiconductor devices, and methods for same
US5872387A (en) * 1996-01-16 1999-02-16 The Board Of Trustees Of The University Of Illinois Deuterium-treated semiconductor devices
US6833306B2 (en) 1996-01-16 2004-12-21 Board Of Trustees Of The University Of Illinois Deuterium treatment of semiconductor device
US6444533B1 (en) * 1996-01-16 2002-09-03 Board Of Trustees Of The University Of Illinois Semiconductor devices and methods for same
US6103597A (en) * 1996-04-11 2000-08-15 Commissariat A L'energie Atomique Method of obtaining a thin film of semiconductor material
US20060115961A1 (en) * 1996-05-15 2006-06-01 Bernard Aspar Method of producing a thin layer of semiconductor material
US6225192B1 (en) 1996-05-15 2001-05-01 Commissariat A L'energie Atomique Method of producing a thin layer of semiconductor material
US8101503B2 (en) 1996-05-15 2012-01-24 Commissariat A L'energie Atomique Method of producing a thin layer of semiconductor material
US7498234B2 (en) 1996-05-15 2009-03-03 Commissariat A L'energie Atomique Method of producing a thin layer of semiconductor material
US7067396B2 (en) 1996-05-15 2006-06-27 Commissariat A L'energie Atomique Method of producing a thin layer of semiconductor material
US6809009B2 (en) 1996-05-15 2004-10-26 Commissariat A L'energie Atomique Method of producing a thin layer of semiconductor material
US6031276A (en) * 1996-10-17 2000-02-29 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same with stable control of lifetime carriers
EP0837506A2 (en) * 1996-10-17 1998-04-22 Kabushiki Kaisha Toshiba Semiconductor device with defect layer and method of manufacturing the same
EP0837506A3 (en) * 1996-10-17 1998-10-07 Kabushiki Kaisha Toshiba Semiconductor device with defect layer and method of manufacturing the same
US6071751A (en) * 1997-04-28 2000-06-06 Texas Instruments Incorporated Deuterium sintering with rapid quenching
US8609514B2 (en) 1997-12-10 2013-12-17 Commissariat A L'energie Atomique Process for the transfer of a thin film comprising an inclusion creation step
US7883994B2 (en) 1997-12-30 2011-02-08 Commissariat A L'energie Atomique Process for the transfer of a thin film
US20110092051A1 (en) * 1997-12-30 2011-04-21 Commissariat A L'energie Atomique Process for the transfer of a thin film comprising an inclusion creation step
US8470712B2 (en) 1997-12-30 2013-06-25 Commissariat A L'energie Atomique Process for the transfer of a thin film comprising an inclusion creation step
EP1039547A4 (en) * 1998-09-10 2007-06-20 Mitsubishi Electric Corp Semiconductor device
US6472692B1 (en) * 1998-09-10 2002-10-29 Mitsubishi Denki Kabushiki Kaisha Semiconductor device
EP2172976A3 (en) * 1998-09-10 2010-05-05 Mitsubishi Denki Kabushiki Kaisha Semiconductor Device
EP1039547A1 (en) * 1998-09-10 2000-09-27 Mitsubishi Denki Kabushiki Kaisha Semiconductor device
US6521977B1 (en) 2000-01-21 2003-02-18 International Business Machines Corporation Deuterium reservoirs and ingress paths
US20030102529A1 (en) * 2000-01-21 2003-06-05 Jay Burnham Deuterium reservoirs and ingress paths
US6770501B2 (en) 2000-01-21 2004-08-03 International Business Machines Corporation Deuterium reservoirs and ingress paths
US7498245B2 (en) * 2000-05-30 2009-03-03 Commissariat A L'energie Atomique Embrittled substrate and method for making same
US20030077885A1 (en) * 2000-05-30 2003-04-24 Bernard Aspar Embrittled substrate and method for making same
WO2002027801A1 (en) * 2000-09-29 2002-04-04 eupec Europäische Gesellschaft für Leistungshalbleiter mbH & Co. KG Body consisting of semiconductor material, comprising a reduced mean free path length
US7902038B2 (en) 2001-04-13 2011-03-08 Commissariat A L'energie Atomique Detachable substrate with controlled mechanical strength and method of producing same
US8389379B2 (en) 2002-12-09 2013-03-05 Commissariat A L'energie Atomique Method for making a stressed structure designed to be dissociated
US8048766B2 (en) 2003-06-24 2011-11-01 Commissariat A L'energie Atomique Integrated circuit on high performance chip
US8193069B2 (en) 2003-07-21 2012-06-05 Commissariat A L'energie Atomique Stacked structure and production method thereof
US8309431B2 (en) 2003-10-28 2012-11-13 Commissariat A L'energie Atomique Method for self-supported transfer of a fine layer by pulsation after implantation or co-implantation
US8142593B2 (en) 2005-08-16 2012-03-27 Commissariat A L'energie Atomique Method of transferring a thin film onto a support
US8664084B2 (en) 2005-09-28 2014-03-04 Commissariat A L'energie Atomique Method for making a thin-film element
US8778775B2 (en) 2006-12-19 2014-07-15 Commissariat A L'energie Atomique Method for preparing thin GaN layers by implantation and recycling of a starting substrate
US7960248B2 (en) 2007-12-17 2011-06-14 Commissariat A L'energie Atomique Method for transfer of a thin layer
US20110233731A1 (en) * 2008-11-10 2011-09-29 Toyota Jidosha Kabushiki Kaisha Semiconductor device and method of producing the same
US8252663B2 (en) 2009-06-18 2012-08-28 Commissariat A L'energie Atomique Et Aux Energies Alternatives Method of transferring a thin layer onto a target substrate having a coefficient of thermal expansion different from that of the thin layer
US20160276446A1 (en) * 2014-10-03 2016-09-22 Fuji Electric Co., Ltd. Semiconductor device, and method of manufacturing semiconductor device
US10312331B2 (en) * 2014-10-03 2019-06-04 Fuji Electric Co., Ltd. Semiconductor device, and method of manufacturing semiconductor device
US10923570B2 (en) 2014-10-03 2021-02-16 Fuji Electric Co., Ltd. Manufacturing method for controlling carrier lifetimes in semiconductor substrates that includes injection and annealing
US11646350B2 (en) 2014-10-03 2023-05-09 Fuji Electric Co., Ltd. Semiconductor device, and method of manufacturing semiconductor device

Also Published As

Publication number Publication date
KR910015007A (en) 1991-08-31
JPH03209726A (en) 1991-09-12
KR940002916B1 (en) 1994-04-07
JPH0650738B2 (en) 1994-06-29

Similar Documents

Publication Publication Date Title
US5250446A (en) Method of manufacturing a semiconductor device by forming at least three regions of different lifetimes of carriers at different depths
Rimini Ion implantation: basics to device fabrication
US4278475A (en) Forming of contoured irradiated regions in materials such as semiconductor bodies by nuclear radiation
US4056408A (en) Reducing the switching time of semiconductor devices by nuclear irradiation
Sawko et al. Production of fast switching power thyristors by proton irradiation
Kozlov et al. Doping of semiconductors using radiation defects produced by irradiation with protons and alpha particles
US3756862A (en) Proton enhanced diffusion methods
JPH03171777A (en) Semiconductor device
US20100009551A1 (en) Semiconductor device and method for manufacturing the same
US5075751A (en) Semiconductor device
CN101884106A (en) Semiconductor module
US6504230B2 (en) Compensation component and method for fabricating the compensation component
KR19980069877A (en) Single poly EPROM cell using reduced programming voltage to program the cell
US6252259B1 (en) Semiconductor switching device having different carrier lifetimes between a first portion serving as a main current path and the remaining portion of the device
US4004950A (en) Method for improving the doping of a semiconductor material
IE51813B1 (en) Reducing the reverse recovery charge of thyristors by nuclear irradiation
US6255693B1 (en) Ion implantation with programmable energy, angle, and beam current
US4318750A (en) Method for radiation hardening semiconductor devices and integrated circuits to latch-up effects
US3877997A (en) Selective irradiation for fast switching thyristor with low forward voltage drop
Silber et al. Improved dynamic properties of GTO-thyristors and diodes by proton implantation
US3881963A (en) Irradiation for fast switching thyristors
JP3210013B2 (en) Thyristor with adjustable breakover voltage and method of manufacturing the same
EP1298717A1 (en) Method for manufacturing a semiconductor device having a pn junction area
EP0032386A2 (en) A method for tailoring forward voltage drop (VTM) switching time (tq) and reverse-recovery charge (Qrr) in a power thyristor using nuclear particle and electron irradiation
JP3185445B2 (en) Method for manufacturing semiconductor device

Legal Events

Date Code Title Description
FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 4

FPAY Fee payment

Year of fee payment: 8

REMI Maintenance fee reminder mailed
LAPS Lapse for failure to pay maintenance fees
STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362

FP Lapsed due to failure to pay maintenance fee

Effective date: 20051005