US5703396A - Plastic encapsulated semiconductor device having wing leads - Google Patents

Plastic encapsulated semiconductor device having wing leads Download PDF

Info

Publication number
US5703396A
US5703396A US08/739,890 US73989096A US5703396A US 5703396 A US5703396 A US 5703396A US 73989096 A US73989096 A US 73989096A US 5703396 A US5703396 A US 5703396A
Authority
US
United States
Prior art keywords
lead
wing
leads
plastic
island
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
US08/739,890
Inventor
Kenichi Kurihara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Assigned to NEC CORPORATION reassignment NEC CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KURIHARA, KENICHI
Application granted granted Critical
Publication of US5703396A publication Critical patent/US5703396A/en
Assigned to NEC ELECTRONICS CORPORATION reassignment NEC ELECTRONICS CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: NEC CORPORATION
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49548Cross section geometry
    • H01L23/49551Cross section geometry characterised by bent parts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49503Lead-frames or other flat leads characterised by the die pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Definitions

  • the present invention relates to a plastic encapsulated semiconductor device having wing leads.
  • FIG. 1 there is shown one example of a conventional lead frame, which is generally designated with Reference Numeral 1, and includes a rectangular island (or die pad) 4 for bearing a semiconductor chip (not shown) thereon, a pair of hanger pins 3 extending outwardly from a pair of opposite long-sides of the rectangular island 4 to a frame 8 of the lead frame 1 so that the island 4 is supported by the frame 8, a number of outer leads 4 (of terminal leads) formed to extend out of a resin or plastic packaged semiconductor device, a number of inner leads 5 (of terminal leads) formed so as to be located within an inside of the plastic packaged semiconductor device and extending outwardly from a proximity of the island 4 to corresponding outer leads 4, and a pair of tie-bars 6 for tying the outer leads and for preventing flow-out of plastic when plastic packaging is carried out.
  • a number of outer leads 4 formed to extend out of a resin or plastic packaged semiconductor device
  • inner leads 5 of terminal leads
  • tie-bars 6 for tying the outer leads and for preventing
  • a semiconductor chip (not shown) is die-bonded on the island 2 of the lead frame 1 mentioned above, and then, wire bonding is carried out to interconnect each of the electrodes on the semiconductor chip and a corresponding inner lead 5, and thereafter, the assembly thus obtained is molded or packaged with plastic in a volume defined by mold line 7 shown in FIG. 1.
  • the plastic flowing out between each pair of adjacent leads is blocked by the tie-bars 6, so that plastic remains in the form of a burr or flash between each pair of adjacent leads in the inside of the tie-bars 6. Furthermore, the flash between each pair of adjacent leads and the tie-bars is cut out by cutting die.
  • the outer leads 4 are plated with a desired metal, and then, a tip end of each output lead and the hanger pins are cut, so that the plastic packaged semiconductor device is separated from the outer frame 8 of the lead frame.
  • the outer leads 4 are shaped or bent into a desired shape. Thus, the plastic packaged semiconductor device is completed.
  • JP-A-63-133656 proposes a lead frame having a wing lead as shown in FIG. 2.
  • the disclosure of JP-A-63-133656 is incorporated by reference in its entirety into the present application.
  • elements corresponding to those shown in FIG. 1 are given the same Reference Numerals, and explanation thereof will be omitted.
  • the lead frame generally designated with Reference Numeral 9 in FIG. 2 includes, in addition to the hanger pins 3, a pair of extensions 10 which extend outwardly from a pair of opposite short-sides of the rectangular island 4, each of the extensions 10 extending between a pair of inner leads 5 and coupled to the tie-bar 6. Since the extension 10 supports the island 2 but extends between the terminal leads, the extension 10 is called a "wing lead" in order to distinguish the extension 10 from the hanger pins 3.
  • the wing leads 10 function to expel the moisture penetrated into the plastic molded body to the outside of the plastic molded body, and therefore, can prevent occurrence of the cracks which would otherwise occur because of the heat added at the time of mounting the plastic packaged semiconductor device on the printed circuit board. Therefore, the wing leads are provided at a location where distance between the edge of the island and the edge of the plastic molded body (namely, the mold line 7) is the shortest. For example, in the lead frame shown in FIG. 2, the wing leads are provided at a center in a longitudinal direction of the plastic molded body. In addition, since the wing leads also act as island support leads, stable plastic molding can be realized.
  • the wing lead 10 should have been cut out together with the flash between each pair of adjacent leads and the tie-bars in a conventional tie-bar cutting process in which the flash between each pair of adjacent leads and the tie-bars are cut out by a cutting die.
  • FIG. 3 there is shown a diagrammatic section view of the plastic packaged semiconductor device manufactured by using the lead frame having the wing leads.
  • elements corresponding to those shown in FIG. 2 are given the same Reference Numerals.
  • Reference Numeral 11 designates a semiconductor integrated circuit chip
  • Reference Numeral 12 indicates a bonding wire.
  • Reference Numeral 13 shows an encapsulating plastic molded body.
  • the plane of the island 2 is positioned at a level lower than the plane in which the inner leads 5 are positioned and the output leads 5 extend out from the encapsulating plastic molded body 13.
  • the wing lead 10 extending outwardly from the edge of the island 2 is bent since the wing lead is coupled to the tie bar 6 which is put in the same plane as that of the terminal leads 4 and 5, so that the wing leads 10 are drawn out from the encapsulating plastic molded body 13 in the same plane as that of the terminal leads 4 and 5.
  • the wing leads are provided in the lead frame, it is necessary to modify punch and die of the conventional cutting die set for the lead frame having no wing lead, into respective shapes capable of simultaneously cutting out not only the flash between each pair of adjacent terminal leads and the tie-bars, but also the wing leads. Therefore, it is required to form the wing leads at the same positions in common to all semiconductor devices.
  • the wing lead is formed between an pair of adjacent terminal leads, if a pitch of the terminal leads (namely, an interval between adjacent terminal leads) is narrowed in order to downsize or microminiaturize the semiconductor device, it is also necessary to modify the shape of the punch and die at a wing lead portion of the tie-bar cutting die set. This makes it difficult to machine the punch and the die. In addition, this reduces the lift time of parts of the cutting die set.
  • Another object of the present invention is to provide an improved plastic encapsulated semiconductor device having wing leads with no hindrance even if pitch of terminal leads is narrowed.
  • a plastic encapsulated semiconductor device comprising a semiconductor chip supported on an island, a plurality of terminal leads each having an inner lead and an outer lead, the inner lead of each terminal lead outwardly extending from a proximity of the island and being electrically connected to a corresponding electrode of the semiconductor chip through a connection wire, and at least one wing lead outwardly extending from the island between a pair of adjacent terminal leads of the terminal leads, and a plastic molded body encapsulating therein the semiconductor chip, the island, the inner lead of each terminal lead and the connection wire in such a manner that the outer lead of each terminal lead is projected from the plastic molded body and a tip end of the at least one wing lead is exposed from the plastic molded body so as to expel possible moisture contained in the plastic molded body, wherein the improvement is characterized in that the at least one wing lead is positioned in a plane different in level from a plane of the terminal leads, so that the at least one wing
  • the at least one wing lead has a bent portion in the way thereof.
  • the at least one wing lead is positioned in a plane lower in level than the plane of the terminal leads.
  • a lead frame comprising an island for bearing a semiconductor chip, at least one hanger pin extending outwardly from the island to a frame of the lead frame, for supporting the island, a plurality of terminal leads each having an inner lead and an outer lead, the inner lead of each terminal lead outwardly extending from a proximity of the island, and the outer lead of each terminal lead outwardly continuously extending from a terminating end of the inner lead of the same terminal lead, at least one tie-bar mutually tying the terminal leads for preventing flow-out of plastic when plastic packaging is carried out, and at least one wing lead outwardly extending from the island between a pair of adjacent terminal leads and having a free outer end which is not coupled with the at least one tie-bar.
  • a method for manufacturing a plastic encapsulated semiconductor device which comprises a semiconductor chip supported on an island, a plurality of terminal leads each having an inner lead and an outer lead, the inner lead of each terminal lead outwardly extending from a proximity of the island and being electrically connected to a corresponding electrode of the semiconductor chip through a connection wire, and at least one wing lead outwardly extending from the island between a pair of adjacent terminal leads of the terminal leads, and a plastic molded body encapsulating therein the semiconductor chip, the island, the inner lead of each terminal lead and the connection wire in such a manner that the outer lead of each terminal lead is projected from the plastic molded body and a tip end of the at least one wing lead is exposed from the plastic molded body so as to expel possible moisture contained in the plastic molded body,
  • the method is characterized by using a lead frame having the at least one wing lead having a free outer end which is not coupled to a tie-bar of the lead frame, and deforming the lead frame to cause the at least one wing lead to be positioned in a plane different in level from a plane of the terminal leads, so that the at least one wing lead does not interfere with the terminal leads.
  • the semiconductor chip is die-bonded on the island, and the inner lead of each terminal lead is electrically connected to the corresponding electrode of the semiconductor chip through the connection wire, and thereafter, a plastic encapsulation is carried out by using a plastic-encapsulating lower molding die having a stepped portion at a position not higher in level than the plane of the at least one wing lead, and by putting the at least one wing lead on the stepped portion of the plastic-encapsulating lower molding die.
  • the at least one wing lead has a length longer than the distance between an outer edge of the island and a side surface of a plastic-encapsulating molding die, and is resiliently deformed so that the free outer end of at least one wing lead is pushed against the side surface of the plastic-encapsulating molding die when a plastic encapsulation is carried out.
  • FIG. 1 is a pattern diagram of one example of a conventional lead frame
  • FIG. 2 is a pattern diagram of another example of a conventional lead frame, having a wing lead;
  • FIG. 3 is a diagrammatic sectional view of the conventional plastic packaged semiconductor device manufactured by using the conventional lead frame having the wing leads;
  • FIG. 4 is a diagrammatic sectional view of a first embodiment of the plastic packaged semiconductor device in accordance with the present invention.
  • FIG. 5 is a pattern diagram of a first example of the lead frame in accordance with the present invention having a wing lead, used in the plastic packaged semiconductor device shown in FIG. 4;
  • FIG. 6 is a pattern diagram of a second example of the lead frame in accordance with the present invention having a wing lead, used in the plastic packaged semiconductor device shown in FIG. 4;
  • FIG. 7 is a diagrammatic sectional view of a second embodiment of the plastic packaged semiconductor device in accordance with the present invention.
  • FIG. 4 there is shown a diagrammatic sectional view of a first embodiment of the plastic packaged semiconductor device in accordance with the present invention.
  • the plastic packaged semiconductor device is generally designated by Reference Numeral 14, and a first example of a lead frame used in the plastic packaged semiconductor device 14 is shown in a pattern diagram of FIG. 5, and generally designated by Reference Numeral 15.
  • the lead frame 15 includes a rectangular island 16 for bearing thereon a semiconductor chip (designated with Reference Numeral 20 in FIG. 4), a pair of hanger pins 28 extending outwardly from a pair of opposite long-sides of the rectangular island 16 to a frame 15A of the lead frame 15 so that the island 16 is supported by the frame 15A, a number of outer leads 18 (of terminal leads) formed to extend outwardly from a plastic molded body (designated with Reference Numeral 25 in FIG.
  • the wing leads 17 function to expel the moisture penetrating into the plastic molded body (designated with Reference Numeral 25 in FIG. 4) to the outside of the plastic molded body, and therefore, can prevent occurrence of the cracks which would otherwise occur because of the heat added at the time of mounting the plastic packaged semiconductor device on the printed circuit board.
  • the lead frame 15 is characterized in that the wing lead 17 extending from each short-side of the rectangular island 16 has a free outer end which is not coupled with the tie-bars 21 and which terminates in the inside of a mold line 25A, as clearly shown in FIG. 5, and the hanger pins 28 have a stepped portion which is provided in the way thereof and which can be formed by a depressing machining so that a plane of the island 16 is lower in level than a plane in which the inner leads 19 are positioned and the output leads 18 extend out from the encapsulating plastic molded body 25.
  • the wing leads 17 are not subjected to depress machining, the wing leads 17 are in the same plane as that of the island 16.
  • the embodiment of the semiconductor device 14 shown in FIG. 4 manufactured by using the lead frame 15 as mentioned above, is such that a semiconductor chip 20 is mounted or die-bonded on the island 16 by a mounting material 23 such as solder, and electrodes 20A on the semiconductor chip 20 are connected to the inner leads 19 through bonding wires 24 by a wiring bonding process.
  • the island 16 and the semiconductor chip 20 thus assembled are encapsulated with a plastic molded body 25, as shown in FIG. 4.
  • a plastic-encapsulating lower molding die 26 having a stepped portion 26A at the same height as that of the island plane, as shown by the two-dot ghost line in FIG. 4, is used in combination with a conventional plastic-encapsulating upper molding die (not shown), in such a manner the wing leads 17 are supported on the stepped portion 26A, and then, plastic is injected into a space defined by the upper and lower molding dies, so that a lower surface 17A of the free outer end portion of the wing leads 17 in the same plane as the island plane is exposed from the shaped plastic molded body 25, as seen from FIG. 4.
  • the island 16 is set down at a level lower than that of the terminal leads 18 and 19 by the depress-machining of the hanger pin 28 at the stepped portion 22.
  • this depress-machining if the island 16 is set down at a level deeper than the stepped portion 26A of the plastic-encapsulating lower molding die 26 by the degree of 30 ⁇ m to 50 ⁇ m, it is possible to cause the free outer end of the wing lead 17 to be stably exposed from the shaped plastic molded body 25.
  • the wing lead 17 of the lead frame 15 is not coupled to tie-bar 21, it is no longer necessary to cut off the wing lead 17. Accordingly, it is possible to use the conventional tie-bar cutting die having no wing lead cutting blade. Therefore, even if the lead pitch is narrowed, it is no longer difficult to machine the punch and die of the cutting die, nor is lift time of parts of the cutting die set become reduced.
  • the wing leads 17 are not in the same places as that of the inner leads 19 and the outer leads 18, the wing leads 17 never interfere with the inner leads 19 and outer leads 18. Therefore, even if the pitch of the inner leads 19 and outer leads 18 (namely, the interval between the terminal leads) is narrowed, it is always possible to provide the wing leads 17, whereby package cracking can be surely prevented when the semiconductor device is mounted on a printed circuit board.
  • the wing lead 17 can be stably exposed from the shaped plastic molded body 25, thereby certainly prevents the package cracking.
  • FIG. 7 there is shown a diagrammatic section view of a second embodiment of the plastic packaged semiconductor device in accordance with the present invention.
  • elements similar to those shown in FIG. 4 are given the same Reference Numerals, and explanation thereof will be omitted.
  • each wing lead 30 extending outwardly from the island 16 has a length slightly longer than the distance between the edge of the island and the side surface of the plastic-encapsulating molding die at level of the island and has an upward bent portion 30A, but a free outer end portion of the wing lead 30 is in the same plane as that of the island 16.
  • the plastic packaged semiconductor device 29 of the second embodiment has the same advantage as that obtained in the plastic packaged semiconductor device 14 of the first embodiment. Furthermore, since the wing lead 30 has the bent portion 30A, when the wing lead 30 is compressed in a lengthwise direction, a restoring force is exerted. In other words, a spring action occurs. Therefore, if the plastic encapsulation is carried out when the free outer end of the wing lead 30 is resiliently pushed onto a side surface 31A of a conventional plastic-encapsulating lower molding die 31, the wing lead 30 ceaselessly exerts a pushing force against the side surface 31A of the molding die 31 in the course of the plastic encapsulating process, so that the free outer end of the wing lead 30 is surely exposed from the plastic molded body 25. As a result, package cracking can be surely prevented.
  • the hanger pins are depress-machined in order to put the wing leads and the terminal leads at different level planes, respectively.
  • the wing leads may be depress-machined in place of the hanger pin.
  • the number and the location of the inner leads, the outer leads and the hanger pins shown in FIGS. 5 and 6 may be freely modified.
  • the wing lead can be bent downward, in place of the upward bent portion 30A. Furthermore, two or more bend portions may be provided in the wing lead.
  • the wing lead can be formed to have a length slightly longer than the distance between the side of the island and the side surface of the plastic-encapsulating molding die, and the wing lead can be resiliently deformed by slightly bending the wing lead, so that the tip end of the wing lead is pushed against the side surface of the plastic-encapsulating molding die.
  • the wing leads and the terminal leads are not in the same place, the wing leads never interfere with the terminal leads. Therefore, even if the pitch of the terminal leads is narrowed, since it is always possible to provide the wing leads, the package crack caused by thermal shock when the semiconductor device is mounted on a printed circuit board, can be surely prevented.
  • the wing lead is not coupled to the tie-bar, it is no longer necessary to cut off the wing lead. Accordingly, it is possible to use the conventional tie-bar cutting die having no wing lead cutting blade. In addition, even if the lead pitch is narrowed, it is no longer difficult to machine the punch and the die of the cutting die, nor lift time of parts of the cutting die set reduced.

Abstract

In a plastic encapsulated semiconductor device, there is used a lead frame including an island for bearing thereon a semiconductor chip, a number of terminal leads extending outwardly from a proximity of the island, a pair of wing leads extending outwardly from a pair of opposite short-sides of the island. The wing leads are not coupled with tie-bars of the lead frame, and are positioned in a plane lower in level than a plane of the terminal leads. With this arrangement, even if pitch of the terminal leads is narrowed, the wing leads can be made not to interfere interfering with the terminal leads.

Description

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a plastic encapsulated semiconductor device having wing leads.
2. Description of Related Art
Referring to FIG. 1, there is shown one example of a conventional lead frame, which is generally designated with Reference Numeral 1, and includes a rectangular island (or die pad) 4 for bearing a semiconductor chip (not shown) thereon, a pair of hanger pins 3 extending outwardly from a pair of opposite long-sides of the rectangular island 4 to a frame 8 of the lead frame 1 so that the island 4 is supported by the frame 8, a number of outer leads 4 (of terminal leads) formed to extend out of a resin or plastic packaged semiconductor device, a number of inner leads 5 (of terminal leads) formed so as to be located within an inside of the plastic packaged semiconductor device and extending outwardly from a proximity of the island 4 to corresponding outer leads 4, and a pair of tie-bars 6 for tying the outer leads and for preventing flow-out of plastic when plastic packaging is carried out.
In one method for manufacturing a plastic packaged semiconductor device using the lead frame 1 mentioned above, a semiconductor chip (not shown) is die-bonded on the island 2 of the lead frame 1 mentioned above, and then, wire bonding is carried out to interconnect each of the electrodes on the semiconductor chip and a corresponding inner lead 5, and thereafter, the assembly thus obtained is molded or packaged with plastic in a volume defined by mold line 7 shown in FIG. 1. In this plastic packaging process, the plastic flowing out between each pair of adjacent leads is blocked by the tie-bars 6, so that plastic remains in the form of a burr or flash between each pair of adjacent leads in the inside of the tie-bars 6. Furthermore, the flash between each pair of adjacent leads and the tie-bars is cut out by cutting die. Thereafter, the outer leads 4 are plated with a desired metal, and then, a tip end of each output lead and the hanger pins are cut, so that the plastic packaged semiconductor device is separated from the outer frame 8 of the lead frame. In addition, the outer leads 4 are shaped or bent into a desired shape. Thus, the plastic packaged semiconductor device is completed.
When the plastic packaged semiconductor device manufactured as mentioned above is mounted on a printed circuit board by using solder, the problem was often encountered that, because of thermal shock at the time of performing solder dipping, moisture penetrating into the plastic molded body gasifies before it is expelled out from the plastic molded body, so that the gasified moisture expands within the plastic molded body, with the result that cracks occur in the plastic molded body.
In order to solve this problem, Japanese Patent Application Laid-open Publication JP-A-63-133656 proposes a lead frame having a wing lead as shown in FIG. 2. The disclosure of JP-A-63-133656 is incorporated by reference in its entirety into the present application. In FIG. 2, elements corresponding to those shown in FIG. 1 are given the same Reference Numerals, and explanation thereof will be omitted.
As seen from comparison between FIGS. 1 and 2, the lead frame generally designated with Reference Numeral 9 in FIG. 2 includes, in addition to the hanger pins 3, a pair of extensions 10 which extend outwardly from a pair of opposite short-sides of the rectangular island 4, each of the extensions 10 extending between a pair of inner leads 5 and coupled to the tie-bar 6. Since the extension 10 supports the island 2 but extends between the terminal leads, the extension 10 is called a "wing lead" in order to distinguish the extension 10 from the hanger pins 3.
When a plastic packaged semiconductor device is manufactured by using this lead frame 9, since a tip end of the wing leads 10 is exposed at the outside of the plastic molded body, the wing leads 10 function to expel the moisture penetrated into the plastic molded body to the outside of the plastic molded body, and therefore, can prevent occurrence of the cracks which would otherwise occur because of the heat added at the time of mounting the plastic packaged semiconductor device on the printed circuit board. Therefore, the wing leads are provided at a location where distance between the edge of the island and the edge of the plastic molded body (namely, the mold line 7) is the shortest. For example, in the lead frame shown in FIG. 2, the wing leads are provided at a center in a longitudinal direction of the plastic molded body. In addition, since the wing leads also act as island support leads, stable plastic molding can be realized.
However, a portion of the wing lead 10 positioned at the outside of the plastic molded body (the outside of the mold line 7) has to be cut out since that portion is not necessary as the wing lead. Therefore, the wing lead 10 should have been cut out together with the flash between each pair of adjacent leads and the tie-bars in a conventional tie-bar cutting process in which the flash between each pair of adjacent leads and the tie-bars are cut out by a cutting die. However, in order to cut the wing lead 10 together with the flash between each pair of adjacent leads and the tie-bars, since the wing lead 10 is added to the flash between each pair of adjacent leads and the tie-bars, it is necessary to modify the punch and die of a cutting die set to a shape capable of simultaneously cutting out not only the flash between each pair of adjacent leads and the tie-bars, but also the wing leads 10.
Referring to FIG. 3, there is shown a diagrammatic section view of the plastic packaged semiconductor device manufactured by using the lead frame having the wing leads. In FIG. 3, elements corresponding to those shown in FIG. 2 are given the same Reference Numerals. In FIG. 2, in addition, Reference Numeral 11 designates a semiconductor integrated circuit chip, and Reference Numeral 12 indicates a bonding wire. Reference Numeral 13 shows an encapsulating plastic molded body.
As shown in FIG. 3, the plane of the island 2 is positioned at a level lower than the plane in which the inner leads 5 are positioned and the output leads 5 extend out from the encapsulating plastic molded body 13. However, the wing lead 10 extending outwardly from the edge of the island 2 is bent since the wing lead is coupled to the tie bar 6 which is put in the same plane as that of the terminal leads 4 and 5, so that the wing leads 10 are drawn out from the encapsulating plastic molded body 13 in the same plane as that of the terminal leads 4 and 5.
As mentioned above, when the wing leads are provided in the lead frame, it is necessary to modify punch and die of the conventional cutting die set for the lead frame having no wing lead, into respective shapes capable of simultaneously cutting out not only the flash between each pair of adjacent terminal leads and the tie-bars, but also the wing leads. Therefore, it is required to form the wing leads at the same positions in common to all semiconductor devices.
Furthermore, since the wing lead is formed between an pair of adjacent terminal leads, if a pitch of the terminal leads (namely, an interval between adjacent terminal leads) is narrowed in order to downsize or microminiaturize the semiconductor device, it is also necessary to modify the shape of the punch and die at a wing lead portion of the tie-bar cutting die set. This makes it difficult to machine the punch and the die. In addition, this reduces the lift time of parts of the cutting die set.
Because of the above mentioned circumstances, if the pitch of the terminal leads is narrowed, it has in some cases become impossible to provide the wing leads. In this case, the problem cannot be avoided in which, in an encapsulating process, the island is often exposed, and package cracks occur at the time of mounting the semiconductor device on printed circuit board. In addition, since the position of the wing leads is fixed, the degree of freedom in lead design is restricted.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a plastic encapsulated semiconductor device having wing leads, which has overcomes the above mentioned defects of the prior art.
Another object of the present invention is to provide an improved plastic encapsulated semiconductor device having wing leads with no hindrance even if pitch of terminal leads is narrowed.
The above and other objects of the present invention are achieved in accordance with the present invention by a plastic encapsulated semiconductor device comprising a semiconductor chip supported on an island, a plurality of terminal leads each having an inner lead and an outer lead, the inner lead of each terminal lead outwardly extending from a proximity of the island and being electrically connected to a corresponding electrode of the semiconductor chip through a connection wire, and at least one wing lead outwardly extending from the island between a pair of adjacent terminal leads of the terminal leads, and a plastic molded body encapsulating therein the semiconductor chip, the island, the inner lead of each terminal lead and the connection wire in such a manner that the outer lead of each terminal lead is projected from the plastic molded body and a tip end of the at least one wing lead is exposed from the plastic molded body so as to expel possible moisture contained in the plastic molded body, wherein the improvement is characterized in that the at least one wing lead is positioned in a plane different in level from a plane of the terminal leads, so that the at least one wing lead does not interfere with the terminal leads.
In one embodiment, the at least one wing lead has a bent portion in the way thereof. In addition, the at least one wing lead is positioned in a plane lower in level than the plane of the terminal leads.
According to another aspect of the present invention, there is provided a lead frame comprising an island for bearing a semiconductor chip, at least one hanger pin extending outwardly from the island to a frame of the lead frame, for supporting the island, a plurality of terminal leads each having an inner lead and an outer lead, the inner lead of each terminal lead outwardly extending from a proximity of the island, and the outer lead of each terminal lead outwardly continuously extending from a terminating end of the inner lead of the same terminal lead, at least one tie-bar mutually tying the terminal leads for preventing flow-out of plastic when plastic packaging is carried out, and at least one wing lead outwardly extending from the island between a pair of adjacent terminal leads and having a free outer end which is not coupled with the at least one tie-bar.
According to still another aspect of the present invention, there is provided a method for manufacturing a plastic encapsulated semiconductor device which comprises a semiconductor chip supported on an island, a plurality of terminal leads each having an inner lead and an outer lead, the inner lead of each terminal lead outwardly extending from a proximity of the island and being electrically connected to a corresponding electrode of the semiconductor chip through a connection wire, and at least one wing lead outwardly extending from the island between a pair of adjacent terminal leads of the terminal leads, and a plastic molded body encapsulating therein the semiconductor chip, the island, the inner lead of each terminal lead and the connection wire in such a manner that the outer lead of each terminal lead is projected from the plastic molded body and a tip end of the at least one wing lead is exposed from the plastic molded body so as to expel possible moisture contained in the plastic molded body,
wherein the method is characterized by using a lead frame having the at least one wing lead having a free outer end which is not coupled to a tie-bar of the lead frame, and deforming the lead frame to cause the at least one wing lead to be positioned in a plane different in level from a plane of the terminal leads, so that the at least one wing lead does not interfere with the terminal leads.
Preferably, after the lead frame is deformed to cause the at least one wing lead to be positioned in a plane lower in level than the plane of the terminal leads, the semiconductor chip is die-bonded on the island, and the inner lead of each terminal lead is electrically connected to the corresponding electrode of the semiconductor chip through the connection wire, and thereafter, a plastic encapsulation is carried out by using a plastic-encapsulating lower molding die having a stepped portion at a position not higher in level than the plane of the at least one wing lead, and by putting the at least one wing lead on the stepped portion of the plastic-encapsulating lower molding die.
In a preferred embodiment, the at least one wing lead has a length longer than the distance between an outer edge of the island and a side surface of a plastic-encapsulating molding die, and is resiliently deformed so that the free outer end of at least one wing lead is pushed against the side surface of the plastic-encapsulating molding die when a plastic encapsulation is carried out.
The above and other objects, features and advantages of the present invention will be apparent from the following description of preferred embodiments of the invention with reference to the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a pattern diagram of one example of a conventional lead frame;
FIG. 2 is a pattern diagram of another example of a conventional lead frame, having a wing lead;
FIG. 3 is a diagrammatic sectional view of the conventional plastic packaged semiconductor device manufactured by using the conventional lead frame having the wing leads;
FIG. 4 is a diagrammatic sectional view of a first embodiment of the plastic packaged semiconductor device in accordance with the present invention;
FIG. 5 is a pattern diagram of a first example of the lead frame in accordance with the present invention having a wing lead, used in the plastic packaged semiconductor device shown in FIG. 4;
FIG. 6 is a pattern diagram of a second example of the lead frame in accordance with the present invention having a wing lead, used in the plastic packaged semiconductor device shown in FIG. 4; and
FIG. 7 is a diagrammatic sectional view of a second embodiment of the plastic packaged semiconductor device in accordance with the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring to FIG. 4, there is shown a diagrammatic sectional view of a first embodiment of the plastic packaged semiconductor device in accordance with the present invention. In FIG. 4, the plastic packaged semiconductor device is generally designated by Reference Numeral 14, and a first example of a lead frame used in the plastic packaged semiconductor device 14 is shown in a pattern diagram of FIG. 5, and generally designated by Reference Numeral 15.
Before explaining the plastic packaged semiconductor device 14 shown in FIG. 4, the lead frame 15 shown in FIG. 5 will be explained.
As shown in FIG. 5, the lead frame 15 includes a rectangular island 16 for bearing thereon a semiconductor chip (designated with Reference Numeral 20 in FIG. 4), a pair of hanger pins 28 extending outwardly from a pair of opposite long-sides of the rectangular island 16 to a frame 15A of the lead frame 15 so that the island 16 is supported by the frame 15A, a number of outer leads 18 (of terminal leads) formed to extend outwardly from a plastic molded body (designated with Reference Numeral 25 in FIG. 4) of the plastic packaged semiconductor device, a number of inner leads 19 formed to be located within an inside of the plastic molded body and extending outwardly from a proximity of the island 16 to corresponding outer leads 18, a pair of tie-bars 21 for tying the outer leads 18 and for preventing flow-out of plastic when plastic packaging is carried out, and a pair of wing leads 17 extending outwardly from a pair of opposite short-sides of the rectangular island 16, each of the wing leads 17 10 extending between a pair of inner leads 19. The wing leads 17 function to expel the moisture penetrating into the plastic molded body (designated with Reference Numeral 25 in FIG. 4) to the outside of the plastic molded body, and therefore, can prevent occurrence of the cracks which would otherwise occur because of the heat added at the time of mounting the plastic packaged semiconductor device on the printed circuit board.
In the shown embodiment, the lead frame 15 is characterized in that the wing lead 17 extending from each short-side of the rectangular island 16 has a free outer end which is not coupled with the tie-bars 21 and which terminates in the inside of a mold line 25A, as clearly shown in FIG. 5, and the hanger pins 28 have a stepped portion which is provided in the way thereof and which can be formed by a depressing machining so that a plane of the island 16 is lower in level than a plane in which the inner leads 19 are positioned and the output leads 18 extend out from the encapsulating plastic molded body 25. On the other hand, since the wing leads 17 are not subjected to depress machining, the wing leads 17 are in the same plane as that of the island 16.
The embodiment of the semiconductor device 14 shown in FIG. 4 manufactured by using the lead frame 15 as mentioned above, is such that a semiconductor chip 20 is mounted or die-bonded on the island 16 by a mounting material 23 such as solder, and electrodes 20A on the semiconductor chip 20 are connected to the inner leads 19 through bonding wires 24 by a wiring bonding process. The island 16 and the semiconductor chip 20 thus assembled are encapsulated with a plastic molded body 25, as shown in FIG. 4.
At the time of encapsulating with plastic, a plastic-encapsulating lower molding die 26 having a stepped portion 26A at the same height as that of the island plane, as shown by the two-dot ghost line in FIG. 4, is used in combination with a conventional plastic-encapsulating upper molding die (not shown), in such a manner the wing leads 17 are supported on the stepped portion 26A, and then, plastic is injected into a space defined by the upper and lower molding dies, so that a lower surface 17A of the free outer end portion of the wing leads 17 in the same plane as the island plane is exposed from the shaped plastic molded body 25, as seen from FIG. 4.
Incidentally, as mentioned above, the island 16 is set down at a level lower than that of the terminal leads 18 and 19 by the depress-machining of the hanger pin 28 at the stepped portion 22. In this depress-machining, if the island 16 is set down at a level deeper than the stepped portion 26A of the plastic-encapsulating lower molding die 26 by the degree of 30 μm to 50 μm, it is possible to cause the free outer end of the wing lead 17 to be stably exposed from the shaped plastic molded body 25.
In the above mentioned embodiment, since the wing lead 17 of the lead frame 15 is not coupled to tie-bar 21, it is no longer necessary to cut off the wing lead 17. Accordingly, it is possible to use the conventional tie-bar cutting die having no wing lead cutting blade. Therefore, even if the lead pitch is narrowed, it is no longer difficult to machine the punch and die of the cutting die, nor is lift time of parts of the cutting die set become reduced.
Furthermore, since the wing leads 17 are not in the same places as that of the inner leads 19 and the outer leads 18, the wing leads 17 never interfere with the inner leads 19 and outer leads 18. Therefore, even if the pitch of the inner leads 19 and outer leads 18 (namely, the interval between the terminal leads) is narrowed, it is always possible to provide the wing leads 17, whereby package cracking can be surely prevented when the semiconductor device is mounted on a printed circuit board. In particular, in the shown embodiment, by optimizing the depress-machining of the stepped portion 22 of the hanger pins 28 relative to the level of the stepped portion 26A of the plastic-encapsulating lower molding die 26, the wing lead 17 can be stably exposed from the shaped plastic molded body 25, thereby certainly prevents the package cracking.
As seen from the above, since restriction to the number and the position of the wing leads 17 disappears, the degree of freedom in designing the lead frame is increased. For example, four lead frames 27 can be provided as shown in FIG. 6, in order to increase the moisture expelling effect. In FIG. 6, elements similar to those shown in FIG. 5 are given the same Reference Numerals, and explanation thereof will be omitted. From FIG. 6, it would be understood that it is possible to provide the wing leads even if the lead pitch is narrowed.
Referring to FIG. 7, there is shown a diagrammatic section view of a second embodiment of the plastic packaged semiconductor device in accordance with the present invention. In FIG. 7, elements similar to those shown in FIG. 4 are given the same Reference Numerals, and explanation thereof will be omitted.
As seen from comparison between FIGS. 4 and 7, the second embodiment of the plastic packaged semiconductor device is generally designated with Reference Numeral 29, and is characterized in that each wing lead 30 extending outwardly from the island 16 has a length slightly longer than the distance between the edge of the island and the side surface of the plastic-encapsulating molding die at level of the island and has an upward bent portion 30A, but a free outer end portion of the wing lead 30 is in the same plane as that of the island 16.
The plastic packaged semiconductor device 29 of the second embodiment has the same advantage as that obtained in the plastic packaged semiconductor device 14 of the first embodiment. Furthermore, since the wing lead 30 has the bent portion 30A, when the wing lead 30 is compressed in a lengthwise direction, a restoring force is exerted. In other words, a spring action occurs. Therefore, if the plastic encapsulation is carried out when the free outer end of the wing lead 30 is resiliently pushed onto a side surface 31A of a conventional plastic-encapsulating lower molding die 31, the wing lead 30 ceaselessly exerts a pushing force against the side surface 31A of the molding die 31 in the course of the plastic encapsulating process, so that the free outer end of the wing lead 30 is surely exposed from the plastic molded body 25. As a result, package cracking can be surely prevented.
The invention has thus been shown and described with reference to the specific embodiments. However, it should be noted that the present invention is in no way limited to the details of the illustrated structures but changes and modifications may be made within the scope of the appended claims.
In the above mentioned embodiments, the hanger pins are depress-machined in order to put the wing leads and the terminal leads at different level planes, respectively. However, the wing leads may be depress-machined in place of the hanger pin. In addition, the number and the location of the inner leads, the outer leads and the hanger pins shown in FIGS. 5 and 6 may be freely modified.
In the second embodiment, the wing lead can be bent downward, in place of the upward bent portion 30A. Furthermore, two or more bend portions may be provided in the wing lead. As a means for forcedly pushing the tip end of the wing lead to the side surface of the plastic-encapsulating molding die, the wing lead can be formed to have a length slightly longer than the distance between the side of the island and the side surface of the plastic-encapsulating molding die, and the wing lead can be resiliently deformed by slightly bending the wing lead, so that the tip end of the wing lead is pushed against the side surface of the plastic-encapsulating molding die.
As mentioned above, in the semiconductor device in accordance with the present invention, since the wing leads and the terminal leads are not in the same place, the wing leads never interfere with the terminal leads. Therefore, even if the pitch of the terminal leads is narrowed, since it is always possible to provide the wing leads, the package crack caused by thermal shock when the semiconductor device is mounted on a printed circuit board, can be surely prevented.
Furthermore, since, in the lead frame, the wing lead is not coupled to the tie-bar, it is no longer necessary to cut off the wing lead. Accordingly, it is possible to use the conventional tie-bar cutting die having no wing lead cutting blade. In addition, even if the lead pitch is narrowed, it is no longer difficult to machine the punch and the die of the cutting die, nor lift time of parts of the cutting die set reduced.
Moreover, since restriction in the number and the position of the wing leads disappears, degree of freedom in designing the lead frame is elevated.

Claims (5)

I claim:
1. A plastic encapsulated semiconductor device comprising a semiconductor chip supported on an island, a plurality of terminal leads each having an inner lead and an outer lead, said inner lead of each terminal lead extending outwardly from a proximity of said island and being electrically connected to a corresponding electrode of said semiconductor chip through a connection wire, and at least one wing lead extending outwardly from said island between a pair of adjacent terminal leads of said terminal leads, and a plastic molded body encapsulating said semiconductor chip, said island, said inner lead of each terminal lead and said connection wire in such a manner that said outer lead of each terminal lead is projected from said plastic molded body and a tip end of said at least one wing lead is exposed from said plastic molded body so as to expel possible moisture contained in said plastic molded body, wherein said at least one wing lead extends outwardly from said plastic molded body in a plane different in level from a plane in which said terminal leads extend outwardly from said plastic molded body, so that said at least one wing lead does not interfere with said terminal leads, and also wherein said at least one wing lead extends in a direction toward a tie-bar for tying said terminal leads.
2. A plastic encapsulated semiconductor device as claimed in claim 1, wherein said at least one wing lead has a bent portion.
3. A plastic encapsulated semiconductor device as claimed in claim 1, wherein said plane in which said at least one wing lead extends outwardly from said plastic molded body is lower in level than said plane in which said terminal leads extend outwardly from said plastic molded body.
4. A plastic encapsulated semiconductor device as claimed in claim 3, wherein said at least one wing lead has a bent portion.
5. A plastic encapsulated semiconductor device as claimed in claim 1, wherein said at least one wing lead and said island extend in entirely the same plane.
US08/739,890 1995-10-31 1996-10-31 Plastic encapsulated semiconductor device having wing leads Expired - Fee Related US5703396A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7283542A JP2806328B2 (en) 1995-10-31 1995-10-31 Resin-sealed semiconductor device and method of manufacturing the same
JP7-283542 1995-10-31

Publications (1)

Publication Number Publication Date
US5703396A true US5703396A (en) 1997-12-30

Family

ID=17666884

Family Applications (1)

Application Number Title Priority Date Filing Date
US08/739,890 Expired - Fee Related US5703396A (en) 1995-10-31 1996-10-31 Plastic encapsulated semiconductor device having wing leads

Country Status (3)

Country Link
US (1) US5703396A (en)
JP (1) JP2806328B2 (en)
KR (1) KR100252737B1 (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5986332A (en) * 1998-08-12 1999-11-16 National Semiconductor Corporation Integrated circuit leadframe incorporating overhanging leads
US6075283A (en) * 1998-07-06 2000-06-13 Micron Technology, Inc. Downset lead frame for semiconductor packages
US20020180008A1 (en) * 1996-12-30 2002-12-05 Corisis David J. Leads under chip in conventional IC package
US6545332B2 (en) * 2001-01-17 2003-04-08 Siliconware Precision Industries Co., Ltd. Image sensor of a quad flat package
US20030122565A1 (en) * 2000-08-30 2003-07-03 Van Horn Mark T. Apparatus and methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
US20040018663A1 (en) * 2002-07-26 2004-01-29 Mitsubishi Denki Kabushiki Kaisha .Lead frame, and method for manufacturing semiconductor device and method for inspecting electrical properties of small device using the lead frame
US6696752B2 (en) * 2000-05-22 2004-02-24 Siliconware Precision Industries Co., Ltd. Encapsulated semiconductor device with flash-proof structure
US20040075175A1 (en) * 1995-11-15 2004-04-22 Koenck Steven E. Reduction of electromagnetic interference in integrated circuit packages
US20040119862A1 (en) * 2002-12-16 2004-06-24 Jackson Hsieh Image sensor capable of radiating heat rapidly
US20050258520A1 (en) * 2004-05-18 2005-11-24 Dolan Douglas E Packaged integrated circuit with MLP leadframe and method of making same
US9449901B1 (en) 2015-04-03 2016-09-20 Freescale Semiconductor, Inc. Lead frame with deflecting tie bar for IC package

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003046034A (en) 2001-07-31 2003-02-14 Nec Kagobutsu Device Kk Resin-sealed semiconductor device

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5994448A (en) * 1982-11-19 1984-05-31 Nec Corp Glass-sealed type semiconductor device
JPS6199360A (en) * 1984-10-19 1986-05-17 Fujitsu Ltd Semiconductor device
JPS63133656A (en) * 1986-11-26 1988-06-06 Matsushita Electronics Corp Semiconductor device
US4920074A (en) * 1987-02-25 1990-04-24 Hitachi, Ltd. Surface mount plastic package semiconductor integrated circuit, manufacturing method thereof, as well as mounting method and mounted structure thereof
US4953007A (en) * 1987-07-20 1990-08-28 Linear Technology Inc. Plastic encapsulated integrated circuit package with electrostatic shield
US5049977A (en) * 1989-07-18 1991-09-17 Kabushiki Kaisha Toshiba Plastic molded type semiconductor device
JPH06151662A (en) * 1992-11-05 1994-05-31 Sumitomo Special Metals Co Ltd Highly heat radiating integrated circuit package
US5436492A (en) * 1992-06-23 1995-07-25 Sony Corporation Charge-coupled device image sensor
US5623162A (en) * 1994-10-27 1997-04-22 Nec Corporation Lead frame having cut-out wing leads

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3134445B2 (en) * 1992-01-31 2001-02-13 ソニー株式会社 Resin-sealed semiconductor device
JPH05291473A (en) * 1992-04-14 1993-11-05 Oki Electric Ind Co Ltd Plastic sealed semiconductor device and leadframe for use with it

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5994448A (en) * 1982-11-19 1984-05-31 Nec Corp Glass-sealed type semiconductor device
JPS6199360A (en) * 1984-10-19 1986-05-17 Fujitsu Ltd Semiconductor device
JPS63133656A (en) * 1986-11-26 1988-06-06 Matsushita Electronics Corp Semiconductor device
US4920074A (en) * 1987-02-25 1990-04-24 Hitachi, Ltd. Surface mount plastic package semiconductor integrated circuit, manufacturing method thereof, as well as mounting method and mounted structure thereof
US4953007A (en) * 1987-07-20 1990-08-28 Linear Technology Inc. Plastic encapsulated integrated circuit package with electrostatic shield
US5049977A (en) * 1989-07-18 1991-09-17 Kabushiki Kaisha Toshiba Plastic molded type semiconductor device
US5436492A (en) * 1992-06-23 1995-07-25 Sony Corporation Charge-coupled device image sensor
JPH06151662A (en) * 1992-11-05 1994-05-31 Sumitomo Special Metals Co Ltd Highly heat radiating integrated circuit package
US5623162A (en) * 1994-10-27 1997-04-22 Nec Corporation Lead frame having cut-out wing leads

Cited By (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7125743B2 (en) * 1995-11-15 2006-10-24 Intermec Ip Corp. Method for reduction of electromagnetic interference in integrated circuit packages
US20040075175A1 (en) * 1995-11-15 2004-04-22 Koenck Steven E. Reduction of electromagnetic interference in integrated circuit packages
US20020180008A1 (en) * 1996-12-30 2002-12-05 Corisis David J. Leads under chip in conventional IC package
US6075283A (en) * 1998-07-06 2000-06-13 Micron Technology, Inc. Downset lead frame for semiconductor packages
US6246110B1 (en) 1998-07-06 2001-06-12 Micron Technology, Inc. Downset lead frame for semiconductor packages
US5986332A (en) * 1998-08-12 1999-11-16 National Semiconductor Corporation Integrated circuit leadframe incorporating overhanging leads
US6696752B2 (en) * 2000-05-22 2004-02-24 Siliconware Precision Industries Co., Ltd. Encapsulated semiconductor device with flash-proof structure
US20030132768A1 (en) * 2000-08-30 2003-07-17 Van Horn Mark T. Apparatus and methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
US7199593B2 (en) 2000-08-30 2007-04-03 Micron Technology, Inc. Apparatus and methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
US20030128042A1 (en) * 2000-08-30 2003-07-10 Van Horn Mark T. Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
US20030122565A1 (en) * 2000-08-30 2003-07-03 Van Horn Mark T. Apparatus and methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
US7294790B2 (en) * 2000-08-30 2007-11-13 Micron Technology, Inc. Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
US6822438B2 (en) 2000-08-30 2004-11-23 Micron Technology, Inc. Apparatus for measuring parasitic capacitance and inductance of I/O leads on electrical component using a network analyzer
US20040231887A1 (en) * 2000-08-30 2004-11-25 Van Horn Mark T. Apparatus and methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
US7239152B2 (en) 2000-08-30 2007-07-03 Micron Technology, Inc. Methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
US20050024068A1 (en) * 2000-08-30 2005-02-03 Van Horn Mark T. Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
US20050161801A1 (en) * 2000-08-30 2005-07-28 Van Horn Mark T. Apparatus and methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
US20050161256A1 (en) * 2000-08-30 2005-07-28 Horn Mark T.V. Apparatus and methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
US7212013B2 (en) 2000-08-30 2007-05-01 Micron Technology, Inc. Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
US7208959B2 (en) 2000-08-30 2007-04-24 Micron Technology, Inc. Methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
US20060043987A1 (en) * 2000-08-30 2006-03-02 Van Horn Mark T Methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
US7208935B2 (en) 2000-08-30 2007-04-24 Micron Technology, Inc. Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
US7145323B2 (en) 2000-08-30 2006-12-05 Micron Technology, Inc. Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer
US6545332B2 (en) * 2001-01-17 2003-04-08 Siliconware Precision Industries Co., Ltd. Image sensor of a quad flat package
US20040018663A1 (en) * 2002-07-26 2004-01-29 Mitsubishi Denki Kabushiki Kaisha .Lead frame, and method for manufacturing semiconductor device and method for inspecting electrical properties of small device using the lead frame
US6836004B2 (en) * 2002-07-26 2004-12-28 Renesas Technology Corp. Lead frame, and method for manufacturing semiconductor device and method for inspecting electrical properties of small device using the lead frame
US20040119862A1 (en) * 2002-12-16 2004-06-24 Jackson Hsieh Image sensor capable of radiating heat rapidly
WO2005117110A1 (en) * 2004-05-18 2005-12-08 Fairchild Semiconductor Corporation Packaged integrated circuit with mlp leadframe and method of making same
US20050258520A1 (en) * 2004-05-18 2005-11-24 Dolan Douglas E Packaged integrated circuit with MLP leadframe and method of making same
US7242076B2 (en) * 2004-05-18 2007-07-10 Fairchild Semiconductor Corporation Packaged integrated circuit with MLP leadframe and method of making same
US9449901B1 (en) 2015-04-03 2016-09-20 Freescale Semiconductor, Inc. Lead frame with deflecting tie bar for IC package

Also Published As

Publication number Publication date
JP2806328B2 (en) 1998-09-30
KR100252737B1 (en) 2000-04-15
KR970024071A (en) 1997-05-30
JPH09129808A (en) 1997-05-16

Similar Documents

Publication Publication Date Title
KR100462105B1 (en) Method for manufacturing resin-encapsulated semiconductor device
KR100927319B1 (en) Stamped Leadframe and Manufacturing Method Thereof
US6424024B1 (en) Leadframe of quad flat non-leaded package
US20050139982A1 (en) Method of manufacturing a semiconductor device
US5703396A (en) Plastic encapsulated semiconductor device having wing leads
US20070262462A1 (en) Manufacturing method of resin-molding type semiconductor device, and wiring board therefor
KR100568225B1 (en) Lead Frame and method for fabricating semiconductor package using the same
KR0141952B1 (en) Semiconductor package and production thereof
US5623162A (en) Lead frame having cut-out wing leads
JP3994095B2 (en) Surface mount electronic components
US7224049B2 (en) Method of fabricating lead frame and method of fabricating semiconductor device using the same, and lead frame and semiconductor device using the same
JP4243270B2 (en) Manufacturing method of semiconductor device
US20030098503A1 (en) Frame for semiconductor package
JP4747188B2 (en) Manufacturing method of semiconductor device
KR100537716B1 (en) Leadframe and semiconductor package using the same
KR19990034731A (en) Lead-on chip lead frames and packages using them
KR100253388B1 (en) Method for fabricating semiconductor package
EP0646961A2 (en) A lead frame structure and a method for manufacturing a semiconductor package device using the lead frame structure
KR0152577B1 (en) Under cut preventing method of outer lead using array pin
KR200362741Y1 (en) Lead Frame Having Stress Releasing Structure
KR100290783B1 (en) Semiconductor package
EP1447847A2 (en) Lead frame for an electronic component package
KR20010068510A (en) Lead frame for quad flat package
KR19990038429U (en) Inner lead structure of semiconductor lead frame
JPS6245157A (en) Manufacture of electronic part and lead frame for manufacture

Legal Events

Date Code Title Description
AS Assignment

Owner name: NEC CORPORATION, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KURIHARA, KENICHI;REEL/FRAME:008311/0206

Effective date: 19961028

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 4

AS Assignment

Owner name: NEC ELECTRONICS CORPORATION, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:NEC CORPORATION;REEL/FRAME:013798/0626

Effective date: 20021101

REMI Maintenance fee reminder mailed
LAPS Lapse for failure to pay maintenance fees
STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362

FP Lapsed due to failure to pay maintenance fee

Effective date: 20051230