US8977797B2 - Method of improving peripheral component interface communications utilizing a low voltage differential signal channel - Google Patents
Method of improving peripheral component interface communications utilizing a low voltage differential signal channel Download PDFInfo
- Publication number
- US8977797B2 US8977797B2 US13/649,084 US201213649084A US8977797B2 US 8977797 B2 US8977797 B2 US 8977797B2 US 201213649084 A US201213649084 A US 201213649084A US 8977797 B2 US8977797 B2 US 8977797B2
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- Prior art keywords
- cpu
- channel
- lvds
- computer
- data
- Prior art date
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- Expired - Fee Related, expires
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/1613—Constructional details or arrangements for portable computers
- G06F1/1632—External expansion units, e.g. docking stations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/102—Program control for peripheral devices where the programme performs an interfacing function, e.g. device driver
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/409—Mechanical coupling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Human Computer Interaction (AREA)
- Bus Control (AREA)
- Power Sources (AREA)
- Information Transfer Systems (AREA)
- Storage Device Security (AREA)
- Multi Processors (AREA)
- Controls And Circuits For Display Device (AREA)
Abstract
Description
-
- 1) A CPU with cache memory;
- 2) Core logic device or means;
- 3) Main memory;
- 4) A single primary Hard Disk Drive (“HDD”) that has a security program;
- 5) Flash memory with system BIOS and programmable user password;
- 6) Operating System, application software, data files on primary HDD;
- 7) An interface device and connectors to peripheral console;
- 8) A software controllable mechanical lock, lock control means, and other accessories.
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- 1) Input means, e.g. keyboard and mouse,
- 2) Display means, e.g. RGB monitor,
- 3) Add-on means, e.g. PCI add-on slots,
- 4) Two Computer Module Bays (CMB) with connectors to two ACMs,
- 5) A serial communication Hub controller that interfaces to serial communication controller of both ACMs,
- 6) Shared storage subsystem, e.g. Floppy drive, CDROM drive, DVD drive, or 2nd Hard Drive,
- 7) Communication device, e.g. modem,
- 8) Power supply, and others.
-
- 1. One user using both ACMs concurrently with 1 or 2 monitors, and a common keyboard/mouse.
- 2. Two users using the two separate ACMs at the same time with separate monitors and keyboard/mouse. The 2 users share peripherals, e.g., printer, CDROM, and others. The two users share external networking.
-
- 1.
HIC 1000 buffers clocked control signals from the host PCI bus, encodes them into control bits and sends the encoded control bits to the XPBus; - 2.
HIC 1000 manages the signal locally; and - 3.
HIC 1000 receives control bits from XPBus, translates the control bits into PCI control signals and sends the PCI control signals to the host PCI bus.
- 1.
-
- 1. PIC 1100 buffers clocked control signals from the secondary PCI bus. encodes them and sends the encoded control bits to the XPBus;
- 2. PIC 1100 manages the signal locally; and
- 3. PIC 1100 receives control bits from XPBus, translates them into PCI control signals and sends the PCI control signals to the secondary PCI bus.
-
- 1) A CPU with cache memory;
- 2) Core logic device or means;
- 3) Main memory;
- 4) A single primary Hard Disk Drive (“HDD”) that has a security program;
- 5) Flash memory with system BIOS and programmable user password;
- 6) Operating System, application software, data files on primary HDD;
- 7) An interface device and connectors to peripheral console;
- 8) A software controllable mechanical lock, lock control means, and other accessories.
-
- 1) Connection to input devices, e.g. keyboard or mouse;
- 2) Connection to display devices, e.g. Monitor;
- 3) Add-on means, e.g. PCI add-on slots;
- 4) Removable storage media subsystem, e.g. Floppy drive, CDROM drive;
- 5) Communication device, e.g. LAN or modem;
- 6) An interface device and connectors to ACM;
- 7) A computer module bay with a notch in the frame for ACM's lock; and
- 8) Power supply and other accessories.
-
- 1) Auto-lock capability when ACM is inserted into CMB;
- 2) Access privilege of program and data;
- 3) Password matching for ACM removal; and
- 4) Automatic HDD lock out if tempering is detected.
Claims (38)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/649,084 US8977797B2 (en) | 1999-05-14 | 2012-10-10 | Method of improving peripheral component interface communications utilizing a low voltage differential signal channel |
US13/744,287 US8756359B2 (en) | 1999-05-14 | 2013-01-17 | Computer system including CPU or peripheral bridge to communicate serial bits of peripheral component interconnect bus transaction and low voltage differential signal channel to convey the serial bits |
US14/209,922 US9529768B2 (en) | 1999-05-14 | 2014-03-13 | Computer system including CPU or peripheral bridge directly connected to a low voltage differential signal channel that communicates serial bits of a peripheral component interconnect bus transaction in opposite directions |
US14/511,093 US9703750B2 (en) | 1999-05-14 | 2014-10-09 | Computer system including CPU or peripheral bridge directly connected to a low voltage differential signal channel that communicates serial bits of a peripheral component interconnect bus transaction in opposite directions |
US15/055,436 US9529769B2 (en) | 1999-05-14 | 2016-02-26 | Computer system including CPU or peripheral bridge directly connected to a low voltage differential signal channel that communicates serial bits of a peripheral component interconnect bus transaction in opposite directions |
Applications Claiming Priority (10)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13412299P | 1999-05-14 | 1999-05-14 | |
US09/569,758 US6718415B1 (en) | 1999-05-14 | 2000-05-12 | Computer system and method including console housing multiple computer modules having independent processing units, mass storage devices, and graphics controllers |
US10/772,214 US7099981B2 (en) | 1999-05-14 | 2004-02-03 | Multiple module computer system and method |
US11/097,694 US7363415B2 (en) | 1999-05-14 | 2005-03-31 | Computer system utilizing multiple computer modules with serial interface |
US11/166,656 US7376779B2 (en) | 1999-05-14 | 2005-06-24 | Multiple module computer system and method |
US12/077,503 US7676624B2 (en) | 1999-05-14 | 2008-03-18 | Multiple module computer system and method including differential signal channel comprising undirectional serial bit channels |
US12/504,534 US8041873B2 (en) | 1999-05-14 | 2009-07-16 | Multiple module computer system and method including differential signal channel comprising unidirectional serial bit channels to transmit encoded peripheral component interconnect bus transaction data |
US13/087,912 US8234436B2 (en) | 1999-05-14 | 2011-04-15 | Computer system including peripheral bridge to communicate serial bits of peripheral component interconnect bus transaction and low voltage differential signal channel to convey the serial bits |
US13/560,924 US8626977B2 (en) | 1999-05-14 | 2012-07-27 | Computer system including CPU or peripheral bridge to communicate serial bits of peripheral component interconnect bus transaction and low voltage differential signal channel to convey the serial bits |
US13/649,084 US8977797B2 (en) | 1999-05-14 | 2012-10-10 | Method of improving peripheral component interface communications utilizing a low voltage differential signal channel |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/560,924 Continuation US8626977B2 (en) | 1999-05-14 | 2012-07-27 | Computer system including CPU or peripheral bridge to communicate serial bits of peripheral component interconnect bus transaction and low voltage differential signal channel to convey the serial bits |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/744,287 Continuation US8756359B2 (en) | 1999-05-14 | 2013-01-17 | Computer system including CPU or peripheral bridge to communicate serial bits of peripheral component interconnect bus transaction and low voltage differential signal channel to convey the serial bits |
Publications (2)
Publication Number | Publication Date |
---|---|
US20130097352A1 US20130097352A1 (en) | 2013-04-18 |
US8977797B2 true US8977797B2 (en) | 2015-03-10 |
Family
ID=32033132
Family Applications (17)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/569,758 Expired - Fee Related US6718415B1 (en) | 1999-05-14 | 2000-05-12 | Computer system and method including console housing multiple computer modules having independent processing units, mass storage devices, and graphics controllers |
US10/772,214 Expired - Fee Related US7099981B2 (en) | 1999-05-14 | 2004-02-03 | Multiple module computer system and method |
US11/097,694 Expired - Fee Related US7363415B2 (en) | 1999-05-14 | 2005-03-31 | Computer system utilizing multiple computer modules with serial interface |
US11/104,169 Expired - Fee Related US7328297B2 (en) | 1999-05-14 | 2005-04-08 | Computer system utilizing multiple computer modules functioning independently |
US11/113,401 Expired - Fee Related US7146446B2 (en) | 1999-05-14 | 2005-04-22 | Multiple module computer system and method |
US11/124,851 Expired - Lifetime US7363416B2 (en) | 1999-05-14 | 2005-05-04 | Computer system utilizing multiple computer modules with password protection |
US11/166,656 Expired - Lifetime US7376779B2 (en) | 1999-05-14 | 2005-06-24 | Multiple module computer system and method |
US12/077,503 Expired - Fee Related US7676624B2 (en) | 1999-05-14 | 2008-03-18 | Multiple module computer system and method including differential signal channel comprising undirectional serial bit channels |
US12/378,197 Expired - Fee Related US7818487B2 (en) | 1999-05-14 | 2009-02-11 | Multiple module computer system and method using differential signal channel including unidirectional, serial bit channels |
US12/504,534 Expired - Fee Related US8041873B2 (en) | 1999-05-14 | 2009-07-16 | Multiple module computer system and method including differential signal channel comprising unidirectional serial bit channels to transmit encoded peripheral component interconnect bus transaction data |
US13/087,912 Expired - Lifetime US8234436B2 (en) | 1999-05-14 | 2011-04-15 | Computer system including peripheral bridge to communicate serial bits of peripheral component interconnect bus transaction and low voltage differential signal channel to convey the serial bits |
US13/560,924 Expired - Fee Related US8626977B2 (en) | 1999-05-14 | 2012-07-27 | Computer system including CPU or peripheral bridge to communicate serial bits of peripheral component interconnect bus transaction and low voltage differential signal channel to convey the serial bits |
US13/649,084 Expired - Fee Related US8977797B2 (en) | 1999-05-14 | 2012-10-10 | Method of improving peripheral component interface communications utilizing a low voltage differential signal channel |
US13/744,287 Expired - Fee Related US8756359B2 (en) | 1999-05-14 | 2013-01-17 | Computer system including CPU or peripheral bridge to communicate serial bits of peripheral component interconnect bus transaction and low voltage differential signal channel to convey the serial bits |
US14/209,922 Expired - Lifetime US9529768B2 (en) | 1999-05-14 | 2014-03-13 | Computer system including CPU or peripheral bridge directly connected to a low voltage differential signal channel that communicates serial bits of a peripheral component interconnect bus transaction in opposite directions |
US14/511,093 Expired - Lifetime US9703750B2 (en) | 1999-05-14 | 2014-10-09 | Computer system including CPU or peripheral bridge directly connected to a low voltage differential signal channel that communicates serial bits of a peripheral component interconnect bus transaction in opposite directions |
US15/055,436 Active US9529769B2 (en) | 1999-05-14 | 2016-02-26 | Computer system including CPU or peripheral bridge directly connected to a low voltage differential signal channel that communicates serial bits of a peripheral component interconnect bus transaction in opposite directions |
Family Applications Before (12)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/569,758 Expired - Fee Related US6718415B1 (en) | 1999-05-14 | 2000-05-12 | Computer system and method including console housing multiple computer modules having independent processing units, mass storage devices, and graphics controllers |
US10/772,214 Expired - Fee Related US7099981B2 (en) | 1999-05-14 | 2004-02-03 | Multiple module computer system and method |
US11/097,694 Expired - Fee Related US7363415B2 (en) | 1999-05-14 | 2005-03-31 | Computer system utilizing multiple computer modules with serial interface |
US11/104,169 Expired - Fee Related US7328297B2 (en) | 1999-05-14 | 2005-04-08 | Computer system utilizing multiple computer modules functioning independently |
US11/113,401 Expired - Fee Related US7146446B2 (en) | 1999-05-14 | 2005-04-22 | Multiple module computer system and method |
US11/124,851 Expired - Lifetime US7363416B2 (en) | 1999-05-14 | 2005-05-04 | Computer system utilizing multiple computer modules with password protection |
US11/166,656 Expired - Lifetime US7376779B2 (en) | 1999-05-14 | 2005-06-24 | Multiple module computer system and method |
US12/077,503 Expired - Fee Related US7676624B2 (en) | 1999-05-14 | 2008-03-18 | Multiple module computer system and method including differential signal channel comprising undirectional serial bit channels |
US12/378,197 Expired - Fee Related US7818487B2 (en) | 1999-05-14 | 2009-02-11 | Multiple module computer system and method using differential signal channel including unidirectional, serial bit channels |
US12/504,534 Expired - Fee Related US8041873B2 (en) | 1999-05-14 | 2009-07-16 | Multiple module computer system and method including differential signal channel comprising unidirectional serial bit channels to transmit encoded peripheral component interconnect bus transaction data |
US13/087,912 Expired - Lifetime US8234436B2 (en) | 1999-05-14 | 2011-04-15 | Computer system including peripheral bridge to communicate serial bits of peripheral component interconnect bus transaction and low voltage differential signal channel to convey the serial bits |
US13/560,924 Expired - Fee Related US8626977B2 (en) | 1999-05-14 | 2012-07-27 | Computer system including CPU or peripheral bridge to communicate serial bits of peripheral component interconnect bus transaction and low voltage differential signal channel to convey the serial bits |
Family Applications After (4)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/744,287 Expired - Fee Related US8756359B2 (en) | 1999-05-14 | 2013-01-17 | Computer system including CPU or peripheral bridge to communicate serial bits of peripheral component interconnect bus transaction and low voltage differential signal channel to convey the serial bits |
US14/209,922 Expired - Lifetime US9529768B2 (en) | 1999-05-14 | 2014-03-13 | Computer system including CPU or peripheral bridge directly connected to a low voltage differential signal channel that communicates serial bits of a peripheral component interconnect bus transaction in opposite directions |
US14/511,093 Expired - Lifetime US9703750B2 (en) | 1999-05-14 | 2014-10-09 | Computer system including CPU or peripheral bridge directly connected to a low voltage differential signal channel that communicates serial bits of a peripheral component interconnect bus transaction in opposite directions |
US15/055,436 Active US9529769B2 (en) | 1999-05-14 | 2016-02-26 | Computer system including CPU or peripheral bridge directly connected to a low voltage differential signal channel that communicates serial bits of a peripheral component interconnect bus transaction in opposite directions |
Country Status (1)
Country | Link |
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US (17) | US6718415B1 (en) |
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US9529769B2 (en) | 2016-12-27 |
US9529768B2 (en) | 2016-12-27 |
US20050195575A1 (en) | 2005-09-08 |
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