USRE34794E - Gull-wing zig-zag inline lead package having end-of-package anchoring pins - Google Patents

Gull-wing zig-zag inline lead package having end-of-package anchoring pins Download PDF

Info

Publication number
USRE34794E
USRE34794E US08/010,022 US1002293A USRE34794E US RE34794 E USRE34794 E US RE34794E US 1002293 A US1002293 A US 1002293A US RE34794 E USRE34794 E US RE34794E
Authority
US
United States
Prior art keywords
circuit board
package
anchoring
semiconductor package
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US08/010,022
Inventor
Warren M. Farnworth
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to US08/010,022 priority Critical patent/USRE34794E/en
Application granted granted Critical
Publication of USRE34794E publication Critical patent/USRE34794E/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
    • H01L23/49555—Cross section geometry characterised by bent parts the bent parts being the outer leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
    • H01L2225/1029—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the support being a lead frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1047—Details of electrical connections between containers
    • H01L2225/107—Indirect electrical connections, e.g. via an interposer, a flexible substrate, using TAB
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1076—Shape of the containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09709—Staggered pads, lands or terminals; Parallel conductors in different planes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10439—Position of a single component
    • H05K2201/10454—Vertically mounted
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10507—Involving several components
    • H05K2201/10522—Adjacent components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10507—Involving several components
    • H05K2201/10545—Related components mounted on both sides of the PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10568—Integral adaptations of a component or an auxiliary PCB for mounting, e.g. integral spacer element
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10696—Single-in-line [SIL] package
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15—Position of the PCB during processing
    • H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/167—Using mechanical means for positioning, alignment or registration, e.g. using rod-in-hole alignment
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • This invention relates to semiconductor packaging techniques, and, more specifically, to high-density, surface-mount devices.
  • Integrated semiconductor devices are typically constructed en masse on a wafer of silicon or gallium arsenide. Each device generally takes the form of an integrated circuit (IC) die. If the die is to be encapsulated in a plastic package, it is first bonded to the die-mounting paddle of a leadframe which is attached to other leadframes in a leadframe strip. The wire attachment pads on the die are connected with their corresponding leads on the leadframe with aluminum or gold wire during a wire bonding process, following which the die is coated with a protective polyimide film. Finally, the die is encapsulated in plastic and the plastic-encapsulated chip undergoes a trim and form operation which separates the interconnected packages on the leadframe strip into individual entities and bends (forms) the leads of each package. The package is then recognizable as an IC "chip". The operation for manufacturing plastic-encapsulated packages is highly automated, allowing high quality and low cost.
  • IC integrated circuit
  • IC packages take many forms, although the trend is clearly toward designs which increase mounting density.
  • the standard IC package was the dual-inline package or DIP.
  • DIP dual-inline package
  • Such packages were typically through-hole soldered on printed circuit boards.
  • a newer dual-inline lead design known as small-outline J-lead package, has been rapidly supplanting the standard DIP design for two reasons. Firstly, the leads of an SOJ package are soldered to only one side of a circuit board, thus leaving the other side of the board free for the mounting of additional SOJ packages. Secondly, the leads are much less vulnerable to damage prior to board assembly, hence, there are fewer rejects.
  • Both DIP and SOJ packages are horizontal packages (i.e., the die is mounted in a plane parallel to the board-attachment plane).
  • Vertical packages are also coming into greater use because they permit greater circuit board mounting density.
  • Vertical packages have a very narrow horizontal cross section, with the die mounted between the vertical sides of the package, the distance between which is minimized. All leads exit through the lower edge of the package.
  • the zig-zag inline package or ZIP is a typical vertical package.
  • a vertical package known as the zig-zag inline package or ZIP is also coming into greater use.
  • Existing ZIPs are designed for through- hole-soldered connections on a circuit board. Since such packages require very little board area for connection, they are particularly useful where high-density applications are a must.
  • the present invention combines the density advantages of both the SOJ-type package and the ZIP in a package design which does not require auxiliary mechanical support prior to solder reflow. This has been accomplished by creating a package having gull-wing shaped leads in a zig-zag configuration.
  • the package has an anchoring pin at each end which rigidly secures the package to a printed circuit board both before and after lead-to-board attachment via solder reflow.
  • the first embodiment utilizes anchoring pins having fish-hook-type barbs which lock against the under side of the circuit board when the positioning pins are inserted through holes in the board having roughly the same diameter as the pins.
  • each of the package's gull-wing-shaped leads is resiliently biased against its associated bonding pad on the board, thus assuring a solid electrical connection when the board and package assembly is solder reflowed.
  • a first embodiment package is designed so that a similar package with anchoring pins having reverse-direction barbs can be mounted on the other side of the board using the same holes.
  • a second embodiment of the invention utilizes anchoring pins which can be bonded using quick-setting adhesive to recesses that been drilled or molded into only one side of the circuit board.
  • a third embodiment dispenses with holes and recesses in the board altogether and has anchoring pins, the ends of which can be bonded directly to planar pin bonding regions on a circuit board.
  • the first and second embodiments have an advantage in that the anchoring pins afford a significant degree of protection to the gull-wing leads from mechanical damage.
  • the third embodiment while not providing the same degree of protection to the leads, does offer the advantage of not requiring a drilling step for creating mounting holes or mounting recesses on the circuit board.
  • FIG. 1 is a longitudinal side elevational view of a first embodiment of the new gull-wing ZIP package having barbed anchoring pins mounted on a printed circuit board;
  • FIG. 2 is a cross-sectional view of the first embodiment through broken line 2--2 of FIG. 1;
  • FIG. 3 is the same cross-sectional view as depicted in FIG. 2, with the exception that the package has been removed from the circuit board in order to show the gull-wing leads in an uncompressed state;
  • FIG. 4 is a longitudinal side elevational view of a pair of first embodiments of the new gull-wing ZIP package mounted within the same pair of holes on a printed circuit board, the upper package having barbed anchoring pins with outward-facing barbs and the lower package having anchoring pins with inwardfacing barbs;
  • FIG. 5 is a partial longitudinal side elevational view of a pair of second embodiments of the new gull-wing ZIP package having anchoring pins, said packages adhesively secured to opposite sides of a printed circuit board;
  • FIG. 6 is a partial longitudinal side elevational view of a pair of third embodiments of the new gull-wing ZIP package adhesively secured to opposite sides of a printed circuit board;
  • FIG. 7 is a longitudinal side elevational view of a pair of fourth embodiments of the new gull-wing ZIP package mounted on opposite sides of a printed circuit board said fourth embodiments having tapered anchoring pins for interference fit mounting.
  • FIG. 1 a first embodiment of the invention in the form of a gull-wing zig-zag inline package 11 having barbed anchoring pins 12 is shown mounted on a printed circuit board 13.
  • Anchoring pins 12 are integral with the package's molded plastic body 14.
  • a pair of round anchoring pin holes 15 have been drilled in circuit board 13.
  • Anchoring pins 12 have a square-shouldered shank 16 that acts as a travel limiting device when pins 12 are inserted into holes 15.
  • the lower portion 17 of positioning pins 12 is sized so that it may be inserted into holes 15.
  • the gull-wing shaped leads 18 are resiliently biased against bonding pads 19 when anchoring pins 12 have been seated against their square shanks 16.
  • Barbs 20 are shown as anchoring package 11 against the lower surface of printed circuit board 13. It will be noted that anchoring pins 12 extend below the level of gull-wing shaped leads 18, thus providing protection to the leads from mechanical damage.
  • FIG. 2 is a crosssectional view through the gull-wing zig-zag inline package 11 of FIG. 1, the gull-wing shape of leads 18 is readily discernable. Barb 20 is also readily visible in this view.
  • package 11 is shown detached from circuit board 13.
  • the unanchoring of package 11 from circuit board 13 has been done so as to be able to see the shape of gull-wing leads 18 when they are not under compression against bonding pads 19.
  • FIG. 4 a pair of first-embodiment devices are shown anchored to different sides of a printed circuit board 13 using a single pair of anchoring holes 15. It will be noted that the barbs 20 on the upper package 11 face outward, while the barbs 41 on lower package 42 face inward. Using the technique of opposite facing barbs in order to populate both sides of a printed circuit board, it is evident that two different molds are required for encapsulation when creating the package.
  • FIG. 5 a pair .Iadd.of .Iaddend.identical second-embodiment gull-wing ZIP packages 51 are shown bonded to opposite sides of a printed circuit board.
  • anchoring pins 52 do not extend from one side of circuit board 53 to the other.
  • Anchoring pins 52 of this particular embodiment have rectangular-cross-section shanks 53.
  • Quick-setting cyano-acrylic adhesive is utilized to bond the cylindrical nubs 54 of anchoring pins 52 in the depressions 55 on board 53.
  • depressions 55 serve merely as alignment recesses, being incapable of providing vertical support to the packages 51 and maintain the leads 18 in a state of compression against the board bonding pads 19 without the use of an adhesive to anchor the nubs 54 within the depressions 55. .Iaddend.
  • the advantage to this approach is that two different molds are not required to provide components to stuff both sides of a circuit board.
  • FIG. 6 a pair of identical third-embodiment gull-wing ZIP packages 61 are shown anchored to opposite sides of a common printed circuit board 63.
  • This embodiment does not require the drilling of anchoring pin holes in the printed circuit board.
  • the third embodiment ZIP package 61 is virtually identical to the second embodiment version depicted in FIG. 5, with the exception that the cylindrical nubs 54 of anchoring pins 52 have been eliminated completely.
  • the end sections 62 of packages 61 have a planar surfaces which are bonded directly to circuit board 63 with quick-setting adhesive. Adhesive displaced during the bonding process is represented by fillet 64.
  • FIG. 7 a single fourth-embodiment gull-wing ZIP package 71 is shown mounted on a circuit board 72.
  • the fourth embodiment ZIP package 71 is also virtually identical to the second embodiment version depicted in FIG. 5, with the exception that cylindrical nubs 54 of anchoring pins 52 have been replaced with tapered extensions 74.
  • a pair of holes 75 have been drilled in circuit board 72. The holes are slightly larger in diameter than the tip of tapered extensions 74 to facilitate positioning of the package on the board with conventional automatic pick and place equipment.
  • the hole diameter is smaller than the base of tapered extensions 74, such that when tapered extensions 74 are forced into the holes, friction will retain the gull-wing leads in a compressed state and the package itself in a stable upright position on circuit board 72 until a solder reflow can be effected.
  • the rectangular-cross section shank 76 of anchoring pin 73 limits the insertion depth of tapered extensions 74 into circuit board 72.

Abstract

A semiconductor package having a gull-wing, zig-zag, inline-lead configuration and end-of-package anchoring devices for rigidly affixing the package to a circuit board such that each lead is in compressibe contact with its associated mounting pad on the board. The anchoring devices of a first embodiment comprise anchoring pins having fish-hook-type barbs which lock against the under side of the board when the pegs are inserted through holes in the board; a second embodiment utilizes anchoring pins which are adhesively bonded in recesses that have been drilled or molded into the board; a third embodiment utilizes anchoring pins, the ends of which can be bonded directly to planar peg-bonding regions on the surface of the board; and a fourth utilizes tapered anchoring ping which may be inserted with an interference fit into holes in the board. The invention eliminates the need for mechanical support of the packages during solder reflow operations used during board assembly and repair.

Description

.Iadd.This application is a reissue of 07/432,598 filed Nov. 6, 1989 U.S. Pat. No. 4,967,262. .Iaddend.
FIELD OF THE INVENTION
This invention relates to semiconductor packaging techniques, and, more specifically, to high-density, surface-mount devices.
BACKGROUND OF THE INVENTION
Integrated semiconductor devices are typically constructed en masse on a wafer of silicon or gallium arsenide. Each device generally takes the form of an integrated circuit (IC) die. If the die is to be encapsulated in a plastic package, it is first bonded to the die-mounting paddle of a leadframe which is attached to other leadframes in a leadframe strip. The wire attachment pads on the die are connected with their corresponding leads on the leadframe with aluminum or gold wire during a wire bonding process, following which the die is coated with a protective polyimide film. Finally, the die is encapsulated in plastic and the plastic-encapsulated chip undergoes a trim and form operation which separates the interconnected packages on the leadframe strip into individual entities and bends (forms) the leads of each package. The package is then recognizable as an IC "chip". The operation for manufacturing plastic-encapsulated packages is highly automated, allowing high quality and low cost.
IC packages take many forms, although the trend is clearly toward designs which increase mounting density. For years, the standard IC package was the dual-inline package or DIP. Such packages were typically through-hole soldered on printed circuit boards. A newer dual-inline lead design, known as small-outline J-lead package, has been rapidly supplanting the standard DIP design for two reasons. Firstly, the leads of an SOJ package are soldered to only one side of a circuit board, thus leaving the other side of the board free for the mounting of additional SOJ packages. Secondly, the leads are much less vulnerable to damage prior to board assembly, hence, there are fewer rejects. Both DIP and SOJ packages are horizontal packages (i.e., the die is mounted in a plane parallel to the board-attachment plane). Vertical packages are also coming into greater use because they permit greater circuit board mounting density. Vertical packages have a very narrow horizontal cross section, with the die mounted between the vertical sides of the package, the distance between which is minimized. All leads exit through the lower edge of the package. The zig-zag inline package or ZIP is a typical vertical package. A vertical package known as the zig-zag inline package or ZIP is also coming into greater use. Existing ZIPs are designed for through- hole-soldered connections on a circuit board. Since such packages require very little board area for connection, they are particularly useful where high-density applications are a must. Although the use of a surface-mount ZIP has been suggested by Barbara Cole of Boise, Idaho's Micron Technology, Inc., the appeal of such a package is greatly diminished by the requirement that each package be maintained in a vertical position over its associated mounting pads until a solder reflow operation is performed.
What is needed is a new type of package which combines the density advantages of both the SOJ-type package with the vertical packaging of the ZIP, which can be positioned on a circuit board with currently available board-stuffing equipment and which will maintain its vertical position on the board without auxiliary package-support apparatuses until final attachment of the package to the circuit board during a solder reflow operation.
SUMMARY OF THE INVENTION
The present invention combines the density advantages of both the SOJ-type package and the ZIP in a package design which does not require auxiliary mechanical support prior to solder reflow. This has been accomplished by creating a package having gull-wing shaped leads in a zig-zag configuration. In addition, the package has an anchoring pin at each end which rigidly secures the package to a printed circuit board both before and after lead-to-board attachment via solder reflow. Several embodiments of the invention adapt themselves to various types of automatic board-stuffing equipment. The first embodiment utilizes anchoring pins having fish-hook-type barbs which lock against the under side of the circuit board when the positioning pins are inserted through holes in the board having roughly the same diameter as the pins. When the anchoring pins are seated in the board holes, each of the package's gull-wing-shaped leads is resiliently biased against its associated bonding pad on the board, thus assuring a solid electrical connection when the board and package assembly is solder reflowed. A first embodiment package is designed so that a similar package with anchoring pins having reverse-direction barbs can be mounted on the other side of the board using the same holes. A second embodiment of the invention utilizes anchoring pins which can be bonded using quick-setting adhesive to recesses that been drilled or molded into only one side of the circuit board. A third embodiment dispenses with holes and recesses in the board altogether and has anchoring pins, the ends of which can be bonded directly to planar pin bonding regions on a circuit board. The first and second embodiments have an advantage in that the anchoring pins afford a significant degree of protection to the gull-wing leads from mechanical damage. On the other hand, the third embodiment, while not providing the same degree of protection to the leads, does offer the advantage of not requiring a drilling step for creating mounting holes or mounting recesses on the circuit board.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a longitudinal side elevational view of a first embodiment of the new gull-wing ZIP package having barbed anchoring pins mounted on a printed circuit board;
FIG. 2 is a cross-sectional view of the first embodiment through broken line 2--2 of FIG. 1;
FIG. 3, is the same cross-sectional view as depicted in FIG. 2, with the exception that the package has been removed from the circuit board in order to show the gull-wing leads in an uncompressed state;
FIG. 4 is a longitudinal side elevational view of a pair of first embodiments of the new gull-wing ZIP package mounted within the same pair of holes on a printed circuit board, the upper package having barbed anchoring pins with outward-facing barbs and the lower package having anchoring pins with inwardfacing barbs;
FIG. 5 is a partial longitudinal side elevational view of a pair of second embodiments of the new gull-wing ZIP package having anchoring pins, said packages adhesively secured to opposite sides of a printed circuit board;
FIG. 6 is a partial longitudinal side elevational view of a pair of third embodiments of the new gull-wing ZIP package adhesively secured to opposite sides of a printed circuit board; and
FIG. 7 is a longitudinal side elevational view of a pair of fourth embodiments of the new gull-wing ZIP package mounted on opposite sides of a printed circuit board said fourth embodiments having tapered anchoring pins for interference fit mounting.
PREFERRED EMBODIMENT OF THE INVENTION
Referring now to FIG. 1, a first embodiment of the invention in the form of a gull-wing zig-zag inline package 11 having barbed anchoring pins 12 is shown mounted on a printed circuit board 13. Anchoring pins 12 are integral with the package's molded plastic body 14. A pair of round anchoring pin holes 15 have been drilled in circuit board 13. Anchoring pins 12 have a square-shouldered shank 16 that acts as a travel limiting device when pins 12 are inserted into holes 15. The lower portion 17 of positioning pins 12 is sized so that it may be inserted into holes 15. The gull-wing shaped leads 18 are resiliently biased against bonding pads 19 when anchoring pins 12 have been seated against their square shanks 16. Barbs 20 are shown as anchoring package 11 against the lower surface of printed circuit board 13. It will be noted that anchoring pins 12 extend below the level of gull-wing shaped leads 18, thus providing protection to the leads from mechanical damage.
Referring now to FIG. 2, which is a crosssectional view through the gull-wing zig-zag inline package 11 of FIG. 1, the gull-wing shape of leads 18 is readily discernable. Barb 20 is also readily visible in this view.
Referring now to FIG. 3, package 11 is shown detached from circuit board 13. The unanchoring of package 11 from circuit board 13 has been done so as to be able to see the shape of gull-wing leads 18 when they are not under compression against bonding pads 19.
Referring now to FIG. 4, a pair of first-embodiment devices are shown anchored to different sides of a printed circuit board 13 using a single pair of anchoring holes 15. It will be noted that the barbs 20 on the upper package 11 face outward, while the barbs 41 on lower package 42 face inward. Using the technique of opposite facing barbs in order to populate both sides of a printed circuit board, it is evident that two different molds are required for encapsulation when creating the package.
Referring now to FIG. 5, a pair .Iadd.of .Iaddend.identical second-embodiment gull-wing ZIP packages 51 are shown bonded to opposite sides of a printed circuit board. It will be noted that, in this case, anchoring pins 52 do not extend from one side of circuit board 53 to the other. Anchoring pins 52 of this particular embodiment have rectangular-cross-section shanks 53. Quick-setting cyano-acrylic adhesive is utilized to bond the cylindrical nubs 54 of anchoring pins 52 in the depressions 55 on board 53. .Iadd.In this embodiment, depressions 55 serve merely as alignment recesses, being incapable of providing vertical support to the packages 51 and maintain the leads 18 in a state of compression against the board bonding pads 19 without the use of an adhesive to anchor the nubs 54 within the depressions 55. .Iaddend.The advantage to this approach is that two different molds are not required to provide components to stuff both sides of a circuit board.
Referring now to FIG. 6, a pair of identical third-embodiment gull-wing ZIP packages 61 are shown anchored to opposite sides of a common printed circuit board 63. This embodiment does not require the drilling of anchoring pin holes in the printed circuit board. The third embodiment ZIP package 61 is virtually identical to the second embodiment version depicted in FIG. 5, with the exception that the cylindrical nubs 54 of anchoring pins 52 have been eliminated completely. The end sections 62 of packages 61 have a planar surfaces which are bonded directly to circuit board 63 with quick-setting adhesive. Adhesive displaced during the bonding process is represented by fillet 64.
Referring now to FIG. 7, a single fourth-embodiment gull-wing ZIP package 71 is shown mounted on a circuit board 72. The fourth embodiment ZIP package 71 is also virtually identical to the second embodiment version depicted in FIG. 5, with the exception that cylindrical nubs 54 of anchoring pins 52 have been replaced with tapered extensions 74. A pair of holes 75 have been drilled in circuit board 72. The holes are slightly larger in diameter than the tip of tapered extensions 74 to facilitate positioning of the package on the board with conventional automatic pick and place equipment. However, the hole diameter is smaller than the base of tapered extensions 74, such that when tapered extensions 74 are forced into the holes, friction will retain the gull-wing leads in a compressed state and the package itself in a stable upright position on circuit board 72 until a solder reflow can be effected. The rectangular-cross section shank 76 of anchoring pin 73 limits the insertion depth of tapered extensions 74 into circuit board 72.
Although only certain embodiments of the invention have been described herein, it will be apparent to one skilled in the art that changes and modifications may be made thereto without departing from the spirit and the scope of the invention as claimed.

Claims (15)

I claim:
1. A vertically-oriented semiconductor package designed for surface mounting on one .Iadd.of a .Iaddend.pair of planar surfaces of a printed circuit board, said package comprising:
a body having a pair of substantially parallel, vertical planar sides, lower and upper horizontal edges and a substantially vertical edge at each end of the package;
a semiconductor die having a face on which integrated circuitry is constructed, said die being encapsulated within said body such that said face is positioned between and substantially parallel to the vertical planar sides of said body;
a plurality of .Iadd.gull-wing, zig-zag .Iaddend.inline leads, each of which is electrically connected, within said body, to a portion of the circuitry on said die, and each of which extends in a downward direction through the lower edge of said body, below which it is bent such that it is resiliently biased against the planar surface of the circuit board when the package is in a mounted position thereupon;
at least one downward-facing anchoring pin integral with said body at each end thereof; and
means for securely attaching each anchoring pin to the circuit board in order to maintain a mounted position thereupon during solder reflow operations.
2. The semiconductor package of claim 1, wherein said means for securely attaching comprises a barb on the end of each anchoring pin which, when said anchoring pins are inserted from said one surface through properly sized and aligned holes in said circuit board, hooks on the other surface of said circuit board.
3. The semiconductor package of claim 2, wherein each of said anchoring pins has a shoulder that is larger than the diameter of the holes in said circuit board which seats against said one planar surface of said circuit board.
4. The semiconductor package of claim 3, wherein said anchoring pins are molded with an .[.outwardlyfacing.]. .Iadd.outwardly-facing .Iaddend.bevel and with inwardly-facing barbs.
5. The semiconductor package of claim 3, wherein said anchoring pins are molded with an .[.inwardlyfacing.]. .Iadd.inwardly-facing .Iaddend.bevel and with outwardly-facing barbs.
6. The semiconductor package of claim 1, wherein said means for securely attaching comprises a nub on the end of each anchoring pin which is anchored to a recess in said board with quick-setting adhesive.
7. The semiconductor package of claim 6, wherein each of said anchoring pins has a shoulder that is larger than the diameter of the recesses in said circuit board which seats against said one planar surface of said circuit board.
8. The semiconductor package of claim 1 wherein said means for securely attaching consists of bonding the end of each anchoring pin directly to the planar surface of said board with quick-setting adhesive.
9. The semiconductor package of claim 1, wherein said means for securely attaching comprises a tapered extension on the end of each anchoring pin which, when said anchoring pins are inserted from said one surface through holes in said circuit board that are properly aligned and properly sized for a forcedinsertion fit, said tapered extensions are frictionally locked in said holes.
10. The semiconductor package of claim 9, wherein each of said anchoring pins has a shoulder that is larger than the diameter of its corresponding hole in said circuit board, said shoulder seating against said one planar surface of said circuit board.
11. The semiconductor package of claim 10, wherein said tapered anchoring pin extensions are longer that the thickness of said circuit board.
12. A circuit board/semiconductor package assembly comprising a circuit board, a first gull-wing .[.ZIP.]. .Iadd.zig-zag inline lead .Iaddend.semiconductor package having a pair of anchoring pins molded with an inwardly-facing bevel and with outwardly-facing barbs, and a second gull-wing .[.ZIP.]. .Iadd.zig-zag inline lead .Iaddend.semiconductor package having a pair of anchoring pins molded with an outwardly-facing bevel and with inwardly-facing barbs, one anchoring pin of each of said first and second packages sharing a first anchoring hole in said board and the remaining pin of each of said first and second packages sharing a second anchoring hole in said board. .Iadd.
13. A semiconductor package, designed for surface mounting on one of a pair of planar surfaces of a printed circuit board, said package comprising:
a body having a pair of substantially parallel, vertical planar faces, lower and upper horizontal edges, and a substantially vertical edge at both ends thereof;
a semiconductor die having a face on which integrated circuitry is constructed, said die being encapsulated within said body such that said face is positioned between and substantially parallel to the vertical planar faces of said body; and
a plurality of inline leads, each of which is electrically connected, within said body, to a portion of the circuitry on said die, and each of which extends in a downward direction through the lower edge of said body such that when said package is mounted on said circuit board, said leads are in compressive contact with said planar surface; and
at least one downward-facing anchoring pin integral with said body at each end thereof;
said anchoring pin having a barb on the end thereof which, when said anchoring pin is inserted from said one surface through properly sized and aligned holes in said circuit board, hooks on the other surface of said circuit board. .Iaddend. .Iadd.14. The semiconductor package of claim 13, wherein each said anchoring pin has a shoulder that is larger than the diameter of the holes in said circuit board which seats against said one
planar surface of said circuit board. .Iaddend. .Iadd.15. The semiconductor package of claim 14, wherein said anchoring pins are molded with an outwardly-facing bevel and with inwardly-facing barbs. .Iaddend. .Iadd.16. The semiconductor package of claim 14, wherein said anchoring pins are molded with an inwardly-facing bevel and with outwardly-facing barbs. .Iaddend. .Iadd.17. A semiconductor package, designed for surface mounting on one of a pair of planar surfaces of a printed circuit board, said package comprising:
a body having a pair of substantially parallel, vertical planar faces, lower and upper horizontal edges, and a substantially vertical edge at both ends thereof;
a semiconductor die having a face on which integrated circuitry is constructed, said die being encapsulated within said body such that said face is positioned between and substantially parallel to the vertical planar faces of said body; and
a plurality of inline leads, each of which is electrically connected, within said body, to a portion of the circuitry on said die, and each of which extends in a downward direction through the lower edge of said body such that when said package is mounted on said circuit board, said leads are in compressive contact with said planar surface; and
at least one downward-facing anchoring pin integral with said body at each end thereof;
said anchoring pin having a nub on the end thereof which is non-frictionally anchored within an alignment recess in said board with
quick-setting adhesive. .Iaddend. .Iadd.18. A semiconductor package, designed for surface mounting on one of a pair of planar surfaces of a printed circuit board, said package comprising:
a body having a pair of substantially parallel, vertical planar faces, lower and upper horizontal edges, and a substantially vertical edge at both ends thereof;
a semiconductor die having a face on which integrated circuitry is constructed, said die being encapsulated within said body such that said face is positioned between and substantially parallel to the vertical planar faces of said body; and
a plurality of inline leads, each of which is electrically connected, within said body, to a portion of the circuitry on said die, and each of which extends in a downward direction through the lower edge of said body such that when said package is mounted on said circuit board, said leads are in compressive contact with said planar surface; and
at least one downward-facing anchoring pin integral with said body at each end thereof;
the end of said anchoring pin having a planar surface which is bondable directly to the planar surface of said board with quick-setting adhesive. .Iaddend.
US08/010,022 1989-11-06 1993-01-28 Gull-wing zig-zag inline lead package having end-of-package anchoring pins Expired - Lifetime USRE34794E (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US08/010,022 USRE34794E (en) 1989-11-06 1993-01-28 Gull-wing zig-zag inline lead package having end-of-package anchoring pins

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/432,598 US4967262A (en) 1989-11-06 1989-11-06 Gull-wing zig-zag inline lead package having end-of-package anchoring pins
US08/010,022 USRE34794E (en) 1989-11-06 1993-01-28 Gull-wing zig-zag inline lead package having end-of-package anchoring pins

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US07/432,598 Reissue US4967262A (en) 1989-11-06 1989-11-06 Gull-wing zig-zag inline lead package having end-of-package anchoring pins

Publications (1)

Publication Number Publication Date
USRE34794E true USRE34794E (en) 1994-11-22

Family

ID=23716819

Family Applications (2)

Application Number Title Priority Date Filing Date
US07/432,598 Ceased US4967262A (en) 1989-11-06 1989-11-06 Gull-wing zig-zag inline lead package having end-of-package anchoring pins
US08/010,022 Expired - Lifetime USRE34794E (en) 1989-11-06 1993-01-28 Gull-wing zig-zag inline lead package having end-of-package anchoring pins

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US07/432,598 Ceased US4967262A (en) 1989-11-06 1989-11-06 Gull-wing zig-zag inline lead package having end-of-package anchoring pins

Country Status (2)

Country Link
US (2) US4967262A (en)
EP (1) EP0427151A3 (en)

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5619067A (en) * 1994-05-02 1997-04-08 Texas Instruments Incorporated Semiconductor device package side-by-side stacking and mounting system
US5728601A (en) * 1992-03-09 1998-03-17 Fujitsu Limited Process for manufacturing a single in-line package for surface mounting
US6198636B1 (en) * 1997-12-31 2001-03-06 Micron Technology, Inc. Semiconductor device socket, assembly and methods
US6215183B1 (en) 1998-03-30 2001-04-10 Micron Technology, Inc. Vertical surface mount assembly and methods
US6224936B1 (en) 1998-10-07 2001-05-01 Micron Technology, Inc. Method for reducing warpage during application and curing of encapsulant materials on a printed circuit board
US6232146B1 (en) 1997-12-31 2001-05-15 Micron Technology, Inc. Semiconductor device including combed bond pad opening, assemblies and methods
US6235551B1 (en) 1997-12-31 2001-05-22 Micron Technology, Inc. Semiconductor device including edge bond pads and methods
US6239012B1 (en) 1998-01-27 2001-05-29 Micron Technology, Inc. Vertically mountable semiconductor device and methods
US6238228B1 (en) 1998-03-31 2001-05-29 Micron Technology, Inc. Locking assembly for securing semiconductor device to carrier substrate
US6265773B1 (en) 1997-12-31 2001-07-24 Micron Technology, Inc. Vertically mountable and alignable semiconductor device, assembly, and methods
US6319065B1 (en) 1998-05-04 2001-11-20 Micron Technology, Inc. Method and apparatus for forming modular sockets using flexible interconnects and resulting structures
US6326687B1 (en) * 1998-09-01 2001-12-04 Micron Technology, Inc. IC package with dual heat spreaders
US6330159B1 (en) 1998-04-15 2001-12-11 Micron Technology, Inc. Vertical surface mount apparatus with thermal carrier
US6380630B1 (en) 1998-03-31 2002-04-30 Micron Technology, Inc. Vertical surface mount package utilizing a back-to-back semiconductor device module
US6398573B1 (en) * 1998-03-31 2002-06-04 Micron Technology, Inc. Locking assembly for securing semiconductor device to carrier substrate
US6419517B1 (en) 1999-02-26 2002-07-16 Micron Technology, Inc. Apparatus and method for packaging circuits
US20020144975A1 (en) * 1996-10-29 2002-10-10 Chung Lam Board level decapsulator
US6676416B1 (en) * 2000-05-11 2004-01-13 Zyvex Corporation Ribbon cable and electrical connector for use with microcomponents
US6803656B2 (en) 1997-12-31 2004-10-12 Micron Technology, Inc. Semiconductor device including combed bond pad opening
US20080192446A1 (en) * 2007-02-09 2008-08-14 Johannes Hankofer Protection For Circuit Boards
US20080278217A1 (en) * 2007-05-07 2008-11-13 Infineon Technologies Ag Protection for circuit boards

Families Citing this family (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5260601A (en) * 1988-03-14 1993-11-09 Texas Instruments Incorporated Edge-mounted, surface-mount package for semiconductor integrated circuit devices
US5138434A (en) * 1991-01-22 1992-08-11 Micron Technology, Inc. Packaging for semiconductor logic devices
US5640762A (en) 1988-09-30 1997-06-24 Micron Technology, Inc. Method and apparatus for manufacturing known good semiconductor die
USRE36469E (en) * 1988-09-30 1999-12-28 Micron Technology, Inc. Packaging for semiconductor logic devices
US5200362A (en) * 1989-09-06 1993-04-06 Motorola, Inc. Method of attaching conductive traces to an encapsulated semiconductor die using a removable transfer film
US4967262A (en) * 1989-11-06 1990-10-30 Micron Technology, Inc. Gull-wing zig-zag inline lead package having end-of-package anchoring pins
JPH06318664A (en) * 1990-08-15 1994-11-15 Internatl Business Mach Corp <Ibm> Surface mount edge connecting package
US5032953A (en) * 1990-08-15 1991-07-16 Pulse Engineering, Inc. Surface mounted single in-line electronic component package with mounting projections and chamfered viewing edge
JPH0770806B2 (en) * 1990-08-22 1995-07-31 株式会社エーユーイー研究所 Electronic circuit by ultrasonic welding and manufacturing method thereof
US5831332A (en) * 1991-05-17 1998-11-03 Fujitsu Limited Semiconductor package for surface mounting
EP0513743B1 (en) * 1991-05-17 1997-09-10 Fujitsu Limited Semiconductor package for surface mounting
US6219908B1 (en) * 1991-06-04 2001-04-24 Micron Technology, Inc. Method and apparatus for manufacturing known good semiconductor die
US5204287A (en) * 1991-06-28 1993-04-20 Texas Instruments Incorporated Integrated circuit device having improved post for surface-mount package
US5302778A (en) * 1992-08-28 1994-04-12 Eastman Kodak Company Semiconductor insulation for optical devices
US5352851A (en) * 1992-09-08 1994-10-04 Texas Instruments Incorporated Edge-mounted, surface-mount integrated circuit device
KR950014123B1 (en) * 1992-09-08 1995-11-21 삼성전자주식회사 Semiconductor package
JP2560974B2 (en) * 1993-06-04 1996-12-04 日本電気株式会社 Semiconductor device
US5413970A (en) * 1993-10-08 1995-05-09 Texas Instruments Incorporated Process for manufacturing a semiconductor package having two rows of interdigitated leads
GB2284713B (en) * 1993-12-08 1997-11-12 Sony Uk Ltd Integrated circuit package
KR950034708A (en) * 1994-05-12 1995-12-28 윌리엄 이. 힐러 Vertical package installed on both sides of the printed circuit board
US5482474A (en) * 1994-05-17 1996-01-09 The Whitaker Corporation Edge-mountable circuit board connector
US5731958A (en) * 1994-09-06 1998-03-24 Methode Electronics, Inc. Gravity latch for surface mount components
AU5924196A (en) 1995-05-26 1996-12-11 Rambus Inc. Chip socket assembly and chip file assembly for semiconducto r chips
US20020055285A1 (en) * 1999-12-20 2002-05-09 Rambus, Inc. Chip socket assembly and chip file assembly for semiconductor chips
US5807136A (en) * 1996-05-17 1998-09-15 Integrated Device Technology, Inc. Space saving connector layout
US6881611B1 (en) 1996-07-12 2005-04-19 Fujitsu Limited Method and mold for manufacturing semiconductor device, semiconductor device and method for mounting the device
EP0853337B1 (en) * 1996-07-12 2004-09-29 Fujitsu Limited Method for manufacturing semiconductor device
US6234820B1 (en) 1997-07-21 2001-05-22 Rambus Inc. Method and apparatus for joining printed circuit boards
US6002589A (en) * 1997-07-21 1999-12-14 Rambus Inc. Integrated circuit package for coupling to a printed circuit board
DE19735505A1 (en) * 1997-08-16 1999-03-04 Grundig Ag Tuner for assembly as a mid component
US6048744A (en) 1997-09-15 2000-04-11 Micron Technology, Inc. Integrated circuit package alignment feature
US6552275B2 (en) * 2001-04-16 2003-04-22 Intel Corporation Surface mount component
US6991960B2 (en) 2001-08-30 2006-01-31 Micron Technology, Inc. Method of semiconductor device package alignment and method of testing
DE10329329B4 (en) * 2003-06-30 2005-08-18 Siemens Ag High frequency housing and method for its manufacture
US7338292B2 (en) * 2006-01-26 2008-03-04 Agilent Technologies, Inc. Board-to-board electronic interface using hemi-ellipsoidal surface features
JP2007250764A (en) * 2006-03-15 2007-09-27 Elpida Memory Inc Semiconductor device and manufacturing method therefor
KR102076339B1 (en) * 2013-03-13 2020-02-11 삼성전자주식회사 Semiconductor pakage and method of manufacturing the same
US9825002B2 (en) 2015-07-17 2017-11-21 Invensas Corporation Flipped die stack
US9490195B1 (en) 2015-07-17 2016-11-08 Invensas Corporation Wafer-level flipped die stacks with leadframes or metal foil interconnects
US9871019B2 (en) 2015-07-17 2018-01-16 Invensas Corporation Flipped die stack assemblies with leadframe interconnects
US9508691B1 (en) 2015-12-16 2016-11-29 Invensas Corporation Flipped die stacks with multiple rows of leadframe interconnects
US10566310B2 (en) 2016-04-11 2020-02-18 Invensas Corporation Microelectronic packages having stacked die and wire bond interconnects
US9595511B1 (en) 2016-05-12 2017-03-14 Invensas Corporation Microelectronic packages and assemblies with improved flyby signaling operation
US9728524B1 (en) 2016-06-30 2017-08-08 Invensas Corporation Enhanced density assembly having microelectronic packages mounted at substantial angle to board
TWI647581B (en) * 2017-11-22 2019-01-11 緯創資通股份有限公司 Board and layout structure

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3056939A (en) * 1960-07-26 1962-10-02 Illinois Tool Works Component lead-locking arrangement
US3162721A (en) * 1960-07-26 1964-12-22 Illinois Tool Works Component lead-locking arrangement
US3524108A (en) * 1967-12-26 1970-08-11 Cts Corp Board mounted modular circuit component and improvement therein
US3796921A (en) * 1972-06-30 1974-03-12 Fischer Artur Lead supporting housing for electrical component
US4155615A (en) * 1978-01-24 1979-05-22 Amp Incorporated Multi-contact connector for ceramic substrate packages and the like
US4611389A (en) * 1983-11-03 1986-09-16 Motorola, Inc. Low-cost power device package with quick-connect terminals and electrically isolated mounting means
US4677458A (en) * 1983-11-04 1987-06-30 Control Data Corporation Ceramic IC package attachment apparatus
US4698660A (en) * 1982-03-30 1987-10-06 Fujitsu Limited Resin-molded semiconductor device
US4736520A (en) * 1983-11-04 1988-04-12 Control Data Corporation Process for assembling integrated circuit packages
US4967262A (en) * 1989-11-06 1990-10-30 Micron Technology, Inc. Gull-wing zig-zag inline lead package having end-of-package anchoring pins
US4975763A (en) * 1988-03-14 1990-12-04 Texas Instruments Incorporated Edge-mounted, surface-mount package for semiconductor integrated circuit devices

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3497859A (en) * 1968-05-28 1970-02-24 Stackpole Carbon Co Electrical resistors for printed circuits

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3056939A (en) * 1960-07-26 1962-10-02 Illinois Tool Works Component lead-locking arrangement
US3162721A (en) * 1960-07-26 1964-12-22 Illinois Tool Works Component lead-locking arrangement
US3524108A (en) * 1967-12-26 1970-08-11 Cts Corp Board mounted modular circuit component and improvement therein
US3796921A (en) * 1972-06-30 1974-03-12 Fischer Artur Lead supporting housing for electrical component
US4155615A (en) * 1978-01-24 1979-05-22 Amp Incorporated Multi-contact connector for ceramic substrate packages and the like
US4698660A (en) * 1982-03-30 1987-10-06 Fujitsu Limited Resin-molded semiconductor device
US4611389A (en) * 1983-11-03 1986-09-16 Motorola, Inc. Low-cost power device package with quick-connect terminals and electrically isolated mounting means
US4677458A (en) * 1983-11-04 1987-06-30 Control Data Corporation Ceramic IC package attachment apparatus
US4736520A (en) * 1983-11-04 1988-04-12 Control Data Corporation Process for assembling integrated circuit packages
US4975763A (en) * 1988-03-14 1990-12-04 Texas Instruments Incorporated Edge-mounted, surface-mount package for semiconductor integrated circuit devices
US4967262A (en) * 1989-11-06 1990-10-30 Micron Technology, Inc. Gull-wing zig-zag inline lead package having end-of-package anchoring pins

Cited By (96)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5728601A (en) * 1992-03-09 1998-03-17 Fujitsu Limited Process for manufacturing a single in-line package for surface mounting
US5663105A (en) * 1994-05-02 1997-09-02 Texas Instruments Incorporated Semiconductor device package side-by-side stacking and mounting system
US5619067A (en) * 1994-05-02 1997-04-08 Texas Instruments Incorporated Semiconductor device package side-by-side stacking and mounting system
US20020144975A1 (en) * 1996-10-29 2002-10-10 Chung Lam Board level decapsulator
US7569418B2 (en) 1997-12-31 2009-08-04 Micron Technology, Inc. Methods for securing packaged semiconductor devices to carrier substrates
US20060030072A1 (en) * 1997-12-31 2006-02-09 Kinsman Larry D Methods for securing packaged semiconductor devices to carrier substrates
US6634098B1 (en) 1997-12-31 2003-10-21 Micron Technology, Inc. Methods for assembling, modifying and manufacturing a vertical surface mount package
US6232146B1 (en) 1997-12-31 2001-05-15 Micron Technology, Inc. Semiconductor device including combed bond pad opening, assemblies and methods
US6235551B1 (en) 1997-12-31 2001-05-22 Micron Technology, Inc. Semiconductor device including edge bond pads and methods
US20020182920A1 (en) * 1997-12-31 2002-12-05 Farnworth Warren M. Semiconductor device socket, assembly and methods
US6765803B2 (en) 1997-12-31 2004-07-20 Micron Technology, Inc. Semiconductor device socket
US6265773B1 (en) 1997-12-31 2001-07-24 Micron Technology, Inc. Vertically mountable and alignable semiconductor device, assembly, and methods
US6268655B1 (en) 1997-12-31 2001-07-31 Micron Technology, Inc. Semiconductor device including edge bond pads and methods
US6295209B1 (en) 1997-12-31 2001-09-25 Micron Technology, Inc. Semiconductor device including combed bond pad opening, assemblies and methods
US6800505B2 (en) 1997-12-31 2004-10-05 Micron Technology, Inc. Semiconductor device including edge bond pads and related methods
US20030111718A1 (en) * 1997-12-31 2003-06-19 Kinsman Larry D. Vertically mountable and alignable semiconductor device assembly
US7082681B2 (en) 1997-12-31 2006-08-01 Micron Technology, Inc. Methods for modifying a vertical surface mount package
US6512290B2 (en) 1997-12-31 2003-01-28 Micron Technology, Inc. Vertically mountable and alignable semiconductor device, assembly, and methods
US6342731B1 (en) 1997-12-31 2002-01-29 Micron Technology, Inc. Vertically mountable semiconductor device, assembly, and methods
US6963128B2 (en) 1997-12-31 2005-11-08 Micron Technology, Inc. Vertically mountable and alignable semiconductor device assembly
US6531764B2 (en) 1997-12-31 2003-03-11 Micron Technology, Inc. Vertically mountable semiconductor device, assembly, and methods
US6828173B2 (en) 1997-12-31 2004-12-07 Micron Technology, Inc. Semiconductor device including edge bond pads and methods
US6410406B1 (en) 1997-12-31 2002-06-25 Micron Technology, Inc. Semiconductor device including edge bond pads and methods
US6414374B2 (en) 1997-12-31 2002-07-02 Micron Technology, Inc. Semiconductor device including edge bond pads and methods
US6198636B1 (en) * 1997-12-31 2001-03-06 Micron Technology, Inc. Semiconductor device socket, assembly and methods
US6825547B2 (en) 1997-12-31 2004-11-30 Micron Technology, Inc. Semiconductor device including edge bond pads
US6803656B2 (en) 1997-12-31 2004-10-12 Micron Technology, Inc. Semiconductor device including combed bond pad opening
US6442044B2 (en) 1997-12-31 2002-08-27 Microntechnology, Inc. Semiconductor device socket, assembly and methods
US20020121677A1 (en) * 1997-12-31 2002-09-05 Farnworth Warren M. Semiconductor device including edge bond pads and methods
US6383839B2 (en) 1998-01-27 2002-05-07 Micron Technology, Inc. Vertically mountable semiconductor device and methods
US6800942B1 (en) 1998-01-27 2004-10-05 Micron Technology, Inc. Vertically mountable semiconductor device and methods
US6239012B1 (en) 1998-01-27 2001-05-29 Micron Technology, Inc. Vertically mountable semiconductor device and methods
US6455351B2 (en) 1998-03-30 2002-09-24 Micron Technology, Inc. Vertical surface mount assembly and methods
US7227261B2 (en) 1998-03-30 2007-06-05 Micron Technology, Inc. Vertical surface mount assembly and methods
US7871859B2 (en) 1998-03-30 2011-01-18 Round Rock Research, Llc Vertical surface mount assembly and methods
US6492728B2 (en) 1998-03-30 2002-12-10 Micron Technology, Inc. Vertical surface mount assembly
US20040034997A1 (en) * 1998-03-30 2004-02-26 Kinsman Larry D. Vertical surface mount assembly and methods
US6228677B1 (en) 1998-03-30 2001-05-08 Micron Technology, Inc. Vertical surface mount assembly and methods
US20110101514A1 (en) * 1998-03-30 2011-05-05 Kinsman Larry D Vertical surface mount assembly and methods
US6611058B2 (en) 1998-03-30 2003-08-26 Micron Technology, Inc. Vertical surface mount assembly and methods
US6215183B1 (en) 1998-03-30 2001-04-10 Micron Technology, Inc. Vertical surface mount assembly and methods
US6417024B2 (en) 1998-03-31 2002-07-09 Micron Technology, Inc. Back-to-back semiconductor device module, assemblies including the same and methods
US6648663B2 (en) 1998-03-31 2003-11-18 Micron Technology, Inc. Locking assembly for securing semiconductor device to carrier substrate
US6565374B2 (en) 1998-03-31 2003-05-20 Micron Technology, Inc. Locking assembly for securing semiconductor device to carrier substrate
US6457985B1 (en) 1998-03-31 2002-10-01 Micron Technology, Inc. Locking assembly for securing semiconductor device to carrier substrate
US6238228B1 (en) 1998-03-31 2001-05-29 Micron Technology, Inc. Locking assembly for securing semiconductor device to carrier substrate
US6302719B1 (en) 1998-03-31 2001-10-16 Micron Technology, Inc. Locking assembly for securing semiconductor device to carrier substrate
US7282789B2 (en) 1998-03-31 2007-10-16 Micron Technology, Inc. Back-to-back semiconductor device assemblies
US7057291B2 (en) 1998-03-31 2006-06-06 Micron Technology, Inc. Methods for securing vertically mountable semiconductor devices in back-to back relation
US6507109B2 (en) 1998-03-31 2003-01-14 Micron Technology, Inc. Vertical surface mount package utilizing a back-to-back semiconductor device module
US6398573B1 (en) * 1998-03-31 2002-06-04 Micron Technology, Inc. Locking assembly for securing semiconductor device to carrier substrate
US7015063B2 (en) 1998-03-31 2006-03-21 Micron Technology, Inc. Methods of utilizing a back to back semiconductor device module
US6837731B2 (en) 1998-03-31 2005-01-04 Micron Technology, Inc. Locking assembly for securing a semiconductor device to a carrier substrate
US6380630B1 (en) 1998-03-31 2002-04-30 Micron Technology, Inc. Vertical surface mount package utilizing a back-to-back semiconductor device module
US6873037B2 (en) 1998-03-31 2005-03-29 Micron Technology, Inc. Vertical surface mount package utilizing a back-to-back semiconductor device module
US20050040511A1 (en) * 1998-03-31 2005-02-24 Kinsman Larry D. Back-to-back semiconductor device assemblies
US20050032274A1 (en) * 1998-03-31 2005-02-10 Kinsman Larry D. Methods for securing vertically mountable semiconductor devices in back-to back relation
US6330159B1 (en) 1998-04-15 2001-12-11 Micron Technology, Inc. Vertical surface mount apparatus with thermal carrier
US6418023B2 (en) 1998-04-15 2002-07-09 Micron Technology, Inc. Vertical surface mount apparatus with thermal carrier
US6781839B2 (en) 1998-04-15 2004-08-24 Micron Technology, Inc. Vertical surface mount apparatus with thermal carrier and method
US6577503B2 (en) 1998-04-15 2003-06-10 Micron Technology, Inc. Vertical surface mount apparatus with thermal carrier
US6760970B2 (en) 1998-05-04 2004-07-13 Micron Technology, Inc. Method for forming modular sockets using flexible interconnects and resulting structures
US7040930B2 (en) 1998-05-04 2006-05-09 Micron Technology, Inc. Modular sockets using flexible interconnects
US6453550B1 (en) 1998-05-04 2002-09-24 Micron Technology, Inc. Method for forming modular sockets using flexible interconnects and resulting structures
US7367845B2 (en) 1998-05-04 2008-05-06 Micron Technology, Inc. Modular sockets using flexible interconnects
US6319065B1 (en) 1998-05-04 2001-11-20 Micron Technology, Inc. Method and apparatus for forming modular sockets using flexible interconnects and resulting structures
US6478627B2 (en) 1998-05-04 2002-11-12 Micron Technology, Inc. Method and apparatus for forming modular sockets using flexible interconnects and resulting structures
US7192311B2 (en) 1998-05-04 2007-03-20 Micron Technology, Inc. Apparatus for forming modular sockets using flexible interconnects and resulting structures
US20070059984A1 (en) * 1998-05-04 2007-03-15 Farnworth Warren M Modular sockets using flexible interconnects
US6758696B2 (en) 1998-05-04 2004-07-06 Micron Technology, Inc. Method and apparatus for forming modular sockets using flexible interconnects and resulting structures
US7153164B2 (en) 1998-05-04 2006-12-26 Micron Technology, Inc. Method and apparatus for forming modular sockets using flexible interconnects and resulting structures
US20060234560A1 (en) * 1998-05-04 2006-10-19 Farnworth Warren M Modular sockets using flexible interconnects
US6751859B2 (en) 1998-05-04 2004-06-22 Micron Technology, Inc. Method for forming modular sockets using flexible interconnects and resulting structures
US20050269686A1 (en) * 1998-05-04 2005-12-08 Farnworth Warren M Method and apparatus for forming modular sockets using flexible interconnects and resulting structures
US7094108B2 (en) 1998-05-04 2006-08-22 Micron Technology, Inc. Apparatus for forming modular sockets using flexible interconnects and resulting structures
US6612872B2 (en) 1998-05-04 2003-09-02 Micron Technology, Inc. Apparatus for forming modular sockets using flexible interconnects and resulting structures
US6518098B2 (en) 1998-09-01 2003-02-11 Micron Technology, Inc. IC package with dual heat spreaders
US6765291B2 (en) 1998-09-01 2004-07-20 Micron Technology, Inc. IC package with dual heat spreaders
US6326687B1 (en) * 1998-09-01 2001-12-04 Micron Technology, Inc. IC package with dual heat spreaders
US20020185727A1 (en) * 1998-09-01 2002-12-12 Corisis David J. IC package with dual heat spreaders
US6920688B2 (en) 1998-09-01 2005-07-26 Micron Technology, Inc. Method for a semiconductor assembly having a semiconductor die with dual heat spreaders
US6830719B2 (en) 1998-10-07 2004-12-14 Micron Technology, Inc. Method for reducing warpage during application and curing of encapsulant materials on a printed circuit board
US6592670B1 (en) 1998-10-07 2003-07-15 Micron Technology, Inc. Apparatus for reducing warpage during application and curing of encapsulant materials on a printed circuit board
US6764549B2 (en) 1998-10-07 2004-07-20 Micron Technology, Inc. Method and apparatus for reducing warpage during application and curing of encapsulant materials on a printed circuit board
US7166252B2 (en) 1998-10-07 2007-01-23 Micron Technology, Inc. Method for reducing warpage during application and curing of encapsulant materials on a printed circuit board
US20050087909A1 (en) * 1998-10-07 2005-04-28 Gochnour Derek J. Method for reducing warpage during application and curing of encapsulant materials on a printed circuit board
US6224936B1 (en) 1998-10-07 2001-05-01 Micron Technology, Inc. Method for reducing warpage during application and curing of encapsulant materials on a printed circuit board
US6527999B2 (en) 1998-10-07 2003-03-04 Micron Technology, Inc. Method for reducing warpage during application and curing of encapsulant materials on a printed circuit board
US6537100B2 (en) 1999-02-26 2003-03-25 Micron Technology, Inc. Apparatus and method for packaging circuits
US6419517B1 (en) 1999-02-26 2002-07-16 Micron Technology, Inc. Apparatus and method for packaging circuits
US6676416B1 (en) * 2000-05-11 2004-01-13 Zyvex Corporation Ribbon cable and electrical connector for use with microcomponents
US20080192446A1 (en) * 2007-02-09 2008-08-14 Johannes Hankofer Protection For Circuit Boards
US20130063916A1 (en) * 2007-02-09 2013-03-14 Infineon Technologies Ag Protection for Circuit Boards
US8625298B2 (en) * 2007-02-09 2014-01-07 Infineon Technologies Ag Protection for circuit boards
US20080278217A1 (en) * 2007-05-07 2008-11-13 Infineon Technologies Ag Protection for circuit boards
US8522051B2 (en) 2007-05-07 2013-08-27 Infineon Technologies Ag Protection for circuit boards

Also Published As

Publication number Publication date
EP0427151A2 (en) 1991-05-15
US4967262A (en) 1990-10-30
EP0427151A3 (en) 1992-03-11

Similar Documents

Publication Publication Date Title
USRE34794E (en) Gull-wing zig-zag inline lead package having end-of-package anchoring pins
US6855575B2 (en) Semiconductor chip package having a semiconductor chip with center and edge bonding pads and manufacturing method thereof
US5128831A (en) High-density electronic package comprising stacked sub-modules which are electrically interconnected by solder-filled vias
US5260601A (en) Edge-mounted, surface-mount package for semiconductor integrated circuit devices
US5592019A (en) Semiconductor device and module
US4951124A (en) Semiconductor device
US6457985B1 (en) Locking assembly for securing semiconductor device to carrier substrate
US20050003581A1 (en) Thin stacked package and manufacturing method thereof
JPH08279670A (en) Surface mount structure of electronic component
US6191474B1 (en) Vertically mountable interposer assembly and method
US20040080056A1 (en) Packaging system for die-up connection of a die-down oriented integrated circuit
US20030198020A1 (en) Vertical surface mount apparatus with thermal carrier and method
JP3366062B2 (en) Overmold type semiconductor device and method of manufacturing the same
JPS61174752A (en) Semiconductor device
US6837731B2 (en) Locking assembly for securing a semiconductor device to a carrier substrate
JPH04171752A (en) Gull-wing zigzag in-line-lead package with package terminal anchor pin
KR940008340B1 (en) Leadframe for semiconductor device
KR0119088Y1 (en) Semiconductor package
KR100206941B1 (en) Buttom lead package and its manufacturing method
KR100252861B1 (en) Stack type semiconductor chip package and method for assembly of the same
JPH05102380A (en) Semiconductor integrated circuit device and mounting structure thereof
KR940005489Y1 (en) Small underline type semiconductor package
KR970010677B1 (en) Structure of a lead frame
KR900006603Y1 (en) Heat sink
JPH1065087A (en) Module i/o lead structure

Legal Events

Date Code Title Description
FPAY Fee payment

Year of fee payment: 12