USRE36098E

USRE36098E - Optimal resetting of the transformer's core in single-ended forward converters

Info

Publication number: USRE36098E
Application number: US08/866,020
Authority: US
Inventors: Patrizio Vinciarelli
Original assignee: VLT Corp
Current assignee: VLT Corp
Priority date: 1982-02-04
Filing date: 1997-05-30
Publication date: 1999-02-16
Anticipated expiration: 2002-02-04

Abstract

The transformer's core in single ended forward converters is reset by a "magnetizing current mirror" consisting of a capacitor in series with an auxiliary switch which, during the OFF period of the primary switch, couples the capacitor to one of the transformer's windings to form a resonant circuit with the transformer's magnetizing inductance. The resonant circuit recycles the transformer's magnetizing energy by creating a mirror image of the magnetic flux between ON periods. This maximizes the flux swing available within a given core. The voltage stress on the primary switch is minimized as the voltage across the switch during the OFF period is approximately constant and automatically tailored to avoid dead time for arbitrary values of the switch duty cycle.

Description

.Iadd.This application is a continuation of application Ser. No. 08/538,351, filed Oct. 3, 1995, now abandoned, which is a reissue of Ser. No. 06/345,799 filed on Feb. 4, 1982, U.S. Pat. No. 4,441,146.

This application, Ser. No. 08/866,020, filed May 30, 1997, and divisional application, Ser. No. 09/052,137, filed Mar. 31, 1998, are both reissues of U.S. Pat. No. 4,441,146..Iaddend.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to DC-to-DC converters which process electrical power from a source, at an input DC voltage, to deliver it to a load, at an output DC voltage, by selectively connecting a power transformer to the source and the load via solid state switches. In particular, the invention relates to converters of the forward type, in which the power transformer is simultaneously connected to the source and the load. More particularly, the invention relates to forward converters of the single ended type, in which the power flow from source to load is controlled by a single solid state switch.

2. Description of the Prior Art

This invention relates to the class of DC-to-DC converters which incorporate the topology represented in FIG. 1. A converter in that class is referred to as a "single ended forward" coverter because power flow is gated by a single switch 10 and energy is transferred forward, from the primary winding to the secondary winding of the transformer 11, during the ON period of the switch 10.

Converters in this class present a unique problem, in that the conversion topology does not inherently define the mechanism by which the transformer's core is to be reset during the OFF period of the switch. The solution to this problem is not unique, as evidenced by the multiplicity of proposals found in the literature which, in order to implement the reset function, complement the topology represented in FIG. 1 by differing choices of auxiliary circuitry. The differences are important since they affect the cost of the converter, as well as its efficiency and power density.

The traditional approach, represented in FIG. 2a, has been to reset the core via an auxiliary transformer winding connected with inverted polarity in series with rectifier 13. The operation of this reset mechanism is illustrated in FIG. 2b, where, in addition to idealized component behavior, a one-to-one turn ratio between auxiliary and primary windings has been assumed. This figure exemplifies a sequence of two ON periods, separated by an OFF period to enable the core to reset itself. The figure displays, as functions of time, the state of the switch 10, the voltage V across the switch, and the current I through the auxiliary winding.

The first ON period is given by the time interval between t₁ and t₂. During this interval, the voltage V across the switch 10 vanishes and the source voltage V_o is impressed upon the primary winding. The magnetizing inductance controls the slope of the magnetizing current, flowing in the primary winding, and of the magnetizing energy which accumulates in the transformer's core. The current I vanishes, as the rectifier 13 is reverse biased, in a blocking state, and thus keeps the auxiliary winding inoperative.

At time t₂, the opening of the switch 10 interrupts current flow in the primary winding. Neglecting the effects of leakage inductance between primary and auxiliary windings, the voltage V is clamped to 2 V_o as the rectifier 13 becomes forward biased and begins to conduct the magnetizing current. The current I through the auxiliary winding is then equal to the peak value I_p of the magnetizing current. Following time t₂, I decays as magnetizing energy is returned to the voltage source V_o. At time t₃, the recycling of the magnetizing energy is completed, the current I vanishes, and, neglecting hysteresis, the magnetic flux through the transformer's core is reset to zero. The time interval between t₂ and t₃ is the core reset period. Having assumed a one-to-one primary to auxiliary turn ratio, this period equals the ON period t₂ -t₁.

The remainder of the cycle, between times t₃ and t₄, is the "dead" period. In this period, the switch 10 remains open, the voltage V across it equals the source voltage V_o, and the current I vanishes. The circuit in FIG. 2a is not efficiently functional during dead time.

The relative duration of the dead period depends upon the duty cycle of the switch 10 (assumed to be 33% in FIG. 2b). At 50% duty cycle, the dead period vanishes. Operation beyond 50% duty cycle would lead to saturation of the transformer's core and (catastrophic) converter failure.

Thus, the traditional reset mechanism, represented in FIG. 2a, presents an inherent limitation in the available duty cycle range. This is a significant drawback as it impairs the ability of the converter to regulate against wide variations in the source voltage or in the load. Another drawback of the traditional reset method is that allowed values of the duty cycle are in general associated with a non-vanishing dead time. The existence of a dead time causes the switch 10 to experience a peak voltage greater than is in principle necessary to reset the core in the time interval between ON periods.

Similar limitations apply, to a varying degree, to any other reset mechanism which involves a variable dead time to accomodate variations in the switch duty cycle. Reset methods falling into this category are found in S. Hayes, Proceedings of Powercon 8, Power Concepts Inc. 1981 and in R. Severns, ibid..

To avoid these limitations, a different approach to the resetting of the transformer's core in single ended forward converters was proposed by S. Clemente, B. Pelly and R. Ruttonsha in "A Universal 100 KHz Power Supply Using a Single HEXFET", International Rectifier Corporation Applications Note AN-939, December 1980. These authors suggest a capacitor-resistor-diode network, as represented in FIG. 3a. The network clamps the switch to the minimal peak voltage consistent with a given source voltage and switch duty cycle, eliminating the need for dead time while allowing for a wide range of duty cycles. Attainment of these design goals is actually dependent upon component characteristics and values. In particular, the resistor 15 must be sized small enough so that the transformer's magnetizing current does not ever vanish.

With this assumption, the operation of this reset circuit is illustrated in FIG. 3b. As in the example given to illustrate the traditional reset mechanism, a sequence of two ON periods separated by an OFF period, with a 33% duty cycle is considered. The figure displays, as functions of time, idealized waveforms defining the state of the switch 10, the voltage V across it, and the current I through the rectifier 13. During the OFF period, the latter coincides with the transformer's magnetizing current.

As exhibited in FIG. 3b, the voltage V across the switch 10 is now a rectangular waveform with a peak value equal to 1.5 V_o. The current I through the rectifier 13 is a trapezoidal waveform which, during the OFF period, decays from a peak value (I_p +I_o) to a minimum value I_o, a non-negative function of V_o and the duty cycle D.

A comparison of the voltage waveform of FIG. 3b with the corresponding one in FIG. 2b emphasizes the main advantage of the capacitor-resistor-diode clamp: a reduction in the voltage stress applied to the switch 10. A related advantage is the elimination of bounds resulting from core saturation on the duty cycle range, enabling the converter to remain functional over wider ranges of input voltage and output load. A further advantage is the avoidance of auxiliary transformer windings which simplifies transformer construction. Unfortunately, while attaining these benefits, the reset mechanism of FIG. 3a compromises the converter's efficiency and power density.

The reduction in the efficiency of the conversion process arises principally from the dissipation of magnetizing energy accumulated in the transformer during the ON period. Instead of being recycled, this energy is converted into heat by the clamp circuit. This power waste is significant, particularly in an otherwise efficiency mindful conversion system.

The reduction in power density results mainly from an increase in the size of the transformer which is rendered necessary by a decrease in the available dynamic flux swing for the magnetic material making up the transformer's core. This is evidenced in FIG. 3b by the quantity referred to as I_o, which represents a non-negative, static component of the magnetization current. The component shifts the peak value of the magnetizing current, leading to an excitation of the transformer's core which brings the magnetic material closer to saturation. The consequent decrease in available flux swing reduces the power handling capability per unit volume at a given frequency of a given core and, with it, the converter's power density.

From these points of view, the traditional reset mechanism of FIG. 2a offers important, relative advantages. However, even from the point of view of core utilization, it does not represent an optimal reset mechanism, since the flux swing is still unipolar. This unipolar character of the transformer's core excitation has often been noted to be an inherent drawback of single ended forward converters. In fact, it is not a general drawback of this class of conversion topologies as it is only inherent to some reset mechanisms which have been adopted to complement those topologies.

These considerations suggest that the "optimal" reset mechanism for single ended forward converters, yet to be invented, should incorporate the following set of objectives:

it should be non-dissipative in nature, i.e. it should recycle the core's magnetization energy;

it should maximize the available flux swing, i.e. it should lead to a bipolar core excitation;

it should minimize the voltage stress on the switch, i.e. the voltage waveform should be rectangular without involving a dead period;

it should not introduce constraints on the switch duty cycle;

it should simplify transformer construction by eliminating the need for auxiliary windings.

SUMMARY OF THE INVENTION

This invention provides new apparatus for resetting the transformer's core in single ended forward converters. The apparatus consists of a storage capacitor, an auxiliary solid state switch (distinguished from the primary switch which controls the converter's power flow), and of a switch control circuit. The switch control circuit operates the auxiliary switch in its open state during the converter's ON period, when the primary switch is closed, and in its closed state during the converter's OFF period when the primary switch is open. The auxiliary switch (operated by such a control circuit) and storage capacitor are connected in parallel with a transformer winding.

The apparatus defined above resets the transformer's core by implementing the conceptual function of a "magnetizing current mirror": it takes the magnetization at the end of the ON period and creates a mirror image of it prior to the initiation of the following conversion cycle. The image is created via the charging and discharging of the storage capacitor which forms a resonant circuit with the transformer's magnetizing inductance. The capacitor is sized so that the period of this resonant circuit is considerably greater than the conversion period. Consequently, the capacitor's voltage and the voltage across the primary switch are approximately constant during the OFF period.

The new apparatus provides optimal resetting of the transformer's core in single ended forward converter topologies:

it is non-dissipative, as it recycles the core's magnetization energy via intermediate storage in a resonant circuit;

it maximizes the available flux swing, as it creates a mirror image of the magnetic flux between ON periods;

it minimizes the voltage stress on the (primary) switch, as it applies to this switch during the OFF period an approximately constant voltage which is automatically tailored to avoid dead time;

it does not introduce constraints on the switch duty cycle due to core saturation;

it simplifies transformer construction, as it can be implemented without auxiliary windings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 defines the general class of single ended forward converters.

FIG. 2a shows the auxiliary transformer winding which has been traditionally employed to reset the core in single ended forward converters.

FIG. 2b exemplifies the operation of the reset mechanism in FIG. 2a by displaying a possible time sequence of states for the switch 10 and the corrresponding idealized waveforms for the voltage V, across the switch 10, and the current I, in the auxiliary transformer winding.

FIG. 3a shows a capacitor-resistor-diode network which has been employed in the prior art as an alternative mechanism for resetting the core in single ended forward converters.

FIG. 3b provides an example of the operation of the reset mechanism in FIG. 3a analagous to that of FIG. 2b to allow for a direct comparison of voltage and current waveforms.

FIG. 4a discloses a preferred embodiment of the new reset mechanism for single ended forward converters, consisting of a "magnetizing current mirror" connected across the transformer's secondary.

FIG. 4b discloses voltage and current waveforms useful in describing the operation of the new reset mechanism.

FIG. 4c discloses a preferred implementation of the magnetizing current mirror in which the auxiliary switch is realized in terms of a MOSFET transistor and its integral reverse rectifier.

FIG. 4d discloses equivalent circuit diagrams characterizing the ON and OFF periods of a single ended forward converter reset by a magnetizing current mirror.

FIG. 4e discloses an embodiment of the new reset mechanism in which the magnetizing current mirror is connected across the transformer's primary.

FIG. 4f discloses yet another embodiment of the invention in which the magnetizing current mirror is connected across an auxiliary transformer winding.

FIG. 5 compares idealized waveforms exemplifying the time evolution of the magnetic flux across the transformer's core in a single ended forward converter reset by: (a) the traditional mechanism, employing an auxiliary transformer winding; (b) the capacitor-resistor-diode network; (c) the optimal reset mechanism, utilizing a magnetizing current mirror.

DETAILED DESCRIPTION OF THE INVENTION

Referring now to FIG. 4a, the primary switch 10 selectively couples the primary winding of transformer 11 to a source of voltage V_o. A rectifier 12 is connected in series with the secondary winding of transformer 11 and is oriented to conduct a current during the ON period of the primary switch 10. These are conventional elements of a single ended forward converter. In order to reset the transformer 11 during the OFF period of the primary switch 10, these elements are complemented by a "magnetizing current mirror."

The magnetizing current mirror comprises the storage capacitor 20, the auxiliary switch 21 and the switch control circuit 22. The capacitor 20 and the switch 21 are connected in series. The switch 21 is operated by the control circuit 22 in accordance with a control logic requiring that the auxiliary switch 21 be opened prior to the ON period of the primary switch 10, and closed after this period. To accomplish this function, as suggested by the arrows at the bottom of the box representing the switch control circuit 22, this circuit is interfaced with primary switch control circuitry, not represented in the figure. The implementation of the control circuit and of its interface can be realized in a number of ways which will become obvious to those skilled in the art.

In FIG. 4a, the magnetizing current mirror is connected in parallel with the secondary winding of transformer 11. Assuming an equal number of turns between this and the primary winding, and neglecting the effects of leakage inductance between primary and secondary windings, and parasitic effects including the ones associated with winding capacitance or the capacitance of non-ideal hardware realizations of the primary switch 10 and auxiliary switch 21, the operation of the magnetizing current mirror as a reset mechanism is illustrated by an example in FIG. 4b.

As in the examples of FIG. 1b and 2b which were used to characterize the operation of reset mechanisms found in the prior art, FIG. 4b considers a sequence of two ON periods separated by an OFF period, with a 33% duty cycle. The figure displays, as functions of time, idealized waveforms defining the state of the switch 10, the voltage V across it and the current I through the auxiliary switch 21.

At time t₁, the auxiliary switch 21 is opened and the primary switch 10 is closed, initiating the first ON period. During this period, the voltage V across the primary switch and the current I through the auxiliary switch vanish. The source voltage V_o is impressed upon the primary winding of transformer 11, causing the magnetic flux φ across the transformer's core to change with time as dictated by Faraday's law. If N is the number of primary (and secondary) turns, the total change in the flux φ is V_o (t₂ -t₁)/N. Concurrent with this is a change in the magnetizing current given, in terms of the magnetizing inductance L_M, by V_o (t₂ -t₁)/L_M.

At time t₂, the primary switch 10 is opened and the auxiliary switch 21 is closed, initiating the OFF period. During this period, the voltage across the auxiliary switch and the current through the primary switch vanish. The voltage V across the primary switch is clamped to a value V_p =V_o +V_c, where V_c is the voltage across the storage capacitor 20. Conduction of the magnetizing current is transferred to the secondary winding where the current loop is closed by the storage capacitor 20 and the auxiliary switch 21. Initially, this current, I, is negative in sign and equal in magnitude to I_p /2.

The evolution of the system during the OFF period, the time interval between t₂ and t₄, depends upon the capacitance value C chosen for the storage capacitor 20. C should be chosen to be large enough so that the time dependence of the voltage, V_c, across the capacitor can be approximately neglected. This accounts for the constancy of the voltage V, and the linear rise of the current I, both displayed in FIG. 4b. Invoking once again Faraday's law, the total change in the magnetic flux φ during the OFF period is then approximately given by -V_c (t₄ -t₂)/N. By equaling the magnitude of this change to the corresponding flux change during the ON period, it follows that

V.sub.p ≅V.sub.o (1+D)                           (1)

where D=(t₂ -t₁)/(t₄ -t₂) is the primary switch duty cycle. The total change in the magnetizing current I during the OFF period is approximately given by -V_c (t₄ -t₂)/L_M. Since the integral of the magnetizing current I during the OFF period must vanish (under steady state conditions), it follows that

I.sub.p /2≅V.sub.o t.sub.ON /(2L.sub.M),         (2)

where t_ON =(t₂ -t₁) is the ON time of the primary switch.

The evolution of the system during the OFF period may be analyzed further by dividing the period into two intervals, t₂ -t₃ and t₃ -t₄, of equal duration, characterized respectively by negative and positive values of the magnetizing current I. In the first interval, the magnetizing current charges the storage capacitor 20, and storage of magnetizing energy is progressively transferred from the transformer to the capacitor. This process is completed at time t₃ when the magnetizing current vanishes. In the second interval, the magnetizing current discharges the storage capacitor 20, and storage of magnetizing energy is progressively transferred back from the capacitor to the transformer. This process is completed at time t₄ when a mirror image of the magnetizing current has been formed and magnetizing energy has been reflected into the transformer, resetting it for the next cycle.

Because of the alternating character of the magnetizing current I, the auxiliary switch 20 must be able to conduct negative as well as positive currents, in addition to being able to block positive voltages. This observation suggests MOSFET transistors as natural candidates to implement the functions of the switch 21.

FIG. 4c shows a magnetizing current mirror in which the auxiliary switch 21 is implemented with a MOSFET transistor. The reverse rectifier inherent to the MOSFET is explicitly shown. Thus the auxiliary switch 21 can be thought of as being always closed to negative currents and selectively closed to positive currents. The flow of positive currents is controlled by the switch control circuit 22 which applies a suitable voltage to the gate of the MOSFET.

Referring back to the example of FIG. 4b, it is apparent that the MOSFET 21 can be turned on at any time between t₂ and t₃ without disrupting the operaion of the magnetizing current mirror. Such a delay does not represent "dead" time since during this time the reset mechanism is operational. On the other hand, a delay between the opening of the auxiliary switch 21 and the closing of the primary switch 10 represents dead time. For this reason it is efficient to keep such a delay to a minimum, consistent with the requirement to avoid an overlap between switches. However, a small delay is useful to allow the magnetizing current to charge and discharge parasitic capacitances associated with the switches and windings.

A different perspective on the operation of the magnetizing current mirror as a reset mechanism for single ended forward converters is offered by FIG. 4d showing equivalent circuit diagrams characterizing the converter's ON and OFF periods. The magnetizing current mirror is operational only during the OFF period, when the storage capacitor 20 is connected via the auxiliary switch 21, in its closed position, across a winding of transformer 11. These elements form a resonant circuit of period T_res =2π·√L_M C, where L_M is the transformer's magnetizing inductance as seen from the mirror and C is the mirror's capacitance. During the OFF period of the converter's cycle, the resonant circuit undergoes a portion of its natural cycle which, under steady state conditions, is centered about a voltage maximum. Approximate constancy of the voltage seen by the primary switch 10 during the OFF period translates into the requirement that the OFF period t_OFF be small relative to the resonant period T_res, t_OFF <<T_res.

The condition t_OFF <<T_res should, however, not be interpreted to mean that the mirror's capacitance should be made arbitrarily large, since the resonant period T_res introduces a time scale which limits the converter's transient response time. As implied by Eq. (1), a change in the converter's duty cycle leads to a change in the voltage across the storage capacitor 20. To effect the latter, the integral of the magnetizing current during the OFF period is non-vanishing. Consequently, under transient conditions Eq.(2) ceases to be applicable. To avoid transformer saturation the peak value of the magnetizing current must then be limited by limiting the rate of change of the converter's duty cycle and, therefore, the transient response time.

Aside from transient conditions, during which the voltage V_c across the storage capacitor 20 changes to adjust itself to a varying duty cycle, the magnetizing current mirror and the transformer's core define an essentially closed system: magnetizing energy transferred from the transformer to the storage capacitor is injected back into the transformer within the converter's OFF period. This internal recycling is only incomplete to the extent that non-ideal circuit elements give rise to energy losses. These may be accounted for by modifying the resonant circuit of FIG. 4d with the addition of resistive components representing the effects of losses associated with the transformer's core, the winding resistance and the equivalent series resistances of the storage capacitor 20 and the auxiliary switch 21.

The equivalent circuits of FIG. 4d suggest that applications of the magnetizing current mirror to the resetting of the transformer's core in single ended forward converters need not be restricted to the topology of FIG. 4a. Useful variations of the new reset mechanism are indeed obtained by connecting the mirror in parallel with different transformer windings.

In FIG. 4e, the magnetizing current mirror is connected in parallel with the primary winding of transformer 11. The main advantage of this topology, relative to that of FIG. 4a, originates from a direct coupling of the mirror to the primary switch 10. This eliminates a certain amount of ringing of the voltage V across the primary switch, due to leakage inductance and parasitic capacitances, which is present with the topology of FIG. 4a. However, this is not a serious problem. On the other hand, a MOSFET implementation of the switch 21 in FIG. 4e would require the use of a p-channel device and/or a floating gate drive. This is a relatively serious drawback for this topology.

In FIG. 4f, the magnetizing current mirror is connected in parallel with an auxiliary transformer winding. Possible advantages to this configuration originate from the flexibility provided by the choice of turn ratio between auxiliary and primary windings, and the possibility to magnetically couple these windings closely. The trade off is added complexity in transformer construction.

These and other possible variations in the detailed implementation of the new reset mechanism share the same equivalent circuits of FIG. 4d and the same fundamental advantages when compared to reset mechanisms known in the prior art. Some of these advantages are made more evident by referring to FIG. 5, which compares the idealized behavior of the magnetic flux as it would evolve in the examples of FIGS. 2b, 3b and 4b, corresponding to: (a) the traditional reset mechanism; (b) the capacitor-resistor-diode network; (c) the new reset mechanism. The curves denoted respectively by a, b and c define as a function of time the flux across a core made of soft ferromagnetic material of negligible hysteresis. The saturation flux is denoted by φ_sat.

Among the three reset mechanisms considered in FIG. 5, the capacitor-resistor-diode network (b) is the one that brings the core closest to saturation and does not recycle the core's magnetization energy. This qualifies this reset mechanism as the most inefficient in utilizing space (the volume of the core) and energy. Its redeeming feature is the constancy in the slope of the flux curve between t₂ and t₄ which, in view of Faraday's law, implies minimal voltage stress on the converter's primary switch.

Some of the drawbacks of the traditional reset mechanism (a) stem from the greater slope of the flux curve between t₂ and t₃ and vanishing slope between t₃ and t₄. These observations imply greater voltage stress on the primary switch, the presence of dead time, and a (50%) limitation on the duty cycle. Other drawbacks stem from the asymmetry between positive and negative flux, which signifies inefficient use of the core's volume and increased core energy losses.

In light of these considerations, the nature of curve c, characterizing the new reset mechanism, speaks for itself and suggests that a magnetizing current mirror should provide optimal resetting of the transformer's core in single ended forward converters.

Other embodiments are within the following claims.

Claims

I claim:

1. In a single ended forward converter in which energy is transferred from a primary winding to a secondary winding of a transformer during the ON period of a primary switch, circuitry for recycling the magnetizing energy stored in said transformer to reset it during the OFF period of said primary switch, comprising:

a storage capacitor;

an auxiliary switch connected in series with said storage capacitor;

a switch control circuit operating said auxiliary switch in accordance with a control logic such that (a) said auxiliary switch is opened prior the ON period of said primary switch, (b) said auxiliary switch remains open throughout the ON period of said primary switch, (c) said auxiliary switch is closed after the ON period of said primary switch.

2. The transformer resetting apparatus of claim 1 wherein said circuitry is connected in parallel with said secondary winding.

3. The transformer resetting apparatus of claim 1 wherein said circuitry is connected in parallel with said primary winding.

4. The transformer resetting apparatus of claim 1 wherein said transformer further includes an auxiliary winding, wherein said circuitry is connected in parallel with said auxiliary winding.

5. The transformer resetting apparatus of claim 1 wherein said auxiliary switch is a MOSFET transistor with an integral reverse diode.

6. In a single ended forward converter in which energy is transferred across a transformer during the ON period of a primary switch, an apparatus for recycling the magnetizing energy of said transformer during the OFF period of said primary switch, comprising:

a storage capacitor;

auxiliary switching means to selectively couple said storage capacitor to said transformer, wherein said storage capacitor and said transformer form a resonant circuit during the OFF period of said primary switch. .Iadd.

7. The circuitry of claim 1 wherein said auxiliary switch is always closed to currents in one direction and selectively closed to currents in another direction..Iaddend..Iadd.8. The circuitry of claim 1 wherein said auxiliary switch is adapted to selectively couple said storage capacitor and said transformer to form a resonant circuit during the OFF period of said primary switch..Iaddend..Iadd.9. The circuitry of claim 1 wherein said circuitry is connected to a winding in the transformer..Iaddend..Iadd.10. The circuitry of claim 9 wherein said winding is a primary winding..Iaddend..Iadd.11. The circuitry of claim 9 wherein said winding is a secondary winding..Iaddend..Iadd.12. The circuitry of claim 9 wherein said winding is an auxiliary winding..Iaddend..Iadd.13. The circuitry of claim 9, 10, 11 or 12 wherein said auxiliary switch is adapted to selectively couple said storage capacitor and said transformer to form a resonant circuit during the OFF period of said primary switch..Iaddend..Iadd.14. The circuitry of claim 1 wherein an equivalent circuit of said converter, during the OFF period of said primary switch, comprises a resonant circuit formed by said capacitor and a winding of said transformer..Iaddend..Iadd.15. The circuitry of claim 14 wherein said winding comprises a primary winding..Iaddend..Iadd.16. The circuitry of claim 14 wherein said winding comprises a secondary winding..Iaddend..Iadd.17. The circuitry of claim 14 wherein said winding comprises a auxiliary winding..Iaddend..Iadd.18. The circuitry of claim 2 wherein said auxiliary switch is adapted to selectively couple said storage capacitor and said transformer to form a resonant circuit during the OFF period of said primary

switch..Iaddend..Iadd.19. The circuitry of claim 3 wherein said auxiliary switch is adapted to selectively couple said storage capacitor and said transformer to form a resonant circuit during the OFF period of said primary switch..Iaddend..Iadd.20. The circuitry of claim 4 wherein said auxiliary switch is adapted to selectively couple said storage capacitor and said transformer to form a resonant circuit during the OFF period of said primary switch..Iaddend..Iadd.21. The circuitry of claim 1, 7, 8, 9, 10, 11, 12, 18, 19 or 20 wherein said auxiliary switch comprises a MOSFET transistor with an integral reverse diode..Iaddend..Iadd.22. The circuitry of claim 1, 7, 8, 9, 10, 11, 12, 18, 19 or 20 wherein the ON period of said primary switch begins a small delay period after opening said auxiliary switch..Iaddend..Iadd.23. The circuitry of claim 22 wherein said small delay period accommodates charging and discharging of capacitances in said converter..Iaddend..Iadd.24. The circuitry of claim 23 wherein said capacitances comprise parasitic capacitances..Iaddend..Iadd.25. The circuitry of claim 23 wherein said capacitances are associated with said auxiliary switch..Iaddend..Iadd.26. The circuitry of claim 23 wherein said capacitances are associated with said primary switch..Iaddend..Iadd.27. The circuitry of claim 23 wherein said capacitances are associated with said primary winding..Iaddend..Iadd.28. The circuitry of claim 23 wherein said parasitic capacitances are associated with said secondary

winding..Iaddend..Iadd.29. In a single ended forward converter in which energy is transferred across a transformer during the ON period of a primary switch, an apparatus for recycling the magnetizing energy of said transformer during the OFF period of said primary switch, comprising:

a storage capacitor;

auxiliary switching means to selectively couple said storage capacitor to said transformer, wherein said storage capacitor and said transformer form a resonant circuit during the OFF period of said primary switch; and

wherein the ON period of said primary switch begins a small delay period after opening said auxiliary switching means..Iaddend..Iadd.30. The apparatus of claim 29 wherein said auxiliary switching means is always closed to currents in one direction and selectively closed to currents in another direction..Iaddend..Iadd.31. The apparatus of claim 29 wherein said storage capacitor is connected to a winding of the transformer..Iaddend..Iadd.32. The apparatus of claim 29 wherein said auxiliary switching means is connected to a winding of the transformer..Iaddend..Iadd.33. The apparatus of claim 29 wherein said storage capacitor and said auxiliary switching means are connected in parallel to a winding of the transformer..Iaddend..Iadd.34. The apparatus of claim 31 wherein said winding comprises a primary winding..Iaddend..Iadd.35. The apparatus of claim 32 wherein said winding comprises a primary winding..Iaddend..Iadd.36. The apparatus of claim 31 wherein said winding comprises a secondary winding..Iaddend..Iadd.37. The apparatus of claim 32 wherein said winding comprises a secondary winding..Iaddend..Iadd.38. The apparatus of claim 31 wherein said winding

comprises an auxiliary winding..Iaddend..Iadd.39. The apparatus of claim 32 wherein said winding comprises an auxiliary winding..Iaddend..Iadd.40. The apparatus of claim 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, or 39 wherein said small delay period accommodates charging and discharging of capacitances in said converter..Iaddend..Iadd.41. The apparatus of claim 40 wherein said capacitances comprise parasitic capacitances..Iaddend..Iadd.42. The apparatus of claim 41 wherein said capacitances are associated with said primary switch..Iaddend..Iadd.43. The apparatus of claim 41 wherein said capacitances are associated with said auxiliary switching means..Iaddend..Iadd.44. The apparatus of claim 41 wherein said capacitances are associated with windings in the transformer..Iaddend.