WO1997013377A3 - Asynchronous transfer mode switch - Google Patents

Asynchronous transfer mode switch Download PDF

Info

Publication number
WO1997013377A3
WO1997013377A3 PCT/GB1996/002362 GB9602362W WO9713377A3 WO 1997013377 A3 WO1997013377 A3 WO 1997013377A3 GB 9602362 W GB9602362 W GB 9602362W WO 9713377 A3 WO9713377 A3 WO 9713377A3
Authority
WO
WIPO (PCT)
Prior art keywords
cells
ports
switching
output buffers
output
Prior art date
Application number
PCT/GB1996/002362
Other languages
French (fr)
Other versions
WO1997013377A2 (en
Inventor
David R Milway
David J Greaves
Brian J Knight
Original Assignee
Advanced Telecommunications Mo
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Telecommunications Mo filed Critical Advanced Telecommunications Mo
Priority to IL12391296A priority Critical patent/IL123912A/en
Priority to EP96931891A priority patent/EP0853864A2/en
Priority to AU70899/96A priority patent/AU7089996A/en
Publication of WO1997013377A2 publication Critical patent/WO1997013377A2/en
Publication of WO1997013377A3 publication Critical patent/WO1997013377A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/20—Support for services
    • H04L49/201—Multicast operation; Broadcast operation
    • H04L49/203—ATM switching fabrics with multicast or broadcast capabilities
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/25—Routing or path finding in a switch fabric
    • H04L49/256—Routing or path finding in ATM switching fabrics
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • H04Q11/0478—Provisions for broadband connections
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5625—Operations, administration and maintenance [OAM]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5679—Arbitration or scheduling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5681—Buffer or queue management

Abstract

A switching device for switching ATM cells from a plurality of network input links to a plurality of network output links comprises a plurality of ports containing line interfaces and input and output buffers, a hardware switch controller, a microprocessor, and memory for storing routing tables and system software. All these elements are interconnected via a processor bus, and additionally, the ports are interconnected by a separate switching bus. The switch controller employs hash-based routing table indexing to route cells from selected input ports to appropriate output ports according to the cells' header information. Switch requests generated by incoming cells are arbitrated using a token bus allocation scheme. The majority of cells are switched almost entirely in hardware, but the microprocessor can assume control of the switching architecture to resolve exception conditions and to perform special processing on selected virtual circuits. Two output buffers perport are provided; one for high-priority cells, another for lower priority cells. Additionally, a common overflow buffer is provided to temporarily store cells intended for output buffers momentarily full.
PCT/GB1996/002362 1995-10-02 1996-09-23 Asynchronous transfer mode switch WO1997013377A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IL12391296A IL123912A (en) 1995-10-02 1996-09-23 Asynchronous transfer mode switch
EP96931891A EP0853864A2 (en) 1995-10-02 1996-09-23 Asynchronous transfer mode switch
AU70899/96A AU7089996A (en) 1995-10-02 1996-09-23 Asynchronous transfer mode switch

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/538,106 US6122279A (en) 1995-10-02 1995-10-02 Asynchronous transfer mode switch
US08/538,106 1995-10-02

Publications (2)

Publication Number Publication Date
WO1997013377A2 WO1997013377A2 (en) 1997-04-10
WO1997013377A3 true WO1997013377A3 (en) 1997-08-28

Family

ID=24145521

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB1996/002362 WO1997013377A2 (en) 1995-10-02 1996-09-23 Asynchronous transfer mode switch

Country Status (6)

Country Link
US (1) US6122279A (en)
EP (1) EP0853864A2 (en)
AU (1) AU7089996A (en)
IL (1) IL123912A (en)
TW (1) TW346715B (en)
WO (1) WO1997013377A2 (en)

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US7773620B2 (en) * 2003-12-24 2010-08-10 Intel Corporation Method, system, and program for overrun identification
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Also Published As

Publication number Publication date
WO1997013377A2 (en) 1997-04-10
EP0853864A2 (en) 1998-07-22
IL123912A (en) 2001-08-08
US6122279A (en) 2000-09-19
AU7089996A (en) 1997-04-28
TW346715B (en) 1998-12-01

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