WO2000067163A3 - Placement-based pin optimization method and apparatus for computer-aided circuit design - Google Patents

Placement-based pin optimization method and apparatus for computer-aided circuit design Download PDF

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Publication number
WO2000067163A3
WO2000067163A3 PCT/IB2000/000856 IB0000856W WO0067163A3 WO 2000067163 A3 WO2000067163 A3 WO 2000067163A3 IB 0000856 W IB0000856 W IB 0000856W WO 0067163 A3 WO0067163 A3 WO 0067163A3
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WO
WIPO (PCT)
Prior art keywords
soft
components
circuit
locations
placement
Prior art date
Application number
PCT/IB2000/000856
Other languages
French (fr)
Other versions
WO2000067163A2 (en
Inventor
Zhen Cai
Original Assignee
Prosper Design Systems Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Prosper Design Systems Pte Ltd filed Critical Prosper Design Systems Pte Ltd
Priority to AU52417/00A priority Critical patent/AU5241700A/en
Publication of WO2000067163A2 publication Critical patent/WO2000067163A2/en
Publication of WO2000067163A3 publication Critical patent/WO2000067163A3/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/392—Floor-planning or layout, e.g. partitioning or placement

Abstract

Soft pine locations in a hybrid paradigm are optimized according to circuit density centers of circuit components couped to the soft pins. As a result, the soft pins are located closer to components with heavier loads and further from components with lighter loads. Circuit density centers are determined by summing coordinates weighted by circuit loads, including capacitance and resistance, and dividing the summed weighted coordinates by a sum of the weights. To avoid blockage, optimized soft pin locations can be moved to soft block boundaries relative to the optimized locations.
PCT/IB2000/000856 1999-05-04 2000-05-04 Placement-based pin optimization method and apparatus for computer-aided circuit design WO2000067163A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU52417/00A AU5241700A (en) 1999-05-04 2000-05-04 Placement-based pin optimization method and apparatus for computer-aided circuitdesign

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/305,802 1999-05-04
US09/305,802 US6298468B1 (en) 1999-05-04 1999-05-04 Placement-based pin optimization method and apparatus for computer-aided circuit design

Publications (2)

Publication Number Publication Date
WO2000067163A2 WO2000067163A2 (en) 2000-11-09
WO2000067163A3 true WO2000067163A3 (en) 2001-12-06

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2000/000856 WO2000067163A2 (en) 1999-05-04 2000-05-04 Placement-based pin optimization method and apparatus for computer-aided circuit design

Country Status (3)

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US (1) US6298468B1 (en)
AU (1) AU5241700A (en)
WO (1) WO2000067163A2 (en)

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WO2000067163A2 (en) 2000-11-09
AU5241700A (en) 2000-11-17
US6298468B1 (en) 2001-10-02

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