WO2001097277A9 - Procede d'encapsulation de pieces electroniques et une telle encapsulation - Google Patents

Procede d'encapsulation de pieces electroniques et une telle encapsulation

Info

Publication number
WO2001097277A9
WO2001097277A9 PCT/JP2001/005050 JP0105050W WO0197277A9 WO 2001097277 A9 WO2001097277 A9 WO 2001097277A9 JP 0105050 W JP0105050 W JP 0105050W WO 0197277 A9 WO0197277 A9 WO 0197277A9
Authority
WO
WIPO (PCT)
Prior art keywords
electronic parts
joining
packaging method
package
joining material
Prior art date
Application number
PCT/JP2001/005050
Other languages
English (en)
French (fr)
Other versions
WO2001097277A1 (fr
Inventor
Hidenobu Nishikawa
Kazuto Nishida
Kazumichi Shimizu
Shuuji Oono
Hiroyuki Otani
Original Assignee
Matsushita Electric Ind Co Ltd
Hidenobu Nishikawa
Kazuto Nishida
Kazumichi Shimizu
Shuuji Oono
Hiroyuki Otani
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2000181618A external-priority patent/JP4287987B2/ja
Priority claimed from JP2000326879A external-priority patent/JP4041649B2/ja
Application filed by Matsushita Electric Ind Co Ltd, Hidenobu Nishikawa, Kazuto Nishida, Kazumichi Shimizu, Shuuji Oono, Hiroyuki Otani filed Critical Matsushita Electric Ind Co Ltd
Priority to US10/311,476 priority Critical patent/US7355126B2/en
Publication of WO2001097277A1 publication Critical patent/WO2001097277A1/ja
Publication of WO2001097277A9 publication Critical patent/WO2001097277A9/ja

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Classifications

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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
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    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
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    • H01L2924/30—Technical effects
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    • H01L2924/3011—Impedance
PCT/JP2001/005050 2000-06-16 2001-06-14 Procede d'encapsulation de pieces electroniques et une telle encapsulation WO2001097277A1 (fr)

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JP2000181618A JP4287987B2 (ja) 2000-06-16 2000-06-16 電子部品の実装方法及び電子部品実装体
JP2000-326879 2000-10-26
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