WO2002099646A1 - Wear leveling of static areas in flash memory - Google Patents
Wear leveling of static areas in flash memory Download PDFInfo
- Publication number
- WO2002099646A1 WO2002099646A1 PCT/US2002/015238 US0215238W WO02099646A1 WO 2002099646 A1 WO2002099646 A1 WO 2002099646A1 US 0215238 W US0215238 W US 0215238W WO 02099646 A1 WO02099646 A1 WO 02099646A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- unit
- storage media
- flash storage
- erase
- flash
- Prior art date
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
- G06F2212/1036—Life time enhancement
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7211—Wear leveling
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
Definitions
- the present invention relates to a method for improving wear leveling of static areas in Flash Memory.
- Flash memory is non-volatile, able to store recorded data without a power source.
- Flash arrays suitable for acting as standard storage media in computer systems, i.e. as Flash disks.
- Flash memory technology A limitation of Flash memory technology is that the number of times a unit can be erased is inherently limited by the physics of the Flash cell. Repeated erasure of a unit wears out the cells in the unit leading to a reduced capability to distinguish between the erased state and the programmed state, resulting in a longer time to erase the unit, appearance of sporadic faults in programming or erasing data, and ultimately the unit may lose entirely the ability to be erased and reprogrammed.
- the effects of wear are statistical in nature, and the ability of a Flash device to withstand wear is described by Flash vendors by a number called the program/erase endurance. This number is the minimum or average number of times each Flash unit may be erased without encountering significant failures.
- Vendor endurance numbers currently range from tens of thousands to a million.
- the limited endurance limits the lifetime of a Flash disk. It would be advantageous to have a lifetime that is as long as possible, and this depends on the pattern of access to the Flash disk. Repeated and frequent writes to a single unit, or a small number of units will bring the onset of failures soon and so end the useful lifetime of the media quickly. On the other hand, if writes can be evenly distributed to all units of the media, each unit will experience close to the maximum number of erases it can endure, and so the onset of failures will be delayed as much as possible, maximizing the lifetime of the media.
- Flash disk managers take advantage of the fact that their algorithms typically give them discretion over the physical location where new data will be written, and they direct written data in ways designed to guarantee that different Flash units are subjected to the same number of erases. Such a procedure is known in the art as wear leveling. Some managers record the number of erases a unit has experienced in a register in that unit, and enforce a scheme that guarantees that the variation in the number of erases of each unit will not exceed some small constant. Others use a randomization of the choice of the target unit, and depend on statistics and the law of large numbers to maintain an even wear across the Flash media. An inherent problem for all such wear leveling methods, however, is static areas.
- Static areas are physical locations on the Flash device that contain data that never or seldom changes. Such data may consist of operating system code or application programs code, which are typically installed once and then never or very seldom change. In many usages of a Flash disk, such data occupies a major part of the Flash media. Since wear leveling methods exercise their control when choosing a location in which to write new data, they have no influence over the wear experienced by static areas. As these areas are never written to, no choice can be made. While active units of the Flash media may undergo effective wear leveling, the static units, the units of the static areas remain with very low wear. This can significantly reduce the lifetime of the entire Flash media, as for example if static areas span half the media, the effective lifetime is reduced by half.
- static areas present various difficulties such as: 1. Identifying static areas, including tracking patterns of usage of the Flash disk by units over long period of time, which is a difficult process requiring control structures and algorithms to support the bookkeeping.
- a counter tracks the number of times each block is erased.
- a programmable maximum value for the counter is also provided. As the number of erase cycles for a block becomes one less than the maximum, the block is erased one last time and written with another file having a then smallest number of erase cycles. It is also prevented from being erased thereafter by setting its erase inhibit flag. After all blocks approach this maximum, all the erase counters and inhibit flags are cleared and the second algorithm is then repeated. In this way, no block can be erased a substantial number of times more than any other block.
- this invention requires considerable system resources in order to maintain the elaborate monitoring and permissions structure.
- this invention also omits the crucial step of forcing "cleanup" on units that don't need cleanup, but are static.
- an improved method for affecting wear leveling in all units of a flash media is enabled by providing an algorithm that ensures that static areas do not in fact remain static, and that the static data within them is guaranteed to move to other physical locations, such that wear leveling is achieved.
- the present invention provides the following method:
- FIGURE is an illustration of the method of the present invention.
- the present invention relates to method for affecting wear leveling in flash media. This is enabled by providing an algorithm that ensures that static areas do not in fact • remain static, and that the static data within them is guaranteed to move to other physical locations, such that wear leveling is achieved, requiring a minimal usage of system resources.
- the present invention can be used to improve wear leveling of static blocks in Flash memory devices.
- the present invention provides solutions for wear leveling in static and non-static areas, such that wear leveling is achieved: without the need to recognize which areas are static. i. at very low performance penalty, ii. with effective wear leveling producing wear with small variation between units.
- the method is as follows, as can be seen in the figure:
- the wear leveling method 12 of the present invention launch the wear leveling method 12 of the present invention according to the subsequent steps. For example, this may be done once per 1000 unit erase operations as follows: a. By counting write or erase operations 10 and activating when the count is a multiple of a chosen number, such as 1000. b. By generating a random process 11 for each write or erase operation whose probability for success is a chosen probability, such as 1 in 1000, and subsequently activating the wear leveling method.
- step 3 already exists as part of the garbage collection algorithm (as is known in the art, as can be seen in the above referenced patents US 5,404,485, US 5,937,425 and US 5,341,339), so for those algorithms, the procedure above is another occasion for activating an existing procedure.
- step 3 can be any similar algorithm that has the effect of moving data away from the unit selected, or triggering this action.
- step 3 can be any similar algorithm that has the effect of moving data away from the unit selected, or triggering this action. For example, in a
- Flash manager that performs garbage collection for units in order of priority ranking, step
- 3 may consist of merely boosting the priority of the selected unit and so making it the likely candidate for the being moved next.
- Static data selected has a high probability to move to a formerly non-static area (free units almost always occur in non-static areas, the only exception to this occurring through the infrequent application of the current method). d. The fact that, on average, each unit experiences this selection several hundred times during the lifetime media means that statistically each physical unit is expected to share roles as static and non-static in a uniform ratio.
- the present invention provides a methodology for improving wear leveling for all units, including static units, in a Flash devices, with a substantial decrease in required system resources.
- This method is operable with the application of a simple algorithm, such that the execution of comprehensive wear leveling is transparent to the user, and negligibly impacts on system overhead.
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003502693A JP2004522230A (en) | 2001-06-01 | 2002-05-15 | Consumption leveling of static area in flash memory |
IL15518602A IL155186A0 (en) | 2001-06-01 | 2002-05-15 | Wear leveling of static areas in flash memory |
KR10-2003-7001529A KR20030020435A (en) | 2001-06-01 | 2002-05-15 | Wear leveling of static areas in flash memory |
TW091132086A TWI264007B (en) | 2001-06-01 | 2002-10-29 | Wear leveling of static areas in flash memory |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/870,315 US6732221B2 (en) | 2001-06-01 | 2001-06-01 | Wear leveling of static areas in flash memory |
US09/870,315 | 2001-06-01 |
Publications (1)
Publication Number | Publication Date |
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WO2002099646A1 true WO2002099646A1 (en) | 2002-12-12 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/US2002/015238 WO2002099646A1 (en) | 2001-06-01 | 2002-05-15 | Wear leveling of static areas in flash memory |
Country Status (6)
Country | Link |
---|---|
US (1) | US6732221B2 (en) |
JP (1) | JP2004522230A (en) |
KR (1) | KR20030020435A (en) |
IL (1) | IL155186A0 (en) |
TW (1) | TWI264007B (en) |
WO (1) | WO2002099646A1 (en) |
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KR20030020435A (en) | 2003-03-08 |
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