WO2003003147A3 - Method and system for chip design using remotely located resources - Google Patents

Method and system for chip design using remotely located resources Download PDF

Info

Publication number
WO2003003147A3
WO2003003147A3 PCT/US2002/018213 US0218213W WO03003147A3 WO 2003003147 A3 WO2003003147 A3 WO 2003003147A3 US 0218213 W US0218213 W US 0218213W WO 03003147 A3 WO03003147 A3 WO 03003147A3
Authority
WO
WIPO (PCT)
Prior art keywords
design
virtual core
design platform
core blocks
platform
Prior art date
Application number
PCT/US2002/018213
Other languages
French (fr)
Other versions
WO2003003147A2 (en
Inventor
Claudio Zizzo
Original Assignee
Cadence Design Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cadence Design Systems Inc filed Critical Cadence Design Systems Inc
Priority to JP2003509259A priority Critical patent/JP2004531835A/en
Priority to EP02734744A priority patent/EP1402425A4/en
Priority to AU2002305887A priority patent/AU2002305887A1/en
Publication of WO2003003147A2 publication Critical patent/WO2003003147A2/en
Publication of WO2003003147A3 publication Critical patent/WO2003003147A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2111/00—Details relating to CAD techniques
    • G06F2111/02—CAD in a network environment, e.g. collaborative CAD or distributed simulation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00—Details relating to the type of the circuit
    • G06F2115/08—Intellectual property [IP] blocks or IP cores

Abstract

A multi-faceted design platform (104) acts as a tool for front-end hardware IC designers who design complex core base System on Chip. The design platform (104) uses a network such as the Internet (230) to search and gain access to previously designed virtual core blocks. The design platform (104) provides a means to select (306) and transfer (308) all relevant information regarding the selected virtual core blocks and allows the designer to immediately incorporate the virtual core block into the new SoC design. The design platform (104) further generates the appropriate source code files (320) for immediate use with a plurality of known verification tools to verify both the integration and connectivity of the virtual core blocks as well as the basic functionalities of the SoC design.
PCT/US2002/018213 2001-06-08 2002-06-06 Method and system for chip design using remotely located resources WO2003003147A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2003509259A JP2004531835A (en) 2001-06-08 2002-06-06 Method and system for designing chips using remotely located resources
EP02734744A EP1402425A4 (en) 2001-06-08 2002-06-06 Method and system for chip design using remotely located resources
AU2002305887A AU2002305887A1 (en) 2001-06-08 2002-06-06 Method and system for chip design using remotely located resources

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/877,419 2001-06-08
US09/877,419 US6578174B2 (en) 2001-06-08 2001-06-08 Method and system for chip design using remotely located resources

Publications (2)

Publication Number Publication Date
WO2003003147A2 WO2003003147A2 (en) 2003-01-09
WO2003003147A3 true WO2003003147A3 (en) 2003-04-24

Family

ID=25369923

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/018213 WO2003003147A2 (en) 2001-06-08 2002-06-06 Method and system for chip design using remotely located resources

Country Status (6)

Country Link
US (1) US6578174B2 (en)
EP (1) EP1402425A4 (en)
JP (2) JP2004531835A (en)
CN (1) CN100489865C (en)
AU (1) AU2002305887A1 (en)
WO (1) WO2003003147A2 (en)

Families Citing this family (204)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7124376B2 (en) * 2000-05-02 2006-10-17 Palmchip Corporation Design tool for systems-on-a-chip
JP2002041126A (en) * 2000-07-27 2002-02-08 Toshiba Corp Method and system for producing semiconductor device
JP2002092070A (en) * 2000-09-20 2002-03-29 Sumitomo Rubber Ind Ltd Design supporting system
US8160864B1 (en) 2000-10-26 2012-04-17 Cypress Semiconductor Corporation In-circuit emulator and pod synchronized boot
US8149048B1 (en) 2000-10-26 2012-04-03 Cypress Semiconductor Corporation Apparatus and method for programmable power management in a programmable analog circuit block
US6724220B1 (en) 2000-10-26 2004-04-20 Cyress Semiconductor Corporation Programmable microcontroller architecture (mixed analog/digital)
US8103496B1 (en) 2000-10-26 2012-01-24 Cypress Semicondutor Corporation Breakpoint control in an in-circuit emulation system
US8176296B2 (en) 2000-10-26 2012-05-08 Cypress Semiconductor Corporation Programmable microcontroller architecture
US7765095B1 (en) 2000-10-26 2010-07-27 Cypress Semiconductor Corporation Conditional branching in an in-circuit emulation system
JP4118501B2 (en) * 2000-11-15 2008-07-16 株式会社ルネサステクノロジ System verification device
JP2002157295A (en) * 2000-11-21 2002-05-31 Nec Microsystems Ltd Device and method for designing semiconductor circuit
US6694494B2 (en) * 2001-03-16 2004-02-17 Daro Semiconductors Ltd. Method of designing a multi-module single-chip circuit system
US7814020B2 (en) * 2001-04-12 2010-10-12 Nvidia International, Inc. System, method and computer program product for the recording and playback of transaction macros
US20030009730A1 (en) * 2001-06-16 2003-01-09 Chen Michael Y. Enhanced platform based SOC design including exended peripheral selection and automated IP customization facilitation
US20030005396A1 (en) * 2001-06-16 2003-01-02 Chen Michael Y. Phase and generator based SOC design and/or verification
US6757882B2 (en) * 2001-06-16 2004-06-29 Michael Y. Chen Self-describing IP package for enhanced platform based SOC design
JP2003022378A (en) * 2001-07-06 2003-01-24 Mitsubishi Electric Corp System for distributing semiconductor design assets
US7039892B2 (en) * 2001-07-24 2006-05-02 Hewlett-Packard Development Company, L.P. Systems and methods for ensuring correct connectivity between circuit designs
JP5318308B2 (en) * 2001-08-16 2013-10-16 ゲットナー・ファンデーション・エルエルシー Semiconductor substrate production system
EP1286279A1 (en) * 2001-08-21 2003-02-26 Alcatel Configuration tool
US7185286B2 (en) * 2001-08-28 2007-02-27 Nvidia International, Inc. Interface for mobilizing content and transactions on multiple classes of devices
US7020716B2 (en) * 2001-08-31 2006-03-28 Adaptec, Inc. Method and system for verifying the hardware implementation of TCP/IP
US20030050967A1 (en) * 2001-09-11 2003-03-13 Bentley William F. Apparatus and method for optimal selection of IP modules for design integration
US6714828B2 (en) * 2001-09-17 2004-03-30 Formfactor, Inc. Method and system for designing a probe card
US6781407B2 (en) 2002-01-09 2004-08-24 Xilinx, Inc. FPGA and embedded circuitry initialization and processing
US7420392B2 (en) * 2001-09-28 2008-09-02 Xilinx, Inc. Programmable gate array and embedded circuitry initialization and processing
US7559032B2 (en) * 2001-10-12 2009-07-07 National Instruments Corporation System and method for enabling a graphical program to respond to user interface events
US6931606B1 (en) * 2001-10-15 2005-08-16 Lsi Logic Corporation Automatic method and system for instantiating built-in-test (BIST) modules in ASIC memory designs
US7406674B1 (en) 2001-10-24 2008-07-29 Cypress Semiconductor Corporation Method and apparatus for generating microcontroller configuration information
US20030093494A1 (en) * 2001-10-31 2003-05-15 Ilia Zverev Interactive application note and method of supporting electronic components within a virtual support system
US8078970B1 (en) 2001-11-09 2011-12-13 Cypress Semiconductor Corporation Graphical user interface with user-selectable list-box
US7464016B2 (en) * 2001-11-09 2008-12-09 Sun Microsystems, Inc. Hot plug and hot pull system simulation
US7013442B2 (en) * 2001-11-13 2006-03-14 Roberto Suaya Synthesis strategies based on the appropriate use of inductance effects
US8042093B1 (en) 2001-11-15 2011-10-18 Cypress Semiconductor Corporation System providing automatic source code generation for personalization and parameterization of user modules
US7774190B1 (en) 2001-11-19 2010-08-10 Cypress Semiconductor Corporation Sleep and stall in an in-circuit emulation system
US6966039B1 (en) * 2001-11-19 2005-11-15 Cypress Semiconductor Corp. Method for facilitating microcontroller programming
US7770113B1 (en) 2001-11-19 2010-08-03 Cypress Semiconductor Corporation System and method for dynamically generating a configuration datasheet
US7844437B1 (en) 2001-11-19 2010-11-30 Cypress Semiconductor Corporation System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit
US6971004B1 (en) 2001-11-19 2005-11-29 Cypress Semiconductor Corp. System and method of dynamically reconfiguring a programmable integrated circuit
US8069405B1 (en) * 2001-11-19 2011-11-29 Cypress Semiconductor Corporation User interface for efficiently browsing an electronic document using data-driven tabs
US7010773B1 (en) 2001-11-19 2006-03-07 Cypress Semiconductor Corp. Method for designing a circuit for programmable microcontrollers
EP1318463A1 (en) * 2001-12-05 2003-06-11 Design and Reuse Electronic virtual components description import in intranet catalogs
US6698003B2 (en) * 2001-12-06 2004-02-24 International Business Machines Corporation Framework for multiple-engine based verification tools for integrated circuits
EP1451732A4 (en) * 2001-12-10 2007-08-08 Mentor Graphics Corp Parallel electronic design automation: shared simultaneous editing
US7516435B2 (en) * 2001-12-10 2009-04-07 Mentor Graphics Corporation Reservation of design elements in a parallel printed circuit board design environment
US7587695B2 (en) 2001-12-10 2009-09-08 Mentor Graphics Corporation Protection boundaries in a parallel printed circuit board design environment
US7146579B2 (en) * 2001-12-13 2006-12-05 Visteon Global Technologies, Inc. VRML interface software for image and data compilation
US6889366B2 (en) * 2001-12-27 2005-05-03 Lsi Logic Corporation System and method for coevolutionary circuit design
JP3939550B2 (en) * 2001-12-28 2007-07-04 株式会社リコー Object consistency management method and system
WO2003063044A2 (en) * 2002-01-23 2003-07-31 Intellitech Corporation Management system, method and apparatus for licensed delivery and accounting of electronic circuits
US20030145300A1 (en) * 2002-01-28 2003-07-31 Tran Trung M. Layout tracking solutions
US6820248B1 (en) 2002-02-14 2004-11-16 Xilinx, Inc. Method and apparatus for routing interconnects to devices with dissimilar pitches
US6941538B2 (en) * 2002-02-22 2005-09-06 Xilinx, Inc. Method and system for integrating cores in FPGA-based system-on-chip (SoC)
US6754882B1 (en) * 2002-02-22 2004-06-22 Xilinx, Inc. Method and system for creating a customized support package for an FPGA-based system-on-chip (SoC)
US6976160B1 (en) 2002-02-22 2005-12-13 Xilinx, Inc. Method and system for controlling default values of flip-flops in PGA/ASIC-based designs
JP4898090B2 (en) * 2002-02-22 2012-03-14 フレックストロニクス インターナショナル ユーエスエー，インコーポレーテッド System and method for design, procurement and manufacturing collaboration
US6934922B1 (en) 2002-02-27 2005-08-23 Xilinx, Inc. Timing performance analysis
US6839874B1 (en) 2002-02-28 2005-01-04 Xilinx, Inc. Method and apparatus for testing an embedded device
US7111217B1 (en) 2002-02-28 2006-09-19 Xilinx, Inc. Method and system for flexibly nesting JTAG TAP controllers for FPGA-based system-on-chip (SoC)
US7111220B1 (en) 2002-03-01 2006-09-19 Xilinx, Inc. Network physical layer with embedded multi-standard CRC generator
US7088767B1 (en) 2002-03-01 2006-08-08 Xilinx, Inc. Method and apparatus for operating a transceiver in different data rates
US7187709B1 (en) 2002-03-01 2007-03-06 Xilinx, Inc. High speed configurable transceiver architecture
US6961919B1 (en) 2002-03-04 2005-11-01 Xilinx, Inc. Method of designing integrated circuit having both configurable and fixed logic circuitry
JP4440515B2 (en) * 2002-03-20 2010-03-24 富士通マイクロエレクトロニクス株式会社 LSI development apparatus and LSI development system
US20030188278A1 (en) * 2002-03-26 2003-10-02 Carrie Susan Elizabeth Method and apparatus for accelerating digital logic simulations
US8103497B1 (en) 2002-03-28 2012-01-24 Cypress Semiconductor Corporation External interface for event architecture
US20060253480A1 (en) * 2002-04-06 2006-11-09 Staples Peter E Collaborative design process for a design team, outside suppliers, and outside manufacturers
US20030191656A1 (en) * 2002-04-06 2003-10-09 Staples Peter Ethan Management of collaborative design process
US7100139B1 (en) * 2002-04-08 2006-08-29 Cypress Semiconductor Corporation Pinout views for allowed connections in GUI
US7308608B1 (en) 2002-05-01 2007-12-11 Cypress Semiconductor Corporation Reconfigurable testing system and method
JP4063585B2 (en) * 2002-05-20 2008-03-19 富士通株式会社 BWB transmission wiring design system
US6973405B1 (en) 2002-05-22 2005-12-06 Xilinx, Inc. Programmable interactive verification agent
US7712056B2 (en) * 2002-06-07 2010-05-04 Cadence Design Systems, Inc. Characterization and verification for integrated circuit designs
EP1532670A4 (en) * 2002-06-07 2007-09-12 Praesagus Inc Characterization adn reduction of variation for integrated circuits
US7853904B2 (en) * 2002-06-07 2010-12-14 Cadence Design Systems, Inc. Method and system for handling process related variations for integrated circuits based upon reflections
US7363099B2 (en) * 2002-06-07 2008-04-22 Cadence Design Systems, Inc. Integrated circuit metrology
US20030229612A1 (en) * 2002-06-10 2003-12-11 Keller S. Brandon Circuit design duplication system
US6661724B1 (en) 2002-06-13 2003-12-09 Cypress Semiconductor Corporation Method and system for programming a memory device
US6772405B1 (en) 2002-06-13 2004-08-03 Xilinx, Inc. Insertable block tile for interconnecting to a device embedded in an integrated circuit
US7085973B1 (en) 2002-07-09 2006-08-01 Xilinx, Inc. Testing address lines of a memory controller
FR2843200B1 (en) * 2002-07-30 2004-12-10 Bull Sa METHOD AND SYSTEM FOR AUTOMATICALLY RECOGNIZING CONFIGURATIONS OF SIMULATIONS OF AN INTEGRATED CIRCUIT
JP2004094364A (en) * 2002-08-29 2004-03-25 Renesas Technology Corp Semiconductor intellectual property delivery system
US7761845B1 (en) 2002-09-09 2010-07-20 Cypress Semiconductor Corporation Method for parameterizing a user module
US7092865B1 (en) 2002-09-10 2006-08-15 Xilinx, Inc. Method and apparatus for timing modeling
JP2004128228A (en) * 2002-10-02 2004-04-22 Sanyo Electric Co Ltd Method of manufacturing circuit device
JP2004128227A (en) * 2002-10-02 2004-04-22 Sanyo Electric Co Ltd Circuit device providing system and server computer
US20040100900A1 (en) * 2002-11-25 2004-05-27 Fulcrum Microsystems, Inc. Message transfer system
US7055113B2 (en) * 2002-12-31 2006-05-30 Lsi Logic Corporation Simplified process to design integrated circuits
US7194705B1 (en) * 2003-03-14 2007-03-20 Xilinx, Inc. Simulation of integrated circuitry within a high-level modeling system using hardware description language circuit descriptions
DE10313869A1 (en) * 2003-03-21 2004-10-07 Siemens Ag Low voltage power plant design method for designing a low voltage power supply in which design criteria are supplied via an XML file so that violations of design rules can be checked for
US6925614B2 (en) * 2003-04-01 2005-08-02 Taiwan Semiconductor Manufacturing Company, Ltd. System and method for protecting and integrating silicon intellectual property (IP) in an integrated circuit (IC)
JP2005011055A (en) * 2003-06-19 2005-01-13 Hitachi Ltd Electronic form designing and managing method and device, processing program and recording medium
US7454323B1 (en) * 2003-08-22 2008-11-18 Altera Corporation Method for creation of secure simulation models
US7212882B2 (en) * 2003-08-28 2007-05-01 The Boeing Company Tooling data structure
US7580769B2 (en) * 2003-08-28 2009-08-25 The Boeing Company Tool operator instructions system and method
US7461371B2 (en) * 2003-09-11 2008-12-02 Taiwan Semiconductor Manufacturing Company, Ltd. General purpose memory compiler system and associated methods
US7421014B2 (en) * 2003-09-11 2008-09-02 Xilinx, Inc. Channel bonding of a plurality of multi-gigabit transceivers
US20060259978A1 (en) * 2003-09-26 2006-11-16 Pikus Fedor G Secure exchange of information in electronic design automation with license-related key generation
US7222312B2 (en) * 2003-09-26 2007-05-22 Ferguson John G Secure exchange of information in electronic design automation
US7353468B2 (en) * 2003-09-26 2008-04-01 Ferguson John G Secure exchange of information in electronic design automation
US8161438B2 (en) 2003-10-21 2012-04-17 Mentor Graphics Corporation Determining mutual inductance between intentional inductors
US7496871B2 (en) 2003-10-21 2009-02-24 Roberto Suaya Mutual inductance extraction using dipole approximations
US20050096935A1 (en) * 2003-11-03 2005-05-05 Data I/O Corporation Remote development support system and method
US7590963B2 (en) * 2003-11-21 2009-09-15 Mentor Graphics Corporation Integrating multiple electronic design applications
US7305648B2 (en) 2003-11-21 2007-12-04 Mentor Graphics Corporation Distributed autorouting of conductive paths in printed circuit boards
US7269803B2 (en) * 2003-12-18 2007-09-11 Lsi Corporation System and method for mapping logical components to physical locations in an integrated circuit design environment
US7188329B2 (en) * 2004-02-13 2007-03-06 Inventec Corporation Computer-assisted electronic component schematic linking method
US7093218B2 (en) * 2004-02-19 2006-08-15 International Business Machines Corporation Incremental, assertion-based design verification
US20050188334A1 (en) * 2004-02-24 2005-08-25 Shah Gaurav R. Circuit design interface
US7295049B1 (en) 2004-03-25 2007-11-13 Cypress Semiconductor Corporation Method and circuit for rapid alignment of signals
US7620743B2 (en) * 2004-04-01 2009-11-17 Lsi Corporation System and method for implementing multiple instantiated configurable peripherals in a circuit design
US20050229143A1 (en) * 2004-04-01 2005-10-13 Lsi Logic Corporation System and method for implementing multiple instantiated configurable peripherals in a circuit design
US7003362B2 (en) * 2004-05-11 2006-02-21 Taiwan Semiconductor Manufacturing Company, Ltd. System and method for customized tape-out requests for integrated circuit manufacturing
US7325220B1 (en) * 2004-06-23 2008-01-29 Altera Corporation Techniques for automatically recommending a suitable programmable IC for a circuit design
US20060004638A1 (en) * 2004-07-02 2006-01-05 Royal Eliza H Assisted electronic product design
US8286125B2 (en) * 2004-08-13 2012-10-09 Cypress Semiconductor Corporation Model for a hardware device-independent method of defining embedded firmware for programmable systems
US8069436B2 (en) 2004-08-13 2011-11-29 Cypress Semiconductor Corporation Providing hardware independence to automate code generation of processing device firmware
US20060101368A1 (en) * 2004-09-08 2006-05-11 Mentor Graphics Corporation Distributed electronic design automation environment
US7546571B2 (en) * 2004-09-08 2009-06-09 Mentor Graphics Corporation Distributed electronic design automation environment
KR100631202B1 (en) * 2005-01-11 2006-10-04 삼성전자주식회사 SoC using CDMA bus and method for data transmission thereof
US20060190111A1 (en) * 2005-02-03 2006-08-24 Wang Beniz System and method of designing a product or a module therein based on experiences of modular designs accumulated previously
US7332976B1 (en) 2005-02-04 2008-02-19 Cypress Semiconductor Corporation Poly-phase frequency synthesis oscillator
US7437321B2 (en) * 2005-02-16 2008-10-14 Vista Print Technologies Limited Product design system and method
US7315991B1 (en) * 2005-02-23 2008-01-01 Xilinx, Inc. Compiling HLL into massively pipelined systems
US7383526B2 (en) * 2005-03-23 2008-06-03 Inventec Corporation Cost-optimization method
US8428761B2 (en) * 2005-03-31 2013-04-23 Semiconductor Energy Laboratory Co., Ltd. Production system and production method
EP1715434A1 (en) * 2005-04-22 2006-10-25 Kuei-Ann Wen Circuit design platform
US7400183B1 (en) 2005-05-05 2008-07-15 Cypress Semiconductor Corporation Voltage controlled oscillator delay cell and method
US8089461B2 (en) 2005-06-23 2012-01-03 Cypress Semiconductor Corporation Touch wake for electronic devices
US7469398B2 (en) * 2005-08-16 2008-12-23 Lsi Corporation IP placement validation
US20070050268A1 (en) * 2005-08-24 2007-03-01 Han Charles S Matching CAD objects with relevant manufacturer-and supplier-supplied content leveraging pay-for-placement search engine technology
US8326926B2 (en) * 2005-09-13 2012-12-04 Mentor Graphics Corporation Distributed electronic design automation architecture
US8085067B1 (en) 2005-12-21 2011-12-27 Cypress Semiconductor Corporation Differential-to-single ended signal converter circuit and method
US8067948B2 (en) 2006-03-27 2011-11-29 Cypress Semiconductor Corporation Input/output multiplexer bus
US20090222927A1 (en) * 2006-04-30 2009-09-03 Pikus Fedor G Concealment of Information in Electronic Design Automation
JP2007310565A (en) * 2006-05-17 2007-11-29 Toshiba Corp System lsi verification device and system lsi verification program
US20080005041A1 (en) * 2006-05-30 2008-01-03 Ones And Zeros Technologies, Inc. Method and apparatus for compensating electronics designers
JP2008020960A (en) * 2006-07-10 2008-01-31 National Applied Research Lab National Chip Implementation Center MP-SoC PLATFORM AND METHOD FOR DESIGNING THE SAME
US8060851B2 (en) * 2006-10-13 2011-11-15 Verigy (Singapore) Pte. Ltd. Method for operating a secure semiconductor IP server to support failure analysis
US7941770B2 (en) * 2007-01-25 2011-05-10 Taiwan Semiconductor Manufacturing Company, Ltd. System and method for implementing an online design platform for integrated circuits
US20080222581A1 (en) * 2007-03-09 2008-09-11 Mips Technologies, Inc. Remote Interface for Managing the Design and Configuration of an Integrated Circuit Semiconductor Design
US20080244501A1 (en) * 2007-04-02 2008-10-02 International Business Machines Corporation Method for reading information from a hierarchical design
US8516025B2 (en) 2007-04-17 2013-08-20 Cypress Semiconductor Corporation Clock driven dynamic datapath chaining
US8092083B2 (en) * 2007-04-17 2012-01-10 Cypress Semiconductor Corporation Temperature sensor with digital bandgap
US7737724B2 (en) 2007-04-17 2010-06-15 Cypress Semiconductor Corporation Universal digital block interconnection and channel routing
US8026739B2 (en) 2007-04-17 2011-09-27 Cypress Semiconductor Corporation System level interconnect with programmable switching
US8130025B2 (en) 2007-04-17 2012-03-06 Cypress Semiconductor Corporation Numerical band gap
US8040266B2 (en) * 2007-04-17 2011-10-18 Cypress Semiconductor Corporation Programmable sigma-delta analog-to-digital converter
US9564902B2 (en) 2007-04-17 2017-02-07 Cypress Semiconductor Corporation Dynamically configurable and re-configurable data path
US9720805B1 (en) 2007-04-25 2017-08-01 Cypress Semiconductor Corporation System and method for controlling a target device
US8266575B1 (en) 2007-04-25 2012-09-11 Cypress Semiconductor Corporation Systems and methods for dynamically reconfiguring a programmable system on a chip
US8065653B1 (en) 2007-04-25 2011-11-22 Cypress Semiconductor Corporation Configuration of programmable IC design elements
US8049569B1 (en) 2007-09-05 2011-11-01 Cypress Semiconductor Corporation Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes
US7882473B2 (en) 2007-11-27 2011-02-01 International Business Machines Corporation Sequential equivalence checking for asynchronous verification
US7788623B1 (en) 2007-11-29 2010-08-31 Lattice Semiconductor Corporation Composite wire indexing for programmable logic devices
US9087164B2 (en) * 2008-01-26 2015-07-21 National Semiconductor Corporation Visualization of tradeoffs between circuit designs
US7966588B1 (en) 2008-01-26 2011-06-21 National Semiconductor Corporation Optimization of electrical circuits
US8209647B1 (en) 2008-02-20 2012-06-26 Cadence Design Systems, Inc. Extensible verification system
US7979835B1 (en) 2008-03-03 2011-07-12 Xilinx, Inc. Method of estimating resource requirements for a circuit design
US9117046B1 (en) 2008-03-03 2015-08-25 Xilinx, Inc. Method of generating data for estimating resource requirements for a circuit design
US7984412B1 (en) * 2008-03-03 2011-07-19 Xilinx, Inc. IC design estimation using mid-level elements of IP cores
WO2009114483A1 (en) * 2008-03-08 2009-09-17 Mentor Graphics Corporation High-frequency vlsi interconnect and intentional inductor impedance extraction in the presence of a multi-layer conductive substrate
US8010215B2 (en) * 2008-03-11 2011-08-30 International Business Machines Corporation Structure for selecting processors for job scheduling using measured power consumption
US7890913B1 (en) 2008-03-25 2011-02-15 Lattice Semiconductor Corporation Wire mapping for programmable logic devices
GR1006530B (en) * 2008-05-28 2009-09-10 Ερευνα Και Τεχνολογια Θινκ Σιλικον Ε.Π.Ε.-Think Silicon Ltd. Method for twe automated receiving of parameters of sub-systems of micro-electronic circuits for use in integrated circuits.
US8032338B2 (en) * 2008-06-13 2011-10-04 Power Integrations, Inc. Method and apparatus for design of a power supply
US8156453B1 (en) * 2008-10-16 2012-04-10 Cadence Design Systems, Inc. Method and system identifying and locating IP blocks and block suppliers for an electronic design
US9448964B2 (en) 2009-05-04 2016-09-20 Cypress Semiconductor Corporation Autonomous control in a programmable system
US8316341B2 (en) * 2009-09-17 2012-11-20 Emerson Network Power—Embedded Computing, Inc. Hardware description language (HDL) generation systems and methods for custom circuit boards
US8037369B2 (en) * 2009-12-21 2011-10-11 National Instruments Corporation Error handling structure for use in a graphical program
US8032846B1 (en) 2010-03-30 2011-10-04 Synopsys, Inc. Efficient provisioning of resources in public infrastructure for electronic design automation (EDA) tasks
US8479129B1 (en) * 2010-05-21 2013-07-02 Marvell International Ltd. Dynamic time domain randomization techniques for SOC and IP verification
US8521483B1 (en) 2010-06-02 2013-08-27 Cadence Design Systems, Inc. Method and apparatus for concurrent design of modules across different design entry tools targeted to single simulation
US8316342B1 (en) * 2010-06-02 2012-11-20 Cadence Design Systems, Inc. Method and apparatus for concurrent design of modules across different design entry tools targeted to a single layout
US8516433B1 (en) 2010-06-25 2013-08-20 Cadence Design Systems, Inc. Method and system for mapping memory when selecting an electronic product
US8375344B1 (en) * 2010-06-25 2013-02-12 Cadence Design Systems, Inc. Method and system for determining configurations
US8495531B1 (en) * 2011-09-01 2013-07-23 Cadence Design Systems, Inc. Method and system for providing an architecture for selecting and using components for an electronic design
US20140040848A1 (en) * 2012-02-14 2014-02-06 Mentor Graphics Corporation Controllable Turn-Around Time For Post Tape-Out Flow
US10089429B2 (en) 2013-12-31 2018-10-02 Altium Llc Method and system for verifying printed circuit board designs, and creating or verifying related electronic component placement data for printed circuit board fabrication and assembly
US9584129B1 (en) * 2014-06-20 2017-02-28 Altera Corporation Integrated circuit applications using partial reconfiguration
CN104092552A (en) * 2014-07-06 2014-10-08 中山大学深圳研究院 SOC system based on Internet
US20170124246A1 (en) * 2014-07-30 2017-05-04 Hewlett Packard Enterprise Development Lp System and method for designing a printed circuit board
CN105447212A (en) * 2014-08-25 2016-03-30 联发科技（新加坡）私人有限公司 Method for generating verification platform file of integrated circuit and compiling system
US10726162B2 (en) * 2014-12-19 2020-07-28 Intel Corporation Security plugin for a system-on-a-chip platform
US9727679B2 (en) * 2014-12-20 2017-08-08 Intel Corporation System on chip configuration metadata
US20160179161A1 (en) * 2014-12-22 2016-06-23 Robert P. Adler Decode information library
US9477807B1 (en) * 2015-06-11 2016-10-25 International Business Machines Corporation Automating system on a chip customized design integration, specification, and verification through a single, integrated service
US10108764B2 (en) * 2016-04-15 2018-10-23 Taiwan Semiconductor Manufacturing Company, Ltd. Power consumption estimation method for system on chip (SOC), system for implementing the method
CN106020603A (en) * 2016-05-17 2016-10-12 内江师范学院 Computer desktop icon management system
US10255399B2 (en) 2016-10-31 2019-04-09 Intel Corporation Method, apparatus and system for automatically performing end-to-end channel mapping for an interconnect
US10387682B2 (en) 2017-06-08 2019-08-20 International Business Machines Corporation Parallel access to running electronic design automation (EDA) application
US10592704B2 (en) 2017-07-05 2020-03-17 Brookshire Software, LLC System and method for electronic automated printed circuit design
US20190146847A1 (en) * 2017-11-10 2019-05-16 Mentor Graphics Corporation Dynamic distributed resource management
CN108763513A (en) * 2018-05-30 2018-11-06 郑州云海信息技术有限公司 A kind of PCB folds structure database and design method
US10771982B2 (en) 2018-10-24 2020-09-08 Mentor Graphics Corporation Resource utilization of heterogeneous compute units in electronic design automation
US10831939B2 (en) * 2018-12-11 2020-11-10 International Business Machines Corporation Printed circuit board design
US10783291B2 (en) * 2019-01-04 2020-09-22 Mentor Graphics Corporation Hybrid performance of electronic design automation (EDA) procedures with delayed acquisition of remote resources
US20200257736A1 (en) * 2019-02-13 2020-08-13 Dell Products L.P. Hybrid Datacenter for Dynamic Delta Documentation
KR102038092B1 (en) * 2019-03-19 2019-10-29 김현 Apparatus and Method for automatic generation of Electric Design Drawings
CN110913274B (en) * 2019-11-29 2021-08-27 四川长虹电器股份有限公司 Compatible method for relevant functions of television main chip
CN112100949A (en) * 2020-09-15 2020-12-18 北京士昌鼎科技有限公司 Automatic development method and device of integrated circuit chip and electronic equipment
CN113033127A (en) * 2020-11-20 2021-06-25 上海爱思尔教育科技有限公司 Enterprise IC design method and development platform based on EEBox
CN114330200B (en) * 2022-03-15 2022-05-20 北京云枢创新软件技术有限公司 Data processing system for very large scale circuit design partitioning
CN115993952B (en) * 2023-03-23 2023-05-30 中大智能科技股份有限公司 RISC-V-based bridge support monitoring chip and design system and method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6102961A (en) * 1998-05-29 2000-08-15 Cadence Design Systems, Inc. Method and apparatus for selecting IP Blocks
WO2001065422A2 (en) * 2000-02-28 2001-09-07 Cadence Design Systems, Inc. Method and system for facilitating electronic circuit and chip design using remotely located resources

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5164911A (en) 1989-12-15 1992-11-17 Hewlett-Packard Company Schematic capture method having different model couplers for model types for changing the definition of the schematic based upon model type selection
US5572437A (en) * 1990-04-06 1996-11-05 Lsi Logic Corporation Method and system for creating and verifying structural logic model of electronic design from behavioral description, including generation of logic and timing models
US5838583A (en) * 1996-04-12 1998-11-17 Cadence Design Systems, Inc. Optimized placement and routing of datapaths
JPH1021274A (en) * 1996-06-28 1998-01-23 Mitsubishi Electric Corp Logic verification device for semiconductor circuit
US5862223A (en) 1996-07-24 1999-01-19 Walker Asset Management Limited Partnership Method and apparatus for a cryptographically-assisted commercial network system designed to facilitate and support expert-based commerce
US5878408A (en) 1996-12-06 1999-03-02 International Business Machines Corporation Data management system and process
US6058426A (en) * 1997-07-14 2000-05-02 International Business Machines Corporation System and method for automatically managing computing resources in a distributed computing environment
GB2329490B (en) * 1997-09-19 2002-06-05 Ibm Remote application design
JPH11224284A (en) * 1998-02-09 1999-08-17 Fujitsu Ltd Distribution system and device for semiconductor design resources and medium for storing software for distribution device
EP0944002A1 (en) 1998-03-18 1999-09-22 SONY EUROPE GmbH User profile substystem
BR9914200A (en) 1998-09-30 2002-01-22 Cadence Design Systems Inc Methods for designing a circuit system, for expanding an existing methodology for assessing the feasibility of a circuit design, for performing a feasibility assessment for a circuit design, for refining a first decision rule for a circuit design, to form a second decision rule for a circuit design, for organizing a designer's experience data for a plurality of pre-designed circuit blocks, for increasing glue logic distribution efficiency and for distributing a plurality of logic elements of glue between design blocks and distribute glue logic for execution in an integrated circuit device design scheme, to convert a circuit block-specific interface, to select a circuit collector, to design a device that incorporates the enable a device test to verify the correct operation of a and to develop a behavioral test bench, collar interface and interface system
US6634008B1 (en) * 1999-06-20 2003-10-14 Fujitsu Limited Methodology server based integrated circuit design
WO2001042969A2 (en) * 1999-12-03 2001-06-14 Synchronicity, Software, Inc. Ip library management system
US6851094B1 (en) 2000-02-28 2005-02-01 Cadence Design Systems, Inc. Automated method and system for selecting and procuring electronic components used in circuit and chip designs

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6102961A (en) * 1998-05-29 2000-08-15 Cadence Design Systems, Inc. Method and apparatus for selecting IP Blocks
WO2001065422A2 (en) * 2000-02-28 2001-09-07 Cadence Design Systems, Inc. Method and system for facilitating electronic circuit and chip design using remotely located resources

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
See also references of EP1402425A4 *
WILSEY PHILIP A.: "Web-based analysis and distributed IP", PROCEEDINGS OF THE 1999 WINTER SIMULATION CONFERENCE, December 1999 (1999-12-01), pages 1445 - 1453, XP010368096 *

Also Published As

Publication number Publication date
JP2004531835A (en) 2004-10-14
US20020188910A1 (en) 2002-12-12
WO2003003147A2 (en) 2003-01-09
EP1402425A2 (en) 2004-03-31
EP1402425A4 (en) 2007-08-22
US6578174B2 (en) 2003-06-10
AU2002305887A1 (en) 2003-03-03
CN100489865C (en) 2009-05-20
JP2009104645A (en) 2009-05-14
CN1735891A (en) 2006-02-15

Similar Documents

Publication Publication Date Title
WO2003003147A3 (en) Method and system for chip design using remotely located resources
CN101620644B (en) Integrated circuit design in optical shrink technology node
GB2400953A (en) Method for designing a well completion
WO2003012696A8 (en) Method and apparatus for analyzing manufacturing data
WO2001065422A3 (en) Method and system for facilitating electronic circuit and chip design using remotely located resources
HK1104101A1 (en) Systems, methods, interfaces and software for automated collection and integration of entity data into online databases and professional directories
WO2002075611A3 (en) Block based design methodology with programmable components
WO2002061613A3 (en) Database system and query optimiser
WO2007022352A3 (en) Method and system for integrated asset management utilizing multi-level modeling of oil field assets
WO2002065331A3 (en) Information retrieval system and method employing spatially selective features
GB0218132D0 (en) System and method for providing place and price protection in a search result list generated by a computer network search engine
WO2003077067A3 (en) Investable hedge fund index fund
EP1367509A3 (en) Method and apparatus for categorizing and presenting documents of a distributed database
EP1063599A3 (en) System and method for integrated circuit design
WO2005006147A3 (en) Method and apparatus for providing access to personal information
WO2003012594A3 (en) System and method for providing financial planning and advice
WO2004017228A3 (en) Software-type platform dedicated to internet site referencing
WO2005052793A3 (en) Automatic computer code review tool
WO2005017773A3 (en) Search result based automatic query reformulation
WO2002101601A3 (en) Representing the design of a sub-module in a hierarchical integrated circuit design and analysis system
WO2004061724A8 (en) Asic clock floor planning method and structure
EP1385098A3 (en) Simulation of data types in a relational database
WO2002033571A3 (en) Method of operating a plurality of electronic databases
KR101140319B9 (en) Method on Providing Ranking Information on Service Company Using Electronic Map
EP1424639A3 (en) Data distribution method, data search method and data search system

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ OM PH PL PT RO RU SD SE SG SI SK SL TJ TM TN TR TT TZ UA UG UZ VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
WWE Wipo information: entry into national phase

Ref document number: 2003509259

Country of ref document: JP

Ref document number: 028114728

Country of ref document: CN

WWE Wipo information: entry into national phase

Ref document number: 2002734744

Country of ref document: EP

WWP Wipo information: published in national office

Ref document number: 2002734744

Country of ref document: EP

REG Reference to national code

Ref country code: DE

Ref legal event code: 8642

ENP Entry into the national phase

Ref document number: 2004112762

Country of ref document: RU

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: 2004114236

Country of ref document: RU

Kind code of ref document: A