WO2003017112A3 - Circuit and method for interfacing to a bus channel - Google Patents

Circuit and method for interfacing to a bus channel Download PDF

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Publication number
WO2003017112A3
WO2003017112A3 PCT/US2002/024005 US0224005W WO03017112A3 WO 2003017112 A3 WO2003017112 A3 WO 2003017112A3 US 0224005 W US0224005 W US 0224005W WO 03017112 A3 WO03017112 A3 WO 03017112A3
Authority
WO
WIPO (PCT)
Prior art keywords
voltage
external
pad
reference voltage
output
Prior art date
Application number
PCT/US2002/024005
Other languages
French (fr)
Other versions
WO2003017112A2 (en
Inventor
Huy Nguyen
Roxanne Vu
Benedict Lau
Original Assignee
Rambus Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rambus Inc filed Critical Rambus Inc
Priority to AU2002324553A priority Critical patent/AU2002324553A1/en
Publication of WO2003017112A2 publication Critical patent/WO2003017112A2/en
Publication of WO2003017112A3 publication Critical patent/WO2003017112A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4086—Bus impedance matching, e.g. termination

Abstract

A circuit and method for interfacing to a bus via an on-die termination pad are shown. The present invention derives an output low reference voltage from an external terminating voltage and an external reference voltage corresponding to the middle of a logic voltage range. A feedback loop is used to compare a voltage at the pad to the output low reference voltage. An on-die termination current sourced to the pad is adjusted accordingly. This allows the present invention to adapt to a variety of external termination voltages. Further, the output low reference voltage is utilized to generate a reference current sourced to an output amplifier, which causes the output swing of the amplifier to track along with the external terminating voltage and the external reference voltage. In another aspect of the present invention, an alternating pattern of logic high and logic low voltage values is transmitted at the pad and received. The received data pattern is compared to the transmitted data pattern to adjust the on-die termination current and the reference current.
PCT/US2002/024005 2001-08-15 2002-07-30 Circuit and method for interfacing to a bus channel WO2003017112A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2002324553A AU2002324553A1 (en) 2001-08-15 2002-07-30 Circuit and method for interfacing to a bus channel

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/930,694 US6806728B2 (en) 2001-08-15 2001-08-15 Circuit and method for interfacing to a bus channel
US09/930,694 2001-08-15

Publications (2)

Publication Number Publication Date
WO2003017112A2 WO2003017112A2 (en) 2003-02-27
WO2003017112A3 true WO2003017112A3 (en) 2003-12-11

Family

ID=25459622

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/024005 WO2003017112A2 (en) 2001-08-15 2002-07-30 Circuit and method for interfacing to a bus channel

Country Status (3)

Country Link
US (1) US6806728B2 (en)
AU (1) AU2002324553A1 (en)
WO (1) WO2003017112A2 (en)

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WO2003034592A1 (en) * 2001-10-17 2003-04-24 Optillion Ab Adaptive level binary logic
US20040032319A1 (en) * 2002-08-17 2004-02-19 Kye-Hyun Kyung Devices and methods for controlling active termination resistors in a memory system
US7106569B2 (en) * 2002-11-27 2006-09-12 Sierra Wireless, Inc. Adaptive current limiter for wireless modem
US7894260B2 (en) * 2003-01-03 2011-02-22 Samsung Electronics Co., Ltd. Synchronous semiconductor memory device having on-die termination circuit and on-die termination method
KR100506976B1 (en) * 2003-01-03 2005-08-09 삼성전자주식회사 synchronous semiconductor memory device having on die termination circuit
KR100539237B1 (en) * 2003-06-19 2005-12-27 삼성전자주식회사 Termination providing apparatus and memory system using the same
US6924660B2 (en) 2003-09-08 2005-08-02 Rambus Inc. Calibration methods and circuits for optimized on-die termination
US6980020B2 (en) * 2003-12-19 2005-12-27 Rambus Inc. Calibration methods and circuits for optimized on-die termination
US6965337B1 (en) * 2004-07-26 2005-11-15 Scintera Networks, Inc. Reference generator
US7196567B2 (en) * 2004-12-20 2007-03-27 Rambus Inc. Systems and methods for controlling termination resistance values for a plurality of communication channels
US7996590B2 (en) * 2004-12-30 2011-08-09 Samsung Electronics Co., Ltd. Semiconductor memory module and semiconductor memory system having termination resistor units
US7138823B2 (en) * 2005-01-20 2006-11-21 Micron Technology, Inc. Apparatus and method for independent control of on-die termination for output buffers of a memory device
US7389194B2 (en) 2005-07-06 2008-06-17 Rambus Inc. Driver calibration methods and circuits
US7560956B2 (en) * 2005-08-03 2009-07-14 Micron Technology, Inc. Method and apparatus for selecting an operating mode based on a determination of the availability of internal clock signals
US20070046308A1 (en) * 2005-08-26 2007-03-01 Ronald Baker Test modes for a semiconductor integrated circuit device
US7439760B2 (en) 2005-12-19 2008-10-21 Rambus Inc. Configurable on-die termination
US7561391B2 (en) * 2005-12-20 2009-07-14 International Rectifier Corporation Input voltage sensing circuit
FR2905211A1 (en) * 2006-08-22 2008-02-29 St Microelectronics Sa Transmitter i.e. processor, output impedance matching method for communication device, involves sending control signal, based on comparison signal, to programmable resistive element to reduce gap between reference and measurement voltages
KR100875673B1 (en) * 2007-05-14 2008-12-24 주식회사 하이닉스반도체 On-die termination device and its calibration method
TW200921595A (en) * 2007-11-14 2009-05-16 Darfon Electronics Corp Multi-lamp backlight apparatus
US7635990B1 (en) * 2008-07-18 2009-12-22 Xilinx, Inc. Methods and apparatus for implementing an output circuit
US7915912B2 (en) * 2008-09-24 2011-03-29 Rambus Inc. Signal lines with internal and external termination
US8324935B2 (en) * 2008-10-09 2012-12-04 Nxp B.V. Bus driver circuit
EP2396885B1 (en) * 2009-02-12 2013-11-06 MOSAID Technologies Incorporated Termination circuit for on-die termination
US8502589B2 (en) * 2009-11-26 2013-08-06 Mediatek Inc. Signal swing trimming apparatus and method thereof
US8502587B2 (en) * 2009-12-22 2013-08-06 Fairchild Semiconductor Corporation Fast recovery voltage regulator
JP5718596B2 (en) * 2010-08-05 2015-05-13 ジーブイビービー ホールディングス エス．エイ．アール．エル． Reception circuit, signal transmission circuit, and signal reception method
US20130120020A1 (en) * 2011-11-11 2013-05-16 Qualcomm Incorporated Adaptive output swing driver
US9343165B2 (en) * 2012-12-31 2016-05-17 Sandisk Technologies Inc. Dynamic drive strength optimization
US9024665B2 (en) * 2013-03-13 2015-05-05 Intel Corporation Transmitter with voltage and current mode drivers
WO2016164019A1 (en) 2015-04-09 2016-10-13 Hewlett Packard Enterprise Development Lp Termination voltage circuits
US20170285992A1 (en) * 2016-04-01 2017-10-05 Intel Corporation Memory subsystem with narrow bandwidth repeater channel
US9948279B1 (en) * 2017-03-29 2018-04-17 Novatek Microelectronics Corp. Electronic device capable of bandwidth compensation and method thereof
US10938403B2 (en) * 2018-06-29 2021-03-02 Texas Instruments Incorporated Battery charging and measurement circuit
FR3102580B1 (en) * 2019-10-23 2021-10-22 St Microelectronics Rousset Voltage Regulator
CN113267990B (en) * 2021-05-21 2024-01-30 优利德科技(中国)股份有限公司 Negative pressure tracking device and negative pressure tracking method

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US5977797A (en) * 1997-12-30 1999-11-02 Lsi Logic Corporation Method and apparatus for transferring data on a voltage biased data line

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5254883A (en) * 1992-04-22 1993-10-19 Rambus, Inc. Electrical current source circuitry for a bus
EP0611113A1 (en) * 1993-02-04 1994-08-17 Texas Instruments Incorporated Differential bus drivers
US5926031A (en) * 1996-10-29 1999-07-20 Linfinitymicroelectronics, Inc. High speed digital bus termination
WO1999010982A1 (en) * 1997-08-29 1999-03-04 Rambus Incorporated Current control technique

Also Published As

Publication number Publication date
US20030189441A1 (en) 2003-10-09
WO2003017112A2 (en) 2003-02-27
US6806728B2 (en) 2004-10-19
AU2002324553A1 (en) 2003-03-03

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