WO2003061006B1 - Stacked die in die bga package - Google Patents

Stacked die in die bga package

Info

Publication number
WO2003061006B1
WO2003061006B1 PCT/US2003/000569 US0300569W WO03061006B1 WO 2003061006 B1 WO2003061006 B1 WO 2003061006B1 US 0300569 W US0300569 W US 0300569W WO 03061006 B1 WO03061006 B1 WO 03061006B1
Authority
WO
WIPO (PCT)
Prior art keywords
die
substrate
disposed
bond pads
assembly
Prior art date
Application number
PCT/US2003/000569
Other languages
French (fr)
Other versions
WO2003061006A3 (en
WO2003061006A2 (en
Inventor
Hock Chuan Tan
Thiam Chye Lim
Victor Cher Khng Tan
Chee Peng Neo
Michael Kian Shing Tan
Beng Chye Chew
Cheng Poh Pour
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from SG200200134A external-priority patent/SG121702A1/en
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to AU2003207484A priority Critical patent/AU2003207484A1/en
Publication of WO2003061006A2 publication Critical patent/WO2003061006A2/en
Publication of WO2003061006A3 publication Critical patent/WO2003061006A3/en
Publication of WO2003061006B1 publication Critical patent/WO2003061006B1/en

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    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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    • H01L2924/151—Die mounting substrate
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    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.

Claims

AMENDED CLAIMS
[received by the International Bureau on 28 June 2004 (28.06.04); original claims 1-96 replaced by amended claims 1-65]
WHAT IS CLAIMED IS:
1. A stacked die assembly, comprising: at least two semiconductor dies disposed on a substrate in a stacked arrangement, the substrate comprising a first surface having terminal pads disposed thereon, and a second surface; a first die disposed on the first surface of the substrate, and comprising a first surface having bond pads disposed thereon, a second surface, and bonding elements connecting the bond pads to the terminal pads on the substrate; and a second die comprising a first surface, a second surface, and a perimeter, the first surface having bond pads disposed thereon, the second surface comprising a recessed edge portion along the perimeter of the die, the second die disposed on the first surface of the first die with the bond pads on the first die positioned within the recessed edge portion, the recessed edge portion having a height sufficient for clearance of the bonding elements extending from the bond pads of the first die.
2. A stacked die assembly, comprising: at least two semiconductor dies disposed on a substrate in a stacked arrangement, the substrate comprising a surface having terminal pads disposed thereon; a first die disposed on said surface of the substrate, the first die comprising a first surface having bond pads disposed thereon, a second surface- and bonding elements connecting the bond pads of the first die to the terminal pads on the substrate; and a second die comprising a first surface, an opposing second surface- and a perimeter, the first surface having bond pads disposed thereon, the second surface having a thickness removed along the perimeter of the die to provide a recessed edge portion, the second die disposed on the first surface of the first die with the bond pads of the first die disposed within the recessed edge portion, the recessed edge portion having a sufficient height for clearance of the bonding elements extending from the bond pads on the first die.
3. A stacked die assembly, comprising: at least two semiconductor dies disposed on a substrate in a stacked arrangement- the substrate comprising a first surface having terminal pads disposed thereon, and a second surface; a first die disposed on the first surface of the substrate, and comprising a first surface and a second surface having a recess formed therein; and a second die at least partially disposed "within the recess of the first die.
4. A stacked die assembly, comprising: a first die disposed on a substrate and comprising a surface having a recess formed therein; and a second die at least partially disposed within the recess of the first die in a stacked arrangement.
5. The stacked die assembly of Claim 4, further comprising a third die disposed on the second die.
6. The stacked die assembly of Claim 5, wherein the third die comprises a first surface, an opposing second surface, and a perimeter, the first surface having bond pads disposed thereon, and the second surface comprising a recessed edge portion along the perimeter, the second surface of the third die disposed on ihe first surface of the second die whereby the recessed edge portion provides sufficient clearance for bonding elements extending from the bond pads of the second die.
7. A stacked die assembly, comprising a first die mounted on a substrate and comprising first and second surfaces, the first surface having a second die mounted thereon, and the second surface mounted on the substrate and having a recess formed therein.
8. The stacked die assembly according to Claim 7, wherein the first die is attached to the substrate by an adhesive element disposed within the recess.
9. The stacked die assembly according to Claim 7, further comprising a third die disposed within the recess of the first die.
10. The stacked die assembly according to Claim 7, wherein the second die comprises a first surface, an opposing second surface, and a perimeter, the first surface having bond pads disposed thereon, the second surface comprising a recessed edge along the perimeter, and the second die disposed on the first surface of the first die whereby the recessed edge provides sufficient clearance for bonding elements extending from the first die.
11. The stacked die assembly according to Claim 7, further comprising a third die on the second surface of the second die, the third die comprising a first surface, an opposing second surface, a perimeter, and a recessed edge portion along the perimeter, whereby the recessed edge portion of the third die provides sufficient clearance for bonding elements connecting the bond pads of the second die to terminal pads on the substrate,
12. A stacked die assembly, comprising; at least two semiconductor dies disposed on a substrate in a stacked arrangement, the substrate comprising a first surface having terminal pads disposed thereon, and a second surface; a first die comprising a first surface disposed on the first surface of the substrate, and an opposing second surface; and a second die comprising a first surface having bond pads disposed thereon, and a second surface having a recess fomied therein, the first die at least partially disposed in the recess of the second die-
13. A stacked die assembly, comprising; a first die comprising first and second surfaces, the second surface mounted on a substrate, and each surface having a recess formed therein; and a second die at least partially disposed within the recess of the first surface of the first die.
14. The stacked die assembly according to Claim 13, wherein the first die is attached to the substrate by an adhesive element disposed within the recess of the second surface.
IS- The stacked die assembly according to Claim 13, further comprising a third die disposed within tire recess of the second surface of the first die.
21
1 . The stacked die assembly according to any of Claims 1-6, wherein the first die is mounted on the substrate in a flip chip attachment.
17. The die assembly of any of Claims 1-15, further comprising one or more bonding elements connecting bond pads of the second die to terminal pads on the substrate.
18- The die assembly of Claim 17, wherein the bonding element is selected fi-om the group consisting of a TAB tape and a wire bond.
19. The die assembly of any of Claims 5, 6, and 11 , further comprising a bonding element connecting bond pads of the third die to terminal pads on the substrate.
20. The die assembly of any of Claims 3-11 and 13-15, further comprising bonding elements connecting bond pads on the first die to terminal pads on the substrate.
1. The die assembly of any of Claims 1-15, further comprising at least one of an adhesive element disposed between the first die and the substrate, and an adhesive element disposed between the second die and the first die.
22. The die assembly of Claim 21, wherein the adhesive element is selected from the group consisting of a die attach adhesive, and a tape adhesive.
23. The die assembly of any of Claims 5, 6, and 11, further comprising at least one of an adhesive element disposed between the first die and the second die, and an adhesive element disposed between the second die and the third die.
24. The die assembly of any of Claims 1-15, wherein the second die has a length, a width, or both, that is greater than that of the first die.
25. The die assembly of any of Claims 5, 6, 9, 1 ) , and 15, wherein the third die has a length, a width, or both, that is greater than the second die.
22 26- The die assembly of any of Claims 1-15, wherein the substrate comprises a material selected from the group consisting of bismaleimide triazϊne resin, epoxy resins, ceramics, and polyimide resins.
27. The die assembly of any of Claims 1-15, wherein the substrate comprises a metal leadframe.
28. The die assembly of any of Claims 3-15, wherein the recess is substantially square or rectangular shaped.
29. The die assembly of any of Claims 3-15, wherein the recess is substantially oval or circular shaped.
30. The die assembly of any of Claims 5, 9, and 15, wherein the third die is mounted by a flip chip attachment.
31. The die assembly of any of Claims 1-15, further comprising means for connecting the assembly to an external electrical apparatus,
32. The die assembly of Claim 3 J , wherein the assembly connecting means comprises a conductive solder, conductive epoxy, or conductor-filled epoxy, attached to the second sxtrface of the substrate.
33. The die assembly of Claim 31, wherein the assembly connecting means are in the form of balls, columns, pins, or a combination thereof, attached to the surface of the substrate.
34. The die assembly of any of Claims 1-15, being at least partially encapsulated to form a die package.
35. A semiconductor die package, comprising the die assembly of any of Claims 1-15, being at least partially encapsulated.
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36. The package of Claim 35, further comprising a plurality of external contacts disposed on a surface of the substrate.
37. The package of Claim 36, wherein the external contacts comprise a conductive solder, conductive epoxy, or conductor-filled epoxy.
38. The package of Claim 36, wherein the external contacts comprise balls, columns, pins, or a combination thereof.
39. A method of fabricating a semiconductor device, comprising the steps of: providing a substrate, a first die, and a second die, the substrate comprising a first surface having terminal pads disposed thereon, and a second surface, the first die comprising a first surface having a plurality of bond pads disposed thereon, and a second surface, the second die comprising a first surface, a second surface, and a perimeter, the first surface having bond pads disposed thereon, and the second surface comprising a recessed edge along the perimeter of the die; mounting the first die on the first surface of the substrate; connecting the bond pads of the first die to the terminal pads on the substrate with a first bonding element; and mounting tine second die on the first die with the bond pads on the first die located within the recessed edge, the recessed edge having a height sufficient for clearance of the first bonding element extending from the bond pads of the first die.
40. A method of fabricating a semiconductor device, comprising the steps of: providing a substrate, a first die, and a second die, the substrate comprising a first surface having terminal pads disposed thereon, and a second surface, the first die comprising a first surface, and a second surface comprising a recess formed therein, the recess having a surface, and the second die comprising a first surface having a plurality of bond pads disposed thereon, and a second surface; mounting the first die on the substrate; and mounting the second die in the recess of the first die with the bond pads exposed.
24
41. A method of fabricating a semiconductor device, comprising the steps of: providing a substrate, a first die, and a second die, the substrate comprising a first surface having terminal pads disposed thereon, and a second surface, the first die comprising a first surface having bond pads disposed thereon and an opposing second surface having a recess formed therein, the recess having a surface; attaching an adhesive element to at least One of the first surface of the substrate, and the surface of the recess of the first die; mounting the first die on the first surface of the substrate, with the adhesive clement disposed within the recess; connecting the bond pads of the first die to the terminal pads on the substrate with a first bonding element; and mounting the second die on the first surface of the first die.
42. The method of Claim 41, wherein the second die comprises a first surface, a second surface, and a perimeter, the first surface having a plurality of bond pads disposed (hereon, and the second surface comprising a recessed edge portion along the perimeter of the die; and the second die is mounted on the first die with the bond pads on the first die located within the recessed edge portion, the recessed edge portion having a height sufficient for clearance of the first bonding element extending from the bond pads of the first die
43- A method of fabricating a semiconductor device, comprising the steps of: providing a substrate, a first die, and a second die, the substrate comprising a first surface having terminal pads disposed thereon, and a second surface, the first die comprising an active surface, and a second surface, the second die comprising an active surface having a plurality of bond pads disposed thereon, and a second surface having a recess formed therein, the recess having a surface; mounting the first die on the first surface of the substrate; and mounting the second die on the first die whereby the first die is at least partially received within the recess of the second die.
44. The method of any of Claims 39-43, further comprising the step of mounting a third die on the second die.
25
45. The method of any of Claims 40, 41 and 43, further comprising the step of mounting a third die on the second die, the third die comprising a first surface, a second surface, and a perimeter, the first surface having bond pads disposed thereon, and the second surface comprising a recessed edge portion along the perimeter of the die, the recessed edge portion having a height sufficient for clearance of bonding elements extending from the bond pads of the second die.
46. The method of Claim 45, further comprising the step of removing a portion of thickness of the third die from the second surface and along the perimeter to form the recessed edge portion.
47. The method of Clahns 39 or 42, further comprising the step of removing a portion of thickness from the second surface of the second die along the perimeter to form the recessed edge.
48. The method of Claims 40 or 41, further comprising the step of removing a portion of thickness of the first die from the second surface to form the recess.
49. The method of Claim 43, furiber comprising the step of removing a portion of thickness of the second die from the second surface to form the recess.
50. The method of any of Claims 46 and 47-49, wherein the step of removing the thickness of the die is performed using one of a chemical wet etch, dry etch, mechanical drilling, punching, and laser ablation.
51. The method of any of Claims 39, 40, and 43, wherein the step of mounting the first die is through a flip chip attachment.
52. The method of any of Claims 39-45, wherein one or more of the die mounting steps comprises applying an adhesive element to the substrate, one or more dies, or a combination thereof.
26
53. The method of Claim 52, wherein the adhesive element comprises a die-attach adhesive, a tape adhesive, or a combination thereof.
54. The method of Claim 52, wherein the adhesive element comprises a die-attach adhesive and is applied by one of screen printing, roller applicator, spray, and transfer.
55. The method of any of Claims 39-45, wherein the substrate, one or more dies, or a combination thereof, are provided in a pre-taped form with an adhesive tape attached thereto.
56. The method of any of Claims 3945, further comprising, prior to the mounting steps, the step of applying an adhesive element to the substrate, the surface of one or more of the dies, or a combination thereof.
57. The method of any of Claim? 39-45, further comprising connecting the bond pads of one or more dies to the terminal pads on the substrate with a bonding element.
58. The method of Claim 57, wherein the step of connecting the bond pads is by thermosonic bonding, ultrasonic bonding, tape automated bonding, or a combination thereof.
59. The method of any of Claims 39-45, further comprising the step of encapsulating at least a portion of the semiconductor device to form a package.
60. The method of Claim 59, wherein the step of encapsulating comprises spin-coating, glob-top, pot molding, transfer molding, or a combination thereof
61. The method of any of Claims 39-45, further comprising mounting a plurality of external contacts on the second surface of the substrate.
62. An apparatus, comprising: an electrical apparatus; and
27 the die assembly of any of Claims 39-45, being at least partially encapsulated to form a die package, the die package in electrical communication with the electrical apparatus.
63. The apparatus of Claim 62, wherein the electrical apparatus is selected from the group consisting of a PCB, motherboard, program logic controller, and testing apparatus.
64. An apparatus, comprising: an electrical apparatus; and a die package according to Claim 59, in electrical communication with the electrical apparatus.
65. A panel substrate, comprising multiple die assemblies, at least one of the die assemblies according to any of Claims 1-15.
28
PCT/US2003/000569 2002-01-09 2003-01-09 Stacked die in die bga package WO2003061006A2 (en)

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US20030148597A1 (en) 2003-08-07
US20030207516A1 (en) 2003-11-06
US7332819B2 (en) 2008-02-19
AU2003207484A1 (en) 2003-07-30
US20080096316A1 (en) 2008-04-24
US7332820B2 (en) 2008-02-19
US20060216864A1 (en) 2006-09-28
US7282392B2 (en) 2007-10-16
WO2003061006A3 (en) 2004-06-17
US20060292745A1 (en) 2006-12-28
US7371608B2 (en) 2008-05-13
WO2003061006A2 (en) 2003-07-24
US20080136045A1 (en) 2008-06-12
US20060292746A1 (en) 2006-12-28
US7282390B2 (en) 2007-10-16
US20080032449A1 (en) 2008-02-07
US7358117B2 (en) 2008-04-15
US20030207515A1 (en) 2003-11-06
US7344969B2 (en) 2008-03-18
US20030162325A1 (en) 2003-08-28
US20060292743A1 (en) 2006-12-28
US20130154117A1 (en) 2013-06-20
US7575953B2 (en) 2009-08-18
US8373277B2 (en) 2013-02-12
US7309623B2 (en) 2007-12-18
US7799610B2 (en) 2010-09-21

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