WO2004015775A1 - Stacking substrate for at least one ic and system comprising such a substrate - Google Patents

Stacking substrate for at least one ic and system comprising such a substrate Download PDF

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Publication number
WO2004015775A1
WO2004015775A1 PCT/NL2003/000573 NL0300573W WO2004015775A1 WO 2004015775 A1 WO2004015775 A1 WO 2004015775A1 NL 0300573 W NL0300573 W NL 0300573W WO 2004015775 A1 WO2004015775 A1 WO 2004015775A1
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WO
WIPO (PCT)
Prior art keywords
substrate
connecting board
spacer
substrate according
electrically conductive
Prior art date
Application number
PCT/NL2003/000573
Other languages
French (fr)
Inventor
Erik Peter Veninga
Original Assignee
Nederlandse Organisatie Voor Toegepast- Natuurwetenschappelijk Onderzoek Tno
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nederlandse Organisatie Voor Toegepast- Natuurwetenschappelijk Onderzoek Tno filed Critical Nederlandse Organisatie Voor Toegepast- Natuurwetenschappelijk Onderzoek Tno
Priority to AU2003257732A priority Critical patent/AU2003257732A1/en
Publication of WO2004015775A1 publication Critical patent/WO2004015775A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657Stacked arrangements of devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06517Bump or bump-like direct electrical connections from device to substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06572Auxiliary carrier between devices, the carrier having an electrical connection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/162Disposition
    • H01L2924/1627Disposition stacked type assemblies, e.g. stacked multi-cavities
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0284Details of three-dimensional rigid printed circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/144Stacked arrangements of planar printed circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/183Components mounted in and supported by recessed areas of the printed circuit board
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04Assemblies of printed circuits
    • H05K2201/045Hierarchy auxiliary PCB, i.e. more than two levels of hierarchy for daughter PCBs are important
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04Assemblies of printed circuits
    • H05K2201/049PCB for one component, e.g. for mounting onto mother PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09036Recesses or grooves in insulating substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431Details of mounted components
    • H05K2201/10507Involving several components
    • H05K2201/10515Stacked components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10674Flip chip
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10734Ball grid array [BGA]; Bump grid array
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2036Permanent spacer or stand-off in a printed circuit or printed circuit assembly
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15Position of the PCB during processing
    • H05K2203/1572Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3442Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers

Definitions

  • This invention relates to a substrate for at least one substantially plate-shaped IC for enabling the at least one IC to be connected with a connecting board.
  • Such a substrate is known from US 6,181,002. Such a substrate is typically plate-shaped. In use, an IC is arranged against one side of the substrate, parallel to the substrate. Preferably, a next IC is placed parallel to and against this IC. Thus, a number of parallel stacked IC's can be connected with, and parallel to, the substrate. In use, the side of the known substrate against which no IC or no stacking of parallel IC's has been arranged is arranged against a connecting board.
  • a connecting board can comprise a Printed Circuit Board (PCB).
  • a functional surface of a connecting board is provided with electrically conductive tracks for including the IC in a circuit.
  • the substrate with the plurality of IC's is typically assembled before the substrate is connected with the PCB, for instance with the aid of soldering.
  • the substrate is likewise provided with electrically conductive tracks which, on the one hand, are typically connected, in use, with the electrical tracks of the connecting board through soldered joints, and, on the other hand, are typically connected with terminals with which the at least one IC is normally provided.
  • An IC in this connection should be understood to mean any plate-shaped device which needs at least one electrical connection with the connecting board for the device to function.
  • the device can also comprise a sensor, an antenna or at least one other electrical component.
  • the IC literally and merely comprises an integrated circuit in a narrow sense of the word such as it is meant in the field of the art from which the IC has emanated.
  • the substrate shown in US 6,181,002 is plate-shaped and is arranged on one side thereof to be connected with the connecting board and on another side thereof to be connected with a plate -shaped IC against which possibly anotlier IC or a stacking of IC's can be placed.
  • a disadvantage is that in use the substrate must be provided with free surface on which electrically conductive tracks are available for enabling the substrate, for instance using electrically conductive wires, to be connected with the electrical terminals of at least the IC's that are not placed directly against the substrate.
  • the substrate needs to have a surface greater than the surface occupied by the IC arranged directly against the substrate.
  • the surface of the substrate does not correspond with the surface that would be occupied on the connecting board if the IC placed directly against the substrate were arranged directly against the connecting board. In this case, therefore, the functional surface of the connecting board is not optimally utilized.
  • An object of the invention is to provide a substrate which, compared with the known substrate, permits a more efficient use of the functional surface of a connecting board.
  • the stated object has been achieved with a substrate according to the invention which is characterized in that the substrate is connected with a spacer for maintaining, in use, such a distance between the substrate and the connecting board that at least one IC is placeable between the substrate and the connecting board.
  • the substrate is kept at a distance from the connecting board.
  • the surface that would be occupied by the substrate upon placement of the substrate against the connecting board is freely available for placing an IC.
  • the side of the substrate in use facing the connecting board which would be covered by the connecting board upon placement of the substrate against the connecting board, is available for placing an IC against it.
  • the side facing away from the connecting board is also free for placing an IC against it.
  • the at least one IC is placeable parallel to the connecting board. This prevents the board being provided with much relief.
  • the board may be more difficult to handle and parts may easily break from the board, for instance upon impact during assembly of the board.
  • the IC if the IC is placed and fixed parallel to the connecting board, the IC can be connected with the connecting board in a strong manner. This is beneficial to the drop resistance of products provided with such a connecting board with IC's.
  • a particular embodiment of the substrate according to the invention is characterized in that two IC's are placeable parallel to the connecting board between the substrate and the connecting board.
  • two IC's are placeable parallel to the connecting board between the substrate and the connecting board.
  • the side of the substrate in use facing away from the connecting board is likewise free for placing an IC against it.
  • the spacer comprises at least one relatively thin wall. This means that the spacer itself in use occupies relatively little surface of the connecting board. As a result, there is still much functional surface available for placement of an IC on that surface.
  • the spacer is provided with mutually separate electrically conductive paths for enabling the connecting board to be connected electrically with an IC in use arranged on the substrate. This facihtates connecting the terminals with the electrically conductive tracks on the connecting board.
  • the paths extend at least to a side of the substrate in use facing the connecting board.
  • the terminals of an IC placed against this side of the substrate with the electrically conductive paths on the spacer using electrically conductive wires.
  • Such wires would occupy an undesirable amount of space. It is now possible to connect the terminals of the IC with the paths extending to the respective side of the substrate, using, for instance, soldered, glued or clamped joints.
  • At least two paths extend to a side of the substrate in use facing away from the connecting board.
  • This embodiment is still more preferably characterized in that the substrate is provided with a plurality of channels, while an electrical path extends at least in part through each of the channels.
  • the electrical paths therefore occupy only very limited space.
  • the placement of the at least one IC against the substrate can be very compact, which makes for optimum use of the functional space and the functional surface.
  • such channels can also be called via's.
  • an end of the spacer in use proximal to the connecting board is provided with a plurality of recesses for receiving solder or glue when connecting the spacer with the connecting board.
  • This provides the advantage that the solder or the glue can be received substantially entirely in the recess, so that the space occupied by the solder or the glue needs to be taken into account less.
  • This is beneficial to the space and the surface that is available for placement of an IC, which in turn can lead to an efficient use of the functional space and the functional surface.
  • each electrically conductive path terminates in a recess. This leads to a further enhanced efficient use of the available space, which is favorable for the amount of space available for placement of an IC and further optimizes utilization of the functional surface.
  • the recess preferably has a shape such that a hquid bonding agent such as a bonding solder can be received at least substantially entirely in the recess.
  • a shape can be based on surface tension-sensitive parameters of, possibly, the bonding agent, the electrically conductive path, the spacer and the connecting board.
  • the spacer comprises at least one U -shape, the substrate being connected to ends of the legs of the U-shape.
  • the leg-connecting part included in the U-shape can comprise a face.
  • This provides the advantage that placing a "package" of three mutually parallel oriented IC's, when such substrate is placed on a functional surface of, for instance, a printed circuit board, can take place in a single step.
  • an IC can be placed on the part of the U-shape facing the substrate; an IC can be placed on the substrate on a side in use facing the connecting board, and an IC can be placed on the substrate on a side in use facing away from the connecting board.
  • the substrate beforehand provided with three. IC's in this way can be fitted on the PCB in a single step, for instance using soldered joints.
  • the substrate and the spacer form an integral whole and are designed in the form of a box or tube, the arrangement being such that at least one IC can be placed in this box or tube.
  • a substrate according to the invention is furthermore characterized in that the spacer extends substantially at right angles to the substrate. Since an IC is typically of rectangular design, a number of such substrates can be placed in closely juxtaposed relation, so that the functional surface can be utilized still more optimally.
  • the substrate with the spacer is manufactured from an electrically insulating material. In that case, the mutually separate electrical paths do not need to be individually provided with insulating separations between the paths.
  • the spacer is preferably manufactured using injection molding. This permits the use of a fast and simple manufacturing process.
  • the electrically insulating material comprises a ceramic.
  • the substrate can be made of thin-walled and yet strong design.
  • a ceramic is chemically stable and resistant to heat.
  • the electrically insulating material comprises a plastic, which is an inexpensive material.
  • the electrically insulating material of ceramic or of plastic is preferably provided with metallo-organic compounds which can be broken with the aid of a laser for the purpose of locally metallizing the material. In this way, it is possible to provide the electrically conductive paths accurately in a simple manner and a high degree of refinement of the paths can be achieved. This has as a consequence that IC's with a large number of terminals can be placed on the substrate.
  • the electrically conductive paths have been created by applying a metal layer to the substrate and/or the spacer and subsequently selectively removing this metal layer. Also, optionally, use can have been made of a two-component injection molding process and a substrate and spacer with electrically conductive paths.
  • the invention further relates to a system comprising such a substrate and a connecting board. Additionally, the invention relates to a system comprising such a substrate and at least one IC.
  • Chip Scale Packaging The procedure according to the invention of connecting a substrate with one or more IC's and connecting the substrate by means of the spacer with the connecting board on which, optionally, also an IC is placed, is sometimes referred to as Chip Scale Packaging.
  • the invention will now be elucidated with reference to a drawing. In the drawing:
  • Fig. 1 shows schematically a cross section of a first embodiment of a substrate according to the invention
  • Fig. 2 shows schematically a cross section of a second embodiment of a substrate according to the invention
  • Fig. 3 shows schematically a cross section of a third embodiment of a substrate according to the invention
  • Fig. 4 shows schematically a cross section of a fourth embodiment of a substrate according to the invention.
  • Fig. 5 shows schematically a cross section of a system comprising two substrates according to the invention
  • FIG. 6 shows schematically and in more detail a cross section of an embodiment according to Fig. 1;
  • Fig. 7 shows schematically a more detailed cross section of the embodiment according to Fig. 4;
  • Fig. 8a shows a perspective view of the embodiment according to Fig. 3;
  • Fig. 8b shows a detailed view of the encircled portion in Fig. 8a;
  • Fig. 9 shows a perspective, more detailed view of the embodiment according to Fig. 8a;
  • Fig. 10 shows schematically in perspective the embodiment according to Fig. 4.
  • a substrate 1 in use for a substantially plate- shaped IC 1.1 is connected with a spacer 2a, 2b, which at each end 3 is connected with a connecting board 4.
  • the spacer 2a,2b in this embodiment is designed as two thin walls 2a,2b with ends 3a,3b.
  • the spacer 2a, 2b ensures that in use of the substrate 1 the distance between the substrate 1 and the connecting board 4 is so large that an IC 1.2 is placeable between the substrate 1 and the connecting board 4.
  • the connecting board 4 will be provided with electrically conductive tracks for including an IC 1.2 placed against the connecting board 4 in an electrical circuit, not shown.
  • the spacer 2a,2b is provided with mutually separate electrically conductive paths (not shown in Figs. 1-5) to enable electrical connection of the connecting board 4 with the IC 1.1 arranged on the substrate 1.
  • the substrate 1 as shown in Fig. 1 can be placed over IC 1.2 in a simple manner.
  • IC 1.1 can have been arranged on the substrate beforehand, but may also be arranged on the substrate 1 after the substrate has been arranged on the connecting board 4.
  • the IC 1.2 is arranged against a side of the substrate 1 in use facing the connecting board 4.
  • the spacer 2a,2b may also comprise a continuous wall closed upon itself.
  • the spacer 2a,2b may also comprise a plurality of bars or walls with openings.
  • Fig. 2 schematically represents a cross section of a second embodiment of the substrate 1 according to the invention.
  • the spacer 2a,2b connected with the substrate 1 in this case maintains in use such a distance between the substrate 1 and the connecting board 4 that at least two IC's are placeable between the substrate 1 and the connecting board 4, parallel to the connecting board 4.
  • one IC 1.1 is arranged against a side T of the substrate 1 in use facing the connecting board 4, and the second IC 1.2 is arranged directly against the connecting board 4.
  • Fig. 3 schematically shows a cross section of a third embodiment, in which on a side A of the substrate 1 facing away from the connecting board 4, a third IC 1.3 has been arranged.
  • the substrate 1 will to that end be provided with a plurality of channels 5. Through each of the channels 5, an electrical path, not shown, will extend, to enable, with the use of solder islands S, electrical and/or mechanical and/or even perhaps thermal connection of the IC 1.3 with the connecting board 4 by way of the substrate 1.
  • the other aspects discussed in the discussion of Fig. 1 also apply to the example as shown in Fig. 3.
  • Fig. 4 shows in a schematic cross section a fourth embodiment of a substrate 1 according to the invention.
  • the spacer 2 comprises at least one U-shape.
  • the substrate 1 is connected with the ends of the legs of the U-shape.
  • the U-shape can be present in the spacer 2 in one or more cross sections that are directed parallel to the legs of the U-shape.
  • the substrate and the spacer can form an integral whole and be designed in the form of a box or tube.
  • at least one IC, and preferably two IC's can be placed.
  • the box or tube is provided with an opening.
  • the U-shape is present in the spacer 2 in such a way that in each cross section that is parallel to the legs, the U-shape is identifiable.
  • the at least one IC or the two IC's will have to be placed before manufacture of the spacer and the substrate integrally connected therewith, at positions that are enclosed during the manufacture of the spacer and the substrate integrally connected therewith.
  • the part V included in the U-shape as leg-connecting part, which faces the substrate 1, can, as shown, be provided with an IC 1.2.
  • the respective part V between the legs of the U-shape in this case preferably comprises a face.
  • the substrate 1 may be provided with an IC I.l and an IC 1.3 at the positions indicated.
  • a surface of the connecting board 4 can in a single placement step be provided with three IC's positioned parallel to the connecting board 4.
  • FIG. 5 shows a system of a first substrate Dl according to the invention and a second substrate D2 according to the invention.
  • the substrate D2 corresponds to the substrates 1 shown in Figs. 2 and 3 and the substrate Dl corresponds to the substrate 1 shown in Fig. 4.
  • substrate Dl can also correspond to the substrates 1 shown in Figs. 2 and 3.
  • This example shows that it is also possible to place a system of substrates having five IC's included therein, on a connecting board 4. Naturally, it is possible to continue such a stacking of substrates.
  • Fig. 6 shows schematically a cross section of a substrate 1, where the spacer 2 and at least a part of the substrate 1 are provided with mutually separate electrically conductive paths 8 for enabling electrical connection of the connecting board 4 with an IC in use arranged on the substrate 1.
  • these paths 8 extend at least to a side T of a substrate 1 in use facing the connecting board 4, as shown in Fig. 6.
  • the substrate 1 is provided with a plurality of channels 5. Through each of the channels extends an electrical path 8, at least in part.
  • an IC arranged on a side A of the substrate 1 in use facing away from the connecting board can be electrically connected with the connecting board 4.
  • Channels 9 may be provided in the spacer 2. Through some of these channels 9 extend electrically conductive paths that can be connected with an IC to be placed against face V, using, for instance, solder islands (not shown) at positions 10.
  • the substrate and the spacer can each comprise a separate part and can be connected with each other. It is also possible, however, and even preferred, that the substrate and the spacer comprise a single part. In other words, the spacer 2a,2b and the substrate 1 may be integrally connected with each other.
  • FIG 8a shows in perspective a substrate 1 with an integrally connected spacer 2.
  • the spacer 2 comprises a thin wall closed upon itself.
  • the spacer 2 is provided with electrically conductive paths 8 extending to a side T of the substrate 1 in use facing the connecting board 4. Some of these electrically conductive paths 8 further extend to a side of the substrate 1 in use facing away from the connecting board 4.
  • Fig. 8b represents a more detailed drawing of the part of the substrate 1 with the spacer 2 encircled in Fig. 8a.
  • the electrically conductive paths 8 extend via the channels 5 to a side of the substrate in use facing away from the connecting board 4.
  • An end 3 of the spacer 2 in use proximal to the connecting board 4 is provided with a plurality of recesses 11 for receiving solder or glue when connecting the spacer 2 to the connecting board 4.
  • the electrically conductive paths 8 preferably terminate all in a recess 11.
  • Each recess preferably has such a shape that a liquid bonding agent, such as a bonding solder, can be received at least substantially entirely in the recess.
  • spacer 2 extends preferably substantially at right angles to the substrate 1.
  • the substrate 1 and the spacer 2 are preferably, optionally with the exception of the recesses 11, provided with right angles.
  • the substrate 1 and the spacer 2 are preferably manufactured using injection molding.
  • the substrate and the spacer are moreover, preferably, manufactured from an electrically insulating material, which comprises, for instance, a ceramic.
  • the electrically insulating material comprises a plastic.
  • a plastic can comprise, for instance, PA6 or LCP, known per se.
  • the material is provided with metallo -organic compounds which can be broken with the aid of a laser for the purpose of locally metallizing the material for creating the electrically conductive paths 8.
  • Such metallizations are procedures that are known per in the manufacture of fine electronics.
  • the electrically conductive paths 8 have been provided by applying a metal layer to the substrate 1 and/or the spacer 2. Subsequently, this metal layer can have been removed selectively, so that the electrically conductive paths remain on the substrate and/or the spacer.
  • a metal layer can comprise, for instance, copper.
  • Fig. 9 shows in perspective a substrate 1 with a spacer 2, and specifies a few possible dimensions. With the aid of, for instance, 3-D lithography, however, also track widths of the electrically conductive paths 8 of about 25 microns can be achieved.
  • the wall-shaped spacer can have a thickness of approximately 0.25 mm. When a ceramic is used as insulating material for the substrate and/or the spacer, alumina is very suitable.
  • Fig. 10 shows a substrate with two IC's, arranged on a connecting board 4. In general, preferably, the substrate and the spacer are integrally connected with each other.
  • the invention is not limited in any way to the embodiments discussed above. Many variants are possible. Thus, the dimensions can be adjusted, if desired.
  • the materials can also comprise other suitable materials.
  • the spacer can also take other desired shapes to enable IC's to be placed against it.
  • the IC's may also be bonded with glue. Such a glue can, if desired, be electrically conductive, or electrically insulating. Clamped joints are also possible.
  • connection with the aid of electrical wires is not excluded.
  • an antenna, a sensor, a connector or at least one cooling fin a substrate facing away from the connecting board, which substrate has been connected with the connecting board with the aid of the spacer.
  • the substrate and the spacer connected therewith could also be universally designed, such that, for utility in carrying an IC whose terminals are provided in unusual positions, an interface provided with an electrically conductive adapter pattern can be stuck between the universal substrate and the unusual IC, for the IC to function.
  • Such interfaces could also have utility when stacking substrates with spacers.
  • the connecting board 4 with the substrate connected thereto via the spacer and the at least one IC, in turn are jointly arranged on another board.
  • the connecting board can have dimensions that are not much greater than the dimensions of the IC's arranged thereon.
  • the spacer it is also possible for the spacer to be so designed, and to be so placed on the connecting board, that a space between the spacer, the substrate and the connecting board becomes gastight in use. It may then be necessary to employ gastight glue and/or soldered joints. All such variants are understood to fall within the scope of the invention.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

A substrate for at least one substantially plate-shaped IC for the purpose of enabling the at least one IC to be connected with a connecting board. The substrate is connected with a spacer for maintaining, in use, such a distance between the substrate and the connecting board that at least one IC is placeable between the substrate and the connecting board.

Description

Title: STACKING SUBSTRATE FOR AT LEAST ONE IC AND SYSTEM COMPRISING SUCH A
SUBSTRATE
This invention relates to a substrate for at least one substantially plate-shaped IC for enabling the at least one IC to be connected with a connecting board.
Such a substrate is known from US 6,181,002. Such a substrate is typically plate-shaped. In use, an IC is arranged against one side of the substrate, parallel to the substrate. Preferably, a next IC is placed parallel to and against this IC. Thus, a number of parallel stacked IC's can be connected with, and parallel to, the substrate. In use, the side of the known substrate against which no IC or no stacking of parallel IC's has been arranged is arranged against a connecting board. Such a connecting board can comprise a Printed Circuit Board (PCB). A functional surface of a connecting board is provided with electrically conductive tracks for including the IC in a circuit. It is advantageous to be able to connect a largest possible number of IC's with the connecting board per functional surface. In practice, the substrate with the plurality of IC's is typically assembled before the substrate is connected with the PCB, for instance with the aid of soldering. The substrate is likewise provided with electrically conductive tracks which, on the one hand, are typically connected, in use, with the electrical tracks of the connecting board through soldered joints, and, on the other hand, are typically connected with terminals with which the at least one IC is normally provided. An IC in this connection should be understood to mean any plate-shaped device which needs at least one electrical connection with the connecting board for the device to function. Thus, the device can also comprise a sensor, an antenna or at least one other electrical component. Naturally, it is also possible that the IC literally and merely comprises an integrated circuit in a narrow sense of the word such as it is meant in the field of the art from which the IC has emanated. The substrate shown in US 6,181,002 is plate-shaped and is arranged on one side thereof to be connected with the connecting board and on another side thereof to be connected with a plate -shaped IC against which possibly anotlier IC or a stacking of IC's can be placed. A disadvantage is that in use the substrate must be provided with free surface on which electrically conductive tracks are available for enabling the substrate, for instance using electrically conductive wires, to be connected with the electrical terminals of at least the IC's that are not placed directly against the substrate. As a consequence, the substrate needs to have a surface greater than the surface occupied by the IC arranged directly against the substrate. In other words, the surface of the substrate does not correspond with the surface that would be occupied on the connecting board if the IC placed directly against the substrate were arranged directly against the connecting board. In this case, therefore, the functional surface of the connecting board is not optimally utilized.
An object of the invention is to provide a substrate which, compared with the known substrate, permits a more efficient use of the functional surface of a connecting board.
The stated object has been achieved with a substrate according to the invention which is characterized in that the substrate is connected with a spacer for maintaining, in use, such a distance between the substrate and the connecting board that at least one IC is placeable between the substrate and the connecting board.
By the spacer, the substrate is kept at a distance from the connecting board. As a consequence, the surface that would be occupied by the substrate upon placement of the substrate against the connecting board, is freely available for placing an IC. According to the invention, also the side of the substrate in use facing the connecting board, which would be covered by the connecting board upon placement of the substrate against the connecting board, is available for placing an IC against it. Furthermore, the side facing away from the connecting board is also free for placing an IC against it. In other words, it is possible to place at least two IC's on a functional surface, which permits a more efficient use of that functional surface of the connecting board. Preferably, in use, the at least one IC is placeable parallel to the connecting board. This prevents the board being provided with much relief. Due to the presence of any relief, the board may be more difficult to handle and parts may easily break from the board, for instance upon impact during assembly of the board. Furthermore, if the IC is placed and fixed parallel to the connecting board, the IC can be connected with the connecting board in a strong manner. This is beneficial to the drop resistance of products provided with such a connecting board with IC's.
A particular embodiment of the substrate according to the invention is characterized in that two IC's are placeable parallel to the connecting board between the substrate and the connecting board. In this case, it is possible to place an IC against the side of the substrate in use facing the connecting board and to place an IC against the connecting board. Furthermore, the side of the substrate in use facing away from the connecting board is likewise free for placing an IC against it. In other words, it is possible to place on a functional surface at least three IC's parallel to each other and parallel to that functional surface, which permits a still more efficient use of the functional surface of the connecting board.
In a further embodiment of a substrate according to the invention, the spacer comprises at least one relatively thin wall. This means that the spacer itself in use occupies relatively little surface of the connecting board. As a result, there is still much functional surface available for placement of an IC on that surface.
Furthermore, preferably, the spacer is provided with mutually separate electrically conductive paths for enabling the connecting board to be connected electrically with an IC in use arranged on the substrate. This facihtates connecting the terminals with the electrically conductive tracks on the connecting board.
In particular, the paths extend at least to a side of the substrate in use facing the connecting board. In this case, there is no necessity, for instance, to connect the terminals of an IC placed against this side of the substrate with the electrically conductive paths on the spacer using electrically conductive wires. Such wires would occupy an undesirable amount of space. It is now possible to connect the terminals of the IC with the paths extending to the respective side of the substrate, using, for instance, soldered, glued or clamped joints.
Furthermore, preferably, at least two paths extend to a side of the substrate in use facing away from the connecting board. As a consequence, there is also no necessity to use the above-mentioned wires when placing an IC against this side, and here too, soldered, glued or clamped joints can be used for connecting the IC with the electrically conductive paths.
This embodiment is still more preferably characterized in that the substrate is provided with a plurality of channels, while an electrical path extends at least in part through each of the channels. The electrical paths therefore occupy only very limited space. In other words, the placement of the at least one IC against the substrate can be very compact, which makes for optimum use of the functional space and the functional surface. Incidentally, such channels can also be called via's.
In an advantageous embodiment, an end of the spacer in use proximal to the connecting board is provided with a plurality of recesses for receiving solder or glue when connecting the spacer with the connecting board. This provides the advantage that the solder or the glue can be received substantially entirely in the recess, so that the space occupied by the solder or the glue needs to be taken into account less. This is beneficial to the space and the surface that is available for placement of an IC, which in turn can lead to an efficient use of the functional space and the functional surface. Furthermore, preferably, each electrically conductive path terminates in a recess. This leads to a further enhanced efficient use of the available space, which is favorable for the amount of space available for placement of an IC and further optimizes utilization of the functional surface. The recess preferably has a shape such that a hquid bonding agent such as a bonding solder can be received at least substantially entirely in the recess. Such a shape can be based on surface tension-sensitive parameters of, possibly, the bonding agent, the electrically conductive path, the spacer and the connecting board. In a particular embodiment, the spacer comprises at least one U -shape, the substrate being connected to ends of the legs of the U-shape. Additionally, the leg-connecting part included in the U-shape can comprise a face. This provides the advantage that placing a "package" of three mutually parallel oriented IC's, when such substrate is placed on a functional surface of, for instance, a printed circuit board, can take place in a single step. This is because an IC can be placed on the part of the U-shape facing the substrate; an IC can be placed on the substrate on a side in use facing the connecting board, and an IC can be placed on the substrate on a side in use facing away from the connecting board. The substrate beforehand provided with three. IC's in this way can be fitted on the PCB in a single step, for instance using soldered joints.
Thus, it is possible that the substrate and the spacer form an integral whole and are designed in the form of a box or tube, the arrangement being such that at least one IC can be placed in this box or tube. Preferably, a substrate according to the invention is furthermore characterized in that the spacer extends substantially at right angles to the substrate. Since an IC is typically of rectangular design, a number of such substrates can be placed in closely juxtaposed relation, so that the functional surface can be utilized still more optimally. Preferably, the substrate with the spacer is manufactured from an electrically insulating material. In that case, the mutually separate electrical paths do not need to be individually provided with insulating separations between the paths. Furthermore, the spacer is preferably manufactured using injection molding. This permits the use of a fast and simple manufacturing process.
Preferably, the electrically insulating material comprises a ceramic. In this way, the substrate can be made of thin-walled and yet strong design. Moreover, a ceramic is chemically stable and resistant to heat. It is also possible, however, that the electrically insulating material comprises a plastic, which is an inexpensive material. The electrically insulating material of ceramic or of plastic is preferably provided with metallo-organic compounds which can be broken with the aid of a laser for the purpose of locally metallizing the material. In this way, it is possible to provide the electrically conductive paths accurately in a simple manner and a high degree of refinement of the paths can be achieved. This has as a consequence that IC's with a large number of terminals can be placed on the substrate.
It is also possible, however, that the electrically conductive paths have been created by applying a metal layer to the substrate and/or the spacer and subsequently selectively removing this metal layer. Also, optionally, use can have been made of a two-component injection molding process and a substrate and spacer with electrically conductive paths.
The invention further relates to a system comprising such a substrate and a connecting board. Additionally, the invention relates to a system comprising such a substrate and at least one IC.
The procedure according to the invention of connecting a substrate with one or more IC's and connecting the substrate by means of the spacer with the connecting board on which, optionally, also an IC is placed, is sometimes referred to as Chip Scale Packaging. The invention will now be elucidated with reference to a drawing. In the drawing:
Fig. 1 shows schematically a cross section of a first embodiment of a substrate according to the invention; Fig. 2 shows schematically a cross section of a second embodiment of a substrate according to the invention;
Fig. 3 shows schematically a cross section of a third embodiment of a substrate according to the invention;
Fig. 4 shows schematically a cross section of a fourth embodiment of a substrate according to the invention;
Fig. 5 shows schematically a cross section of a system comprising two substrates according to the invention;
Fig. 6 shows schematically and in more detail a cross section of an embodiment according to Fig. 1; Fig. 7 shows schematically a more detailed cross section of the embodiment according to Fig. 4;
Fig. 8a shows a perspective view of the embodiment according to Fig. 3;
Fig. 8b shows a detailed view of the encircled portion in Fig. 8a;
Fig. 9 shows a perspective, more detailed view of the embodiment according to Fig. 8a;
Fig. 10 shows schematically in perspective the embodiment according to Fig. 4.
In Fig. 1, there is shown a substrate 1 in use for a substantially plate- shaped IC 1.1. The substrate 1 is connected with a spacer 2a, 2b, which at each end 3 is connected with a connecting board 4. The spacer 2a,2b in this embodiment is designed as two thin walls 2a,2b with ends 3a,3b. The spacer 2a, 2b ensures that in use of the substrate 1 the distance between the substrate 1 and the connecting board 4 is so large that an IC 1.2 is placeable between the substrate 1 and the connecting board 4. In practice, the connecting board 4 will be provided with electrically conductive tracks for including an IC 1.2 placed against the connecting board 4 in an electrical circuit, not shown. For electrically and/or mechanically and/or even thermally connecting the IC 1.2 with the connecting board 4, typically, use is made of solder islands S. Preferably, the spacer 2a,2b is provided with mutually separate electrically conductive paths (not shown in Figs. 1-5) to enable electrical connection of the connecting board 4 with the IC 1.1 arranged on the substrate 1. A more detailed discussion of the electrically conductive paths will follow hereinbelow in the discussion of Figs. 6-10. The substrate 1 as shown in Fig. 1 can be placed over IC 1.2 in a simple manner. IC 1.1 can have been arranged on the substrate beforehand, but may also be arranged on the substrate 1 after the substrate has been arranged on the connecting board 4. It is also possible that the IC 1.2 is arranged against a side of the substrate 1 in use facing the connecting board 4. Incidentally, the spacer 2a,2b may also comprise a continuous wall closed upon itself. The spacer 2a,2b may also comprise a plurality of bars or walls with openings.
Fig. 2 schematically represents a cross section of a second embodiment of the substrate 1 according to the invention. The spacer 2a,2b connected with the substrate 1 in this case maintains in use such a distance between the substrate 1 and the connecting board 4 that at least two IC's are placeable between the substrate 1 and the connecting board 4, parallel to the connecting board 4. In this case, one IC 1.1 is arranged against a side T of the substrate 1 in use facing the connecting board 4, and the second IC 1.2 is arranged directly against the connecting board 4.
The other aspects as discussed in the discussion of Fig. 1 also apply to the example as shown in Fig. 2.
Fig. 3 schematically shows a cross section of a third embodiment, in which on a side A of the substrate 1 facing away from the connecting board 4, a third IC 1.3 has been arranged. In the case where use is made of electrically conductive paths with which the spacer 2 is provided for enabling electrical connection of the connecting board 4 with the IC 1.3, the substrate 1 will to that end be provided with a plurality of channels 5. Through each of the channels 5, an electrical path, not shown, will extend, to enable, with the use of solder islands S, electrical and/or mechanical and/or even perhaps thermal connection of the IC 1.3 with the connecting board 4 by way of the substrate 1. The other aspects discussed in the discussion of Fig. 1 also apply to the example as shown in Fig. 3.
Fig. 4 shows in a schematic cross section a fourth embodiment of a substrate 1 according to the invention. In this case, the spacer 2 comprises at least one U-shape. The substrate 1 is connected with the ends of the legs of the U-shape. The U-shape can be present in the spacer 2 in one or more cross sections that are directed parallel to the legs of the U-shape. The substrate and the spacer can form an integral whole and be designed in the form of a box or tube. In the box or tube, at least one IC, and preferably two IC's, can be placed. In other words, the box or tube is provided with an opening. Naturally, it is also possible that the U-shape is present in the spacer 2 in such a way that in each cross section that is parallel to the legs, the U-shape is identifiable.
In that case, the at least one IC or the two IC's will have to be placed before manufacture of the spacer and the substrate integrally connected therewith, at positions that are enclosed during the manufacture of the spacer and the substrate integrally connected therewith.
The part V included in the U-shape as leg-connecting part, which faces the substrate 1, can, as shown, be provided with an IC 1.2. The respective part V between the legs of the U-shape in this case preferably comprises a face. Moreover, the substrate 1 may be provided with an IC I.l and an IC 1.3 at the positions indicated. In this case, when placing such a substrate 1 provided with three IC's, a surface of the connecting board 4 can in a single placement step be provided with three IC's positioned parallel to the connecting board 4. The other aspects discussed in the discussion of Fig. 1 also apply to the example as shown in Fig. 4. Fig. 5 shows a system of a first substrate Dl according to the invention and a second substrate D2 according to the invention. The substrate D2 corresponds to the substrates 1 shown in Figs. 2 and 3 and the substrate Dl corresponds to the substrate 1 shown in Fig. 4. However, substrate Dl can also correspond to the substrates 1 shown in Figs. 2 and 3. This example shows that it is also possible to place a system of substrates having five IC's included therein, on a connecting board 4. Naturally, it is possible to continue such a stacking of substrates.
Fig. 6 shows schematically a cross section of a substrate 1, where the spacer 2 and at least a part of the substrate 1 are provided with mutually separate electrically conductive paths 8 for enabling electrical connection of the connecting board 4 with an IC in use arranged on the substrate 1. Preferably, these paths 8 extend at least to a side T of a substrate 1 in use facing the connecting board 4, as shown in Fig. 6. However, in all embodiments, it is also possible that at least a few paths 8 extend to a side A of the substrate 1 in use facing away from the connecting board 4. An example of this is shown in Fig. 7. In this case, the substrate 1 is provided with a plurality of channels 5. Through each of the channels extends an electrical path 8, at least in part. As a result, also an IC arranged on a side A of the substrate 1 in use facing away from the connecting board can be electrically connected with the connecting board 4. Channels 9 may be provided in the spacer 2. Through some of these channels 9 extend electrically conductive paths that can be connected with an IC to be placed against face V, using, for instance, solder islands (not shown) at positions 10. In all of the above -discussed exemplary embodiments, the substrate and the spacer can each comprise a separate part and can be connected with each other. It is also possible, however, and even preferred, that the substrate and the spacer comprise a single part. In other words, the spacer 2a,2b and the substrate 1 may be integrally connected with each other. Fig. 8a shows in perspective a substrate 1 with an integrally connected spacer 2. The spacer 2 comprises a thin wall closed upon itself. The spacer 2 is provided with electrically conductive paths 8 extending to a side T of the substrate 1 in use facing the connecting board 4. Some of these electrically conductive paths 8 further extend to a side of the substrate 1 in use facing away from the connecting board 4.
Fig. 8b represents a more detailed drawing of the part of the substrate 1 with the spacer 2 encircled in Fig. 8a. The electrically conductive paths 8 extend via the channels 5 to a side of the substrate in use facing away from the connecting board 4. An end 3 of the spacer 2 in use proximal to the connecting board 4 is provided with a plurality of recesses 11 for receiving solder or glue when connecting the spacer 2 to the connecting board 4. The electrically conductive paths 8 preferably terminate all in a recess 11. Each recess preferably has such a shape that a liquid bonding agent, such as a bonding solder, can be received at least substantially entirely in the recess. In general, spacer 2 extends preferably substantially at right angles to the substrate 1. The substrate 1 and the spacer 2 are preferably, optionally with the exception of the recesses 11, provided with right angles. The substrate 1 and the spacer 2 are preferably manufactured using injection molding. In general, the substrate and the spacer are moreover, preferably, manufactured from an electrically insulating material, which comprises, for instance, a ceramic. It is also possible, however, that the electrically insulating material comprises a plastic. Such a plastic can comprise, for instance, PA6 or LCP, known per se. Preferably, the material is provided with metallo -organic compounds which can be broken with the aid of a laser for the purpose of locally metallizing the material for creating the electrically conductive paths 8. Such metallizations are procedures that are known per in the manufacture of fine electronics. It is also possible, however, that the electrically conductive paths 8 have been provided by applying a metal layer to the substrate 1 and/or the spacer 2. Subsequently, this metal layer can have been removed selectively, so that the electrically conductive paths remain on the substrate and/or the spacer. Such a metal layer can comprise, for instance, copper. Optionally, use can be made of a two-component injection molding process for manufacturing a substrate with spacer which is provided with an electrically insulating material or a metallizable layer. It is also possible that a substrate manufactured with a two-component injection molding process comprises a spacer manufactured from a thermosetting plastic.
Fig. 9 shows in perspective a substrate 1 with a spacer 2, and specifies a few possible dimensions. With the aid of, for instance, 3-D lithography, however, also track widths of the electrically conductive paths 8 of about 25 microns can be achieved. The wall-shaped spacer can have a thickness of approximately 0.25 mm. When a ceramic is used as insulating material for the substrate and/or the spacer, alumina is very suitable. Fig. 10 shows a substrate with two IC's, arranged on a connecting board 4. In general, preferably, the substrate and the spacer are integrally connected with each other.
The invention is not limited in any way to the embodiments discussed above. Many variants are possible. Thus, the dimensions can be adjusted, if desired. The materials can also comprise other suitable materials. Also, there may be a plurality of IC's juxtaposed on the substrate or the connecting board. The spacer can also take other desired shapes to enable IC's to be placed against it. Instead of, or in addition to, being bonded with solder, the IC's may also be bonded with glue. Such a glue can, if desired, be electrically conductive, or electrically insulating. Clamped joints are also possible.
Moreover, connection with the aid of electrical wires is not excluded. Against the side of a substrate facing away from the connecting board, which substrate has been connected with the connecting board with the aid of the spacer, there may be arranged, instead or in addition, an antenna, a sensor, a connector or at least one cooling fin. The substrate and the spacer connected therewith could also be universally designed, such that, for utility in carrying an IC whose terminals are provided in unusual positions, an interface provided with an electrically conductive adapter pattern can be stuck between the universal substrate and the unusual IC, for the IC to function. Such interfaces could also have utility when stacking substrates with spacers. What is not excluded either is that the connecting board 4, with the substrate connected thereto via the spacer and the at least one IC, in turn are jointly arranged on another board. In this case, the connecting board can have dimensions that are not much greater than the dimensions of the IC's arranged thereon. It is also possible for the spacer to be so designed, and to be so placed on the connecting board, that a space between the spacer, the substrate and the connecting board becomes gastight in use. It may then be necessary to employ gastight glue and/or soldered joints. All such variants are understood to fall within the scope of the invention.

Claims

1. A substrate for at least one substantially plate-shaped IC for the purpose of enabling the at least one IC to be connected with a connecting board, characterized in that the substrate is connected with a spacer for maintaining, in use, such a distance between the substrate and the connecting board that at least one IC is placeable between the substrate and the connecting board.
2. A substrate according to claim 1, characterized in that, in use, the at least one IC is placeable parallel to the connecting board.
3. A substrate according to claim 1, characterized in that two IC's are placeable parallel to the connecting board.
4. A substrate according to claim 1, 2 or 3, characterized in that the spacer comprises at least one wall.
5. A substrate according to claim 4, characterized in that the wall is continuous, closed upon itself.
6. A substrate according to any one of the preceding claims, characterized in that the spacer is provided with mutually separate electrically conductive paths for enabling electrical connection of the connecting board with an IC in use arranged on the substrate.
7. A substrate according to claim 6, characterized in that the paths extend at least to a side of the substrate in use facing the connecting board.
8. A substrate according to claim 7, characterized in that at least two paths extend to a side of the substrate in use facing away from the connecting board.
9. A substrate according to claim 8, characterized in that the substrate is provided with a plurality of channels, an electrical path extending at least in part through each of the channels.
10. A substrate according to claim 9, characterized in that an end of the spacer in use proximal to the connecting board is provided with a plurality of recesses for receiving solder when connecting the substrate to the connecting board.
11. A substrate according to claim 10, characterized in that at least a number of the electrically conductive paths terminate in a recess, which recess has such a shape that a liquid bonding agent such as bonding solder can be received at least substantially entirely in the recess.
12. A substrate according to any one of claims 1-11, characterized in that the connecting board and the substrate are integrally connected with each other.
13. A substrate according to any one of the preceding claims, characterized in that the spacer comprises at least one U-shape, the substrate being connected with ends of the legs of the U-shape.
14. A substrate according to claim 13, characterized in that the part included in the U-shape that connects the legs comprises a face.
15. A substrate according to any one of the preceding claims, characterized in that the substrate and the spacer form an integral whole and are designed in the form of a box or tube, in which box or tube at least one IC can be placed.
16. A substrate according to any one of the preceding claims, characterized in that the spacer extends substantially at right angles to the substrate.
17. A substrate according to any one of the preceding claims, characterized in that the substrate and the spacer are manufactured from an electrically insulating material.
18. A substrate according to claim 17, characterized in that the spacer is manufactured using injection molding.
19. A substrate according to claim 18, characterized in that the injection molding comprises two-component injection molding.
20. A substrate according to any one of the preceding claims, characterized in that the spacer is manufactured from a thermosetting plastic.
21. A substrate according to claim 17 or 18, characterized in that the electrically insulating material comprises a ceramic.
22. A substrate according to claim 17, characterized in that the electrically insulating material comprises a plastic.
23. A substrate according to claim 17, 21 or 22, characterized in that the electrically insulating material is provided with metallo -organic compounds which can be broken with the aid of a laser for the purpose of locally metallizing the material.
24. A substrate according to any one of the preceding claims as far as dependent on claim 6, characterized in that the electrically conductive paths have been provided by applying a metal layer to the substrate and/or the spacer and subsequently selectively removing this metal layer.
25. A system comprising a first substrate according to any one of the preceding claims and a connecting board, characterized in that the first substrate is connected with the connecting board with the aid of the spacer.
26. A system according to claim 25, characterized in that the system is further provided with at least one IC which is arranged against the first substrate.
27. A system comprising a first substrate according to any one of claims 1-24, characterized in that the system is further provided with at least one IC which is arranged against the substrate.
28. A system according to any one of claims 24-27, characterized in that the system is further provided with a second substrate which is similar to the first substrate and is stackable on the first substrate.
PCT/NL2003/000573 2002-08-09 2003-08-11 Stacking substrate for at least one ic and system comprising such a substrate WO2004015775A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003257732A AU2003257732A1 (en) 2002-08-09 2003-08-11 Stacking substrate for at least one ic and system comprising such a substrate

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL1021245A NL1021245C2 (en) 2002-08-09 2002-08-09 Carrier for at least one IC and systems comprising such a carrier and an IC and / or such carrier and a connecting plate.
NL1021245 2002-08-09

Publications (1)

Publication Number Publication Date
WO2004015775A1 true WO2004015775A1 (en) 2004-02-19

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PCT/NL2003/000573 WO2004015775A1 (en) 2002-08-09 2003-08-11 Stacking substrate for at least one ic and system comprising such a substrate

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AU (1) AU2003257732A1 (en)
NL (1) NL1021245C2 (en)
WO (1) WO2004015775A1 (en)

Cited By (3)

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Publication number Priority date Publication date Assignee Title
WO2009043649A2 (en) * 2007-09-28 2009-04-09 Continental Automotive Gmbh Three-dimensional electronic circuit board structure, and circuit board base comprising said circuit board structure as a functional component and three-dimensional circuit assembly consisting of at least two such three-dimensional circuit board structures
US8242372B2 (en) 2009-12-23 2012-08-14 Industrial Technology Research Institute Thermally conductive, electrically insulating composite film and stack chip package structure utilizing the same
JP7057957B1 (en) 2021-07-12 2022-04-21 太陽インキ製造株式会社 Connection type three-dimensional molded circuit parts and circuit connection structure

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GB2202675A (en) * 1987-03-23 1988-09-28 Gen Hybrid Limited Semiconductor chip carriers
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WO1997029621A1 (en) * 1996-02-06 1997-08-14 Kabushiki Kaisha Toshiba Printed-circuit board and electronic apparatus provided with the same
US5994166A (en) * 1997-03-10 1999-11-30 Micron Technology, Inc. Method of constructing stacked packages

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Publication number Priority date Publication date Assignee Title
US3239719A (en) * 1963-07-08 1966-03-08 Sperry Rand Corp Packaging and circuit connection means for microelectronic circuitry
US4215359A (en) * 1977-12-13 1980-07-29 U.S. Philips Corporation Semiconductor device
GB2202675A (en) * 1987-03-23 1988-09-28 Gen Hybrid Limited Semiconductor chip carriers
DE4210400C1 (en) * 1992-03-30 1993-01-07 Siemens Ag, 8000 Muenchen, De Local copper@ deposition from organo:metallic film on substrate - by forming film from mixt. of copper acetate and copper formate in specified ratio and depositing film by laser irradiation
WO1997029621A1 (en) * 1996-02-06 1997-08-14 Kabushiki Kaisha Toshiba Printed-circuit board and electronic apparatus provided with the same
US5994166A (en) * 1997-03-10 1999-11-30 Micron Technology, Inc. Method of constructing stacked packages

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009043649A2 (en) * 2007-09-28 2009-04-09 Continental Automotive Gmbh Three-dimensional electronic circuit board structure, and circuit board base comprising said circuit board structure as a functional component and three-dimensional circuit assembly consisting of at least two such three-dimensional circuit board structures
WO2009043649A3 (en) * 2007-09-28 2009-10-29 Continental Automotive Gmbh Three-dimensional electronic circuit board structure, and circuit board base comprising said circuit board structure as a functional component and three-dimensional circuit assembly consisting of at least two such three-dimensional circuit board structures
US8242372B2 (en) 2009-12-23 2012-08-14 Industrial Technology Research Institute Thermally conductive, electrically insulating composite film and stack chip package structure utilizing the same
JP7057957B1 (en) 2021-07-12 2022-04-21 太陽インキ製造株式会社 Connection type three-dimensional molded circuit parts and circuit connection structure
JP2023011455A (en) * 2021-07-12 2023-01-24 太陽インキ製造株式会社 Connection type stereoscopic molding circuit component, and circuit connection structure

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AU2003257732A1 (en) 2004-02-25

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