WO2004053884A1 - Method for the management of writing in a memory element - Google Patents

Method for the management of writing in a memory element Download PDF

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Publication number
WO2004053884A1
WO2004053884A1 PCT/EP2003/050938 EP0350938W WO2004053884A1 WO 2004053884 A1 WO2004053884 A1 WO 2004053884A1 EP 0350938 W EP0350938 W EP 0350938W WO 2004053884 A1 WO2004053884 A1 WO 2004053884A1
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WO
WIPO (PCT)
Prior art keywords
line
cursor
writing
state
lines
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PCT/EP2003/050938
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French (fr)
Inventor
Patrick Dassier
Jérôme PAPINEAU
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Thales
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Publication of WO2004053884A1 publication Critical patent/WO2004053884A1/en

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators

Definitions

  • the invention relates to a method for managing writing in a memory operating on the principle of a turntable.
  • This principle consists in having several ordered lines in the memory and writing on a line in which the writing is the oldest. This line is called: oldest line.
  • the principle of the rotary table is, for example, used when one wishes to memorize the history of recorded events and when one has a memory with limited capacity.
  • the invention finds particular utility for memorizing events in the event of failure of on-board equipment, for example in aeronautics. More precisely, in a particular piece of equipment such as a combined standby instrument grouping together the functions of altimeter, tachometer and artificial horizon, it is necessary, in the event of a failure of the instrument, to memorize at the time of the breakdown, the whole of the parameters it displays. It is also necessary to memorize the history of failures, for example the last 30 failures. To do this, it is possible to provide a memory comprising at least 30 lines, each assigned to memorizing the parameters of the instrument for a fault.
  • the lines of the memory are ordered so that the parameters relating to the first failure are memorized on the first line and so on until the parameters relating to the thirtieth failure which are memorized on the thirtieth line. Then, and in order to keep the history of the last thirty faults, the parameters relating to the thirty-first fault are stored on the first line to replace the parameters already written on the first line. For each subsequent failure, these parameters are stored in replacement of those relating to the oldest failure stored in the table.
  • the subject of the invention is a method for managing the writing in a memory having several ordered lines, the writing being done on the oldest line, characterized in that each line comprises a cursor not comprising only one bit, in that the state of the cursor is reversed with each writing on the corresponding line, in that the location of the oldest line is done by reading in the order of the lines, the cursor of each line, the oldest line comprising the first cursor whose state differs from that of the first line.
  • the method of the invention makes it possible to reduce the size of a memory used as a turntable and, consequently, its price.
  • the invention finds particular but not exclusive utility for a type of memory commonly used to produce a turntable in the event of failure of an aeronautical equipment. It is an electrically erasable programmable read-only memory better known by the name of EEPROM, name resulting from the Anglo-Saxon abbreviation of: "Electrical Erasable Programmable Read Only Memory”.
  • EEPROM electrically erasable programmable read-only memory
  • This type of memory has a price which is highly proportional to its size and has a limited lifetime in number of writes. For this type of memory, we understand the advantage of limiting both the size and also the number of writes.
  • FIG. 1 shows the principle of the invention applied to a table of eight rows;
  • FIG. 2 shows an improvement of the principle set out with the help of Figure 1, improvement for which the invalid lines are eliminated.
  • FIG. 1 represents a memory partitioned into eight lines L1 to L8. It is understood that the invention is not limited to eight lines and that it can be implemented regardless of the number of lines.
  • Each line has a bit location reserved for a cursor. In FIG. 1, only the state 0 or 1 of the cursor has been represented on each line L1 to L8. The other bits of each line can receive useful information relating to events to be stored.
  • the writing of useful information in the memory is done by line and the state of the cursor of the line in which the writing is done is reversed at the time of writing of the useful information. In a rotary table operation, the writing is done on the oldest line and before writing, the location of this line is done by reading in the order of the lines, the cursor of each line. The oldest line is the one with the first cursor, in line order, whose state differs from that of the first line.
  • the state of the cursor has been represented at four different times T1 to T4 given by way of example.
  • the instant T1 can represent an initial instant when no writing has been done in the memory.
  • the instant T1 can also follow a write in the last line L8 of the memory.
  • the state of all the cursors is identical, during the identification phase of the oldest line, the writing is done on the first line L1.
  • the cursors of lines L1 to L3 are in state 0 and the cursors of lines L4 to L8 are in state 1.
  • the oldest line is line L4 because the state of its cursor differs from that of the previous line L3.
  • the invention can be expressed as follows: the writing is done on the line for which a front has been detected, in the state of the cursor.
  • a front as being a change of state either from 0 to 1, or from 1 to 0.
  • all the cursors are at state 1 and the location of the oldest line is done by the same way as for now T1.
  • the oldest line is line L1.
  • FIG. 2 represents the same memory as that represented in FIG. 1, that is to say a memory comprising eight lines L1 to L8.
  • FIG. 2 makes it possible to understand an advantageous variant of the method described using FIG. 1.
  • the validity of each line is determined and the cursor is only read for valid lines. More precisely to determine the validity of a line, when writing on the line considered, a first sum of all the bits to be written on the line is calculated and this first sum is written in a location on the line reserved for this effect.
  • the cursors of lines L2 and L3 are in state 0 and the cursors of lines L6 to L8 are in state 1.
  • the state of the cursors of the other lines, L1, L4 and L5 is indifferent in the search for the oldest line.
  • the detection of an edge in the cursor state is done on line L6 which is the oldest line.
  • the cursors of lines L2 and L3 are in state 1 and the cursors of lines L6 to L8 are in state 0.
  • the state of the cursors of other lines, L1, L4 and L5 is indifferent in the search for the line most Ancient.
  • the detection of an edge in the cursor state is done on line L6 which is the oldest line.

Abstract

The invention relates to a method for the management of writing in a memory element operating on the principle of a turn table, whereby the writing is produced on the oldest line. The memory element comprises several lines (L1 to L8) and each line comprises a cursor containing one bit. The state of the cursor is reversed each time writing is produced on the corresponding line. The oldest line is located by reading the cursor of each line in the correct line order, the oldest line containing the first cursor having a state different to that of the first line (L1; L2). Preferably, the validity of each line (L1 to L8) is determined and the cursor is only read for valid lines (L2, L3, L6, L7, L8). The invention is particularly suitable for an E.E.P.R.O.M.-type memory element.

Description

PROCEDE DE GESTION DE L'ECRITURE DANS UNE MEMOIRE METHOD FOR MANAGING THE WRITE IN A MEMORY
L'invention se rapporte à un procédé de gestion de l'écriture dans une mémoire fonctionnant sur le principe d'une table tournante. Ce principe consiste à disposer de plusieurs lignes ordonnées dans la mémoire et d'écrire sur une ligne dans laquelle l'écriture est la plus ancienne. Cette ligne est dite : ligne la plus ancienne. Le principe de la table tournante est, par exemple, utilisé lorsqu'on souhaite mémoriser l'historique d'événements enregistrés et que l'on dispose d'une mémoire à capacité limitée.The invention relates to a method for managing writing in a memory operating on the principle of a turntable. This principle consists in having several ordered lines in the memory and writing on a line in which the writing is the oldest. This line is called: oldest line. The principle of the rotary table is, for example, used when one wishes to memorize the history of recorded events and when one has a memory with limited capacity.
L'invention trouve une utilité particulière pour la mémorisation d'événement en cas de panne d'un équipement embarqué par exemple en aéronautique. Plus précisément, dans un équipement particulier comme un instrument combiné de secours regroupant les fonctions d'altimètre, de tachymètre et horizon artificiel, il est nécessaire, en cas de panne de l'instrument, de mémoriser au moment de la panne, l'ensemble des paramètres qu'il affiche. II est également nécessaire de mémoriser l'historique des pannes, par exemple les 30 dernières pannes. Pour ce faire, on peut prévoir une mémoire comportant au moins 30 lignes, chacune affectée à la mémorisation des paramètres de l'instrument pour une panne. Les lignes de la mémoire sont ordonnées de telle sorte que les paramètres relatifs à la première panne se mémorisent sur la première ligne et ainsi de suite jusqu'aux paramètres relatifs à la trentième panne qui se mémorisent sur la trentième ligne. Ensuite, et afin de conserver l'historique des trente dernières pannes, les paramètres relatifs à la trente et unième panne se mémorisent sur la première ligne en remplacement des paramètres déjà inscrits sur la première ligne. Pour chaque panne suivante, on mémorise ces paramètres en remplacement de ceux relatifs à la plus ancienne panne mémorisée dans la table.The invention finds particular utility for memorizing events in the event of failure of on-board equipment, for example in aeronautics. More precisely, in a particular piece of equipment such as a combined standby instrument grouping together the functions of altimeter, tachometer and artificial horizon, it is necessary, in the event of a failure of the instrument, to memorize at the time of the breakdown, the whole of the parameters it displays. It is also necessary to memorize the history of failures, for example the last 30 failures. To do this, it is possible to provide a memory comprising at least 30 lines, each assigned to memorizing the parameters of the instrument for a fault. The lines of the memory are ordered so that the parameters relating to the first failure are memorized on the first line and so on until the parameters relating to the thirtieth failure which are memorized on the thirtieth line. Then, and in order to keep the history of the last thirty faults, the parameters relating to the thirty-first fault are stored on the first line to replace the parameters already written on the first line. For each subsequent failure, these parameters are stored in replacement of those relating to the oldest failure stored in the table.
Pour gérer ce type de table tournante, on utilise généralement un compteur utilisant plusieurs bits, par exemple un mot de 32 bits de chaque ligne. On inscrit dans ce compteur le numéro d'ordre de la panne, ou plus généralement de l'événement, à enregistrer. Lorsque la panne suivante se produit, on recherche dans le compteur la valeur la plus grande et on enregistre sur la ligne suivante le numéro d'ordre et les paramètres relatifs à cette nouvelle panne. Ce procédé impose un espace important de la mémoire réservé au compteur et, par conséquent, une quantité importante d'informations non utiles à écrire pour chaque panne.To manage this type of turntable, we generally use a counter using several bits, for example a 32-bit word of each line. The serial number of the fault, or more generally of the event, to be recorded is entered in this counter. When the next failure occurs, the largest value is looked up in the counter and the serial number and the parameters relating to this new failure are recorded on the next line. This process requires a large space of the memory reserved for the counter and, consequently, a large quantity of information not useful to write for each failure.
L'invention propose de pallier ces difficultés en proposant un procédé n'utilisant qu'un seul bit pour assurer le repérage de l'événement le plus ancien. A cet effet, l'invention a pour objet un procédé de gestion de l'écriture dans une mémoire disposant de plusieurs lignes ordonnées, l'écriture se faisant sur la ligne la plus ancienne, caractérisé en ce que chaque ligne comporte un curseur ne comprenant qu'un seul bit, en ce que l'état du curseur est inversé à chaque écriture sur la ligne correspondante, en ce que le repérage de la ligne la plus ancienne se fait en lisant dans l'ordre des lignes, le curseur de chaque ligne, la ligne la plus ancienne comportant le premier curseur dont l'état diffère de celui de la première ligne.The invention proposes to overcome these difficulties by proposing a method using only one bit to ensure the location of the oldest event. To this end, the subject of the invention is a method for managing the writing in a memory having several ordered lines, the writing being done on the oldest line, characterized in that each line comprises a cursor not comprising only one bit, in that the state of the cursor is reversed with each writing on the corresponding line, in that the location of the oldest line is done by reading in the order of the lines, the cursor of each line, the oldest line comprising the first cursor whose state differs from that of the first line.
Le procédé de l'invention permet de réduire la taille d'une mémoire utilisée comme table tournante et, par conséquent, son prix. L'invention trouve une utilité particulière mais non exclusive pour un type de mémoire couramment utilisée pour réaliser une table tournante en cas de panne d'un équipement aéronautique. II s'agit de mémoire en lecture seule programmable et effaçable électriquement mieux connue sous le nom de EEPROM, nom issu de l'abréviation anglo-saxonne de : « Electrical Erasable Programmable Read Only Memory ». Ce type de mémoire a un prix qui est fortement proportionnel à sa taille et a une durée de vie limitée en nombre d'écriture. Pour ce type de mémoire, on comprend l'intérêt de limiter à la fois la taille et aussi le nombre d'écritures.The method of the invention makes it possible to reduce the size of a memory used as a turntable and, consequently, its price. The invention finds particular but not exclusive utility for a type of memory commonly used to produce a turntable in the event of failure of an aeronautical equipment. It is an electrically erasable programmable read-only memory better known by the name of EEPROM, name resulting from the Anglo-Saxon abbreviation of: "Electrical Erasable Programmable Read Only Memory". This type of memory has a price which is highly proportional to its size and has a limited lifetime in number of writes. For this type of memory, we understand the advantage of limiting both the size and also the number of writes.
L'invention sera mieux comprise et d'autres avantages apparaîtront à la lecture de la description détaillée d'un mode de réalisation, description illustrée par le dessin joint dans lequel :The invention will be better understood and other advantages will appear on reading the detailed description of an embodiment, description illustrated by the attached drawing in which:
- la figure 1 représente le principe de l'invention appliqué à une table de huit lignes ; - la figure 2 représente une amélioration du principe exposé à l'aide de la figure 1 , amélioration pour laquelle on élimine les lignes invalides.- Figure 1 shows the principle of the invention applied to a table of eight rows; - Figure 2 shows an improvement of the principle set out with the help of Figure 1, improvement for which the invalid lines are eliminated.
La figure 1 représente une mémoire partitionnée en huit lignes L1 à L8. II est bien entendu que l'invention n'est pas limitée à huit lignes et qu'elle peut être mise en œuvre quel que soit le nombre de lignes. Chaque ligne comporte un emplacement d'un bit réservé à un curseur. Sur la figure 1 , seul l'état 0 ou 1 du curseur a été représenté sur chaque ligne L1 à L8. Les autres bits de chaque ligne peuvent recevoir des informations utiles relatives à des événements à mémoriser. L'écriture dans la mémoire des informations utiles se fait par ligne et l'état du curseur de la ligne dans laquelle l'écriture se fait est inversé au moment de l'écriture des informations utiles. Dans un fonctionnement en table tournante, l'écriture se fait sur la ligne la plus ancienne et avant l'écriture, le repérage de cette ligne se fait en lisant dans l'ordre des lignes, le curseur de chaque ligne. La ligne la plus ancienne est celle qui comporte le premier curseur, dans l'ordre des lignes, dont l'état diffère de celui de la première ligne.FIG. 1 represents a memory partitioned into eight lines L1 to L8. It is understood that the invention is not limited to eight lines and that it can be implemented regardless of the number of lines. Each line has a bit location reserved for a cursor. In FIG. 1, only the state 0 or 1 of the cursor has been represented on each line L1 to L8. The other bits of each line can receive useful information relating to events to be stored. The writing of useful information in the memory is done by line and the state of the cursor of the line in which the writing is done is reversed at the time of writing of the useful information. In a rotary table operation, the writing is done on the oldest line and before writing, the location of this line is done by reading in the order of the lines, the cursor of each line. The oldest line is the one with the first cursor, in line order, whose state differs from that of the first line.
Sur la figure 1 , l'état du curseur a été représenté à quatre instants différents T1 à T4 donnés à titre d'exemple.In FIG. 1, the state of the cursor has been represented at four different times T1 to T4 given by way of example.
Au premier instant T1, tous les curseurs sont à l'état 0. L'instant T1 peut représenter un instant initial où aucune écriture n'a été faite dans la mémoire. L'instant T1 peut également suivre une écriture dans la dernière ligne L8 de la mémoire. Lorsque l'état de tous les curseurs est identique, lors de la phase de repérage de la ligne la plus ancienne, l'écriture se fait sur la première ligne L1. A l'instant T2, les curseurs des lignes L1 à L3 sont à l'état 0 et les curseurs des lignes L4 à L8 sont à l'état 1. La ligne la plus ancienne est la ligne L4 car l'état de son curseur diffère de celui de la ligne précédente L3.At the first instant T1, all the cursors are at state 0. The instant T1 can represent an initial instant when no writing has been done in the memory. The instant T1 can also follow a write in the last line L8 of the memory. When the state of all the cursors is identical, during the identification phase of the oldest line, the writing is done on the first line L1. At time T2, the cursors of lines L1 to L3 are in state 0 and the cursors of lines L4 to L8 are in state 1. The oldest line is line L4 because the state of its cursor differs from that of the previous line L3.
A l'instant T3, les curseurs des lignes L1 à L5 ont à l'état 1 et les curseurs des lignes L6 à L8 sont à l'état 0. La ligne la plus ancienne est la ligne L6 car l'état de son curseur diffère de celui de la ligne précédente L5.At the moment T3, the cursors of lines L1 to L5 have state 1 and the cursors of lines L6 to L8 are in state 0. The oldest line is line L6 because the state of its cursor differs from that of the previous line L5.
A partir des deux instants T2 et T3, on peut exprimer l'invention de la façon suivante : l'écriture se fait sur la ligne pour laquelle on a détecté un front, dans l'état du curseur. On définit un front comme étant un changement d'état soit de 0 à 1, soit de 1 à 0. A l'instant T4, tous les curseurs sont à l'état 1 et le repérage de la ligne la plus ancienne se fait de la même façon que pour l'instant T1. La ligne la plus ancienne est la ligne L1.From the two instants T2 and T3, the invention can be expressed as follows: the writing is done on the line for which a front has been detected, in the state of the cursor. We define a front as being a change of state either from 0 to 1, or from 1 to 0. At time T4, all the cursors are at state 1 and the location of the oldest line is done by the same way as for now T1. The oldest line is line L1.
La figure 2 représente la même mémoire que celle représentée sur la figure 1, c'est-à-dire une mémoire comportant huit lignes L1 à L8. La figure 2 permet de comprendre une variante avantageuse du procédé décrit à l'aide de la figure 1. Dans cette variante, on détermine la validité de chaque ligne et on ne lit le curseur que pour des lignes valides. Plus précisément pour déterminer la validité d'une ligne, lors de l'écriture sur la ligne considérée, on calcule une première somme de tous les bits à écrire sur la ligne et on écrit cette première somme dans un emplacement de la ligne réservé à cet effet. Plus tard, lorsqu'on cherche à déterminer la validité d'une ligne, on calcule une seconde somme de tous les bits écrits de la ligne, on compare la seconde somme à celle écrite dans l'emplacement réservé, on déclare valide une ligne pour laquelle le résultat de la comparaison est exact et on déclare invalide une ligne pour laquelle le résultat de la comparaison est faux. Ainsi, si l'écriture sur la ligne ne s'est pas fait correctement, par exemple pour un bit restant bloqué à un état inverse de l'état souhaité, la somme calculée lors de la détermination de la validité sera différente de celle écrite dans l'emplacement réservé et la ligne sera déclarée invalide et on ne tiendra pas compte du curseur de cette ligne pour la détermination de la ligne la plus ancienne. D'autres procédés de détermination de la validité sont utilisables comme par exemple un procédé utilisant un code de redondance cyclique. Sur la figure 2, les lignes L1, L4 et L5 sont déclarées invalides. Le repérage de la ligne la plus ancienne ne se fait que sur les lignes déclarées valides, c'est-à-dire les lignes L2, L3, L6, L7, L8 dont on analyse dans Tordre l'état du curseur.FIG. 2 represents the same memory as that represented in FIG. 1, that is to say a memory comprising eight lines L1 to L8. FIG. 2 makes it possible to understand an advantageous variant of the method described using FIG. 1. In this variant, the validity of each line is determined and the cursor is only read for valid lines. More precisely to determine the validity of a line, when writing on the line considered, a first sum of all the bits to be written on the line is calculated and this first sum is written in a location on the line reserved for this effect. Later, when we try to determine the validity of a line, we calculate a second sum of all the written bits of the line, we compare the second sum to that written in the reserved space, we declare a line valid for which the result of the comparison is exact and a line is declared invalid for which the result of the comparison is false. Thus, if the writing on the line was not done correctly, for example for a bit remaining blocked in a state opposite to the desired state, the sum calculated during the determination of the validity will be different from that written in the reserved space and the line will be declared invalid and the cursor of this line will not be taken into account for the determination of the oldest line. Other methods of determining the validity can be used, for example a method using a cyclic redundancy code. In Figure 2, lines L1, L4 and L5 are declared invalid. The location of the oldest line is only done on the lines declared valid, that is to say the lines L2, L3, L6, L7, L8, the state of the cursor of which is analyzed in order.
Par exemple, à l'instant T5, seul le curseur de la ligne L4 est à l'état 1. Le repérage de la ligne la plus ancienne commence par l'analyse du curseur de la ligne L2 puisque la ligne L1 est déclarée invalide. Le repérage se poursuit, dans Tordre, par les curseurs des lignes L3, L6, L7 et L8. Ne trouvant aucun curseur dont l'état est différent de celui de la première ligne déclarée valide, c'est-à-dire la ligne L2, on écrit sur la ligne L2.For example, at time T5, only the cursor of line L4 is at state 1. The location of the oldest line begins with the analysis of the cursor of line L2 since line L1 is declared invalid. The tracking continues, in order, with the cursors of lines L3, L6, L7 and L8. Finding no cursor whose state is different from that of the first line declared valid, that is to say the line L2, we write on the line L2.
Autre exemple, à l'instant T6, les curseurs des lignes L2 et L3 sont à l'état 0 et les curseurs des lignes L6 à L8 sont à l'état 1. L'état des curseurs des autres lignes, L1 , L4 et L5 est indifférent dans la recherche de la ligne la plus ancienne. La détection d'un front dans l'état du curseur se fait sur la ligne L6 qui est la ligne la plus ancienne.Another example, at time T6, the cursors of lines L2 and L3 are in state 0 and the cursors of lines L6 to L8 are in state 1. The state of the cursors of the other lines, L1, L4 and L5 is indifferent in the search for the oldest line. The detection of an edge in the cursor state is done on line L6 which is the oldest line.
A l'instant T7, les curseurs des lignes L2 et L3 sont à l'état 1 et les curseurs des lignes L6 à L8 sont à l'état 0. L'état des curseurs des autres lignes, L1, L4 et L5 est indifférent dans la recherche de la ligne la plus ancienne. La détection d'un front dans l'état du curseur se fait sur la ligne L6 qui est la ligne la plus ancienne.At time T7, the cursors of lines L2 and L3 are in state 1 and the cursors of lines L6 to L8 are in state 0. The state of the cursors of other lines, L1, L4 and L5 is indifferent in the search for the line most Ancient. The detection of an edge in the cursor state is done on line L6 which is the oldest line.
Enfin, à Tinstant T8, tous les curseurs des lignes déclarées valides sont à l'état 1 et comme pour Tinstant T5, on écrit sur la ligne L2. Finally, at Tinstant T8, all the cursors of the lines declared valid are in state 1 and as for Tinstant T5, we write on line L2.

Claims

REVENDICATIONS
1. Procédé de gestion de l'écriture dans une mémoire disposant de plusieurs lignes ordonnées (L1 à L8), l'écriture se faisant sur la ligne la plus ancienne, caractérisé en ce que chaque ligne comporte un curseur ne comprenant qu'un seul bit, en ce que l'état du curseur est inversé à chaque écriture sur la ligne correspondante, en ce que le repérage de la ligne la plus ancienne se fait en lisant dans Tordre des lignes, le curseur de chaque ligne, la ligne la plus ancienne comportant le premier curseur dont l'état diffère de celui de la première ligne (L1 ; L2).1. A method of managing writing in a memory having several ordered lines (L1 to L8), the writing being done on the oldest line, characterized in that each line comprises a cursor comprising only one bit, in that the state of the cursor is reversed with each writing on the corresponding line, in that the location of the oldest line is done by reading in the order of the lines, the cursor of each line, the most old with the first cursor whose state differs from that of the first line (L1; L2).
2. Procédé selon la revendication 1 , caractérisé en ce que si l'état de tous les curseurs est identique, lors de la phase de repérage de la ligne la plus ancienne, l'écriture se fait sur la première ligne (L1 ; L2).2. Method according to claim 1, characterized in that if the state of all the cursors is identical, during the phase of locating the oldest line, the writing is done on the first line (L1; L2) .
3. Procédé selon Tune des revendications précédentes, caractérisé en ce qu'on détermine la validité de chaque ligne (L1 à L8) et on ne lit le curseur que pour des lignes valides (L2, L3, L6, L7, L8).3. Method according to one of the preceding claims, characterized in that the validity of each line is determined (L1 to L8) and the cursor is only read for valid lines (L2, L3, L6, L7, L8).
4. Procédé selon la revendication 3, caractérisé en ce que, lors de l'écriture sur une ligne, on calcule une première somme de tous les bits à écrire sur la ligne, on écrit la première somme dans un emplacement réservé de la ligne, et en ce que, pour déterminer la validité de chaque ligne (L1 à L8), on calcule une seconde somme de tous les bits écrits de la ligne, on compare la seconde somme à celle écrite dans l'emplacement réservé, on déclare valide une ligne pour laquelle le résultat de la comparaison est exact et on déclare invalide une ligne pour laquelle le résultat de la comparaison est faux.4. Method according to claim 3, characterized in that, when writing on a line, a first sum of all the bits to be written on the line is calculated, the first sum is written in a reserved location on the line, and in that, to determine the validity of each line (L1 to L8), a second sum of all the written bits of the line is calculated, the second sum is compared with that written in the reserved space, a valid declaration is made line for which the comparison result is correct and a line for which the comparison result is false is declared invalid.
5. Procédé selon Tune des revendications précédentes, caractérisé en ce que la mémoire est de type E.E.P.R.O.M. 5. Method according to one of the preceding claims, characterized in that the memory is of type E.E.P.R.O.M.
PCT/EP2003/050938 2002-12-06 2003-12-03 Method for the management of writing in a memory element WO2004053884A1 (en)

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FR0215482A FR2848327B1 (en) 2002-12-06 2002-12-06 METHOD OF MANAGING WRITING IN A MEMORY
FR0215482 2002-12-06

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4095283A (en) * 1976-07-02 1978-06-13 International Business Machines Corporation First in-first out memory array containing special bits for replacement addressing
EP0398545A1 (en) * 1989-05-19 1990-11-22 Delco Electronics Corporation Method and apparatus for storing data in a non-volatile memory
FR2742893A1 (en) * 1995-12-20 1997-06-27 Schlumberger Ind Sa Writing to re-writable memory e.g. memory card, smart card or non-contact card
WO2000068794A1 (en) * 1999-05-07 2000-11-16 Giesecke & Devrient Gmbh Process for the secure writing of a pointer for a circular memory
US6351752B1 (en) * 1998-07-08 2002-02-26 Ncr Corporation Method and apparatus for detecting changes to a collection of objects
US20020049950A1 (en) * 2000-10-19 2002-04-25 Loaiza Juan R. Data integrity verification mechanism
JP2002334024A (en) * 2001-05-11 2002-11-22 Denso Corp Electronic controller

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4095283A (en) * 1976-07-02 1978-06-13 International Business Machines Corporation First in-first out memory array containing special bits for replacement addressing
EP0398545A1 (en) * 1989-05-19 1990-11-22 Delco Electronics Corporation Method and apparatus for storing data in a non-volatile memory
FR2742893A1 (en) * 1995-12-20 1997-06-27 Schlumberger Ind Sa Writing to re-writable memory e.g. memory card, smart card or non-contact card
US6351752B1 (en) * 1998-07-08 2002-02-26 Ncr Corporation Method and apparatus for detecting changes to a collection of objects
WO2000068794A1 (en) * 1999-05-07 2000-11-16 Giesecke & Devrient Gmbh Process for the secure writing of a pointer for a circular memory
US20020049950A1 (en) * 2000-10-19 2002-04-25 Loaiza Juan R. Data integrity verification mechanism
JP2002334024A (en) * 2001-05-11 2002-11-22 Denso Corp Electronic controller

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 2003, no. 03 5 May 2003 (2003-05-05) *

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FR2848327A1 (en) 2004-06-11

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