WO2004064025A3 - Cmos active pixel with hard and soft reset - Google Patents

Cmos active pixel with hard and soft reset Download PDF

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Publication number
WO2004064025A3
WO2004064025A3 PCT/US2004/000153 US2004000153W WO2004064025A3 WO 2004064025 A3 WO2004064025 A3 WO 2004064025A3 US 2004000153 W US2004000153 W US 2004000153W WO 2004064025 A3 WO2004064025 A3 WO 2004064025A3
Authority
WO
WIPO (PCT)
Prior art keywords
voltage
column
pixel
row line
reset
Prior art date
Application number
PCT/US2004/000153
Other languages
French (fr)
Other versions
WO2004064025A2 (en
Inventor
Hae-Seung Lee
Keith G Fife
Lane Gearle Brooks
Jungwook Yang
Original Assignee
Smal Camera Technologies
Hae-Seung Lee
Keith G Fife
Lane Gearle Brooks
Jungwook Yang
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Smal Camera Technologies, Hae-Seung Lee, Keith G Fife, Lane Gearle Brooks, Jungwook Yang filed Critical Smal Camera Technologies
Priority to DE602004020444T priority Critical patent/DE602004020444D1/en
Priority to EP04700377A priority patent/EP1582054B1/en
Publication of WO2004064025A2 publication Critical patent/WO2004064025A2/en
Publication of WO2004064025A3 publication Critical patent/WO2004064025A3/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/62Detection or reduction of noise due to excess charges produced by the exposure, e.g. smear, blooming, ghost image, crosstalk or leakage between pixels
    • H04N25/626Reduction of noise due to residual charges remaining after image readout, e.g. to remove ghost images or afterimages
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/65Noise processing, e.g. detecting, correcting, reducing or removing noise applied to reset noise, e.g. KTC noise related to CMOS structures by techniques other than CDS
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/709Circuitry for control of the power supply
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

Abstract

A circuit for a pixel site in an imaging array includes a pixel (11 of Figure 7) to convert incident light to an electrical signal; a column or row line (23 of Figure 7) to read out a voltage from the pixel; a column or row line transistor (225 of Figure 7), operatively connected between one end of the column or row line and a predetermined voltage, to reset a voltage associated with the column or row line; and a reset voltage generator (2150 of Figure 7), operatively connected to the column or row line transistor, to generate reset pulses. The reset voltage generator (2150 of Figure 7) generates a first reset pulse at a beginning of an integration period of the pixel. The reset voltage generator (2150 of Figure 7) generates a second reset pulse after generating the first reset pulse, the generation of the second reset pulse being at an end of the integration period of the pixel. A pixel voltage of a column or row line is measured by hard resetting the column or row line voltage to a first predetermined voltage; soft resetting the column or row line voltage to a first pixel voltage; hard resetting the column or row line voltage to a second predetermined voltage; soft resetting the column or row line voltage to a second pixel voltage; and determining a difference between the first and second pixel voltages, the difference being the measured pixel voltage.
PCT/US2004/000153 2003-01-08 2004-01-06 Cmos active pixel with hard and soft reset WO2004064025A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE602004020444T DE602004020444D1 (en) 2003-01-08 2004-01-06 ACTIVE CMOS PIXEL WITH HARD AND SOFT RESET
EP04700377A EP1582054B1 (en) 2003-01-08 2004-01-06 Cmos active pixel with hard and soft reset

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US43869903P 2003-01-08 2003-01-08
US60/438,699 2003-01-08

Publications (2)

Publication Number Publication Date
WO2004064025A2 WO2004064025A2 (en) 2004-07-29
WO2004064025A3 true WO2004064025A3 (en) 2004-10-07

Family

ID=32713368

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/000153 WO2004064025A2 (en) 2003-01-08 2004-01-06 Cmos active pixel with hard and soft reset

Country Status (5)

Country Link
US (3) US7446805B2 (en)
EP (1) EP1582054B1 (en)
AT (1) ATE428266T1 (en)
DE (1) DE602004020444D1 (en)
WO (1) WO2004064025A2 (en)

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JP5601001B2 (en) * 2010-03-31 2014-10-08 ソニー株式会社 Solid-state imaging device, driving method, and electronic apparatus
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Also Published As

Publication number Publication date
EP1582054B1 (en) 2009-04-08
US7489355B2 (en) 2009-02-10
DE602004020444D1 (en) 2009-05-20
WO2004064025A2 (en) 2004-07-29
ATE428266T1 (en) 2009-04-15
US20040174450A1 (en) 2004-09-09
US20040174449A1 (en) 2004-09-09
US7489354B2 (en) 2009-02-10
US20050083422A1 (en) 2005-04-21
US7446805B2 (en) 2008-11-04
EP1582054A2 (en) 2005-10-05

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