WO2004066356A3 - Structures, materials and methods for fabrication of nanostructures by transposed split of ion cut materials - Google Patents

Structures, materials and methods for fabrication of nanostructures by transposed split of ion cut materials Download PDF

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Publication number
WO2004066356A3
WO2004066356A3 PCT/US2004/001638 US2004001638W WO2004066356A3 WO 2004066356 A3 WO2004066356 A3 WO 2004066356A3 US 2004001638 W US2004001638 W US 2004001638W WO 2004066356 A3 WO2004066356 A3 WO 2004066356A3
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WO
WIPO (PCT)
Prior art keywords
layer
materials
transposed
device layer
structures
Prior art date
Application number
PCT/US2004/001638
Other languages
French (fr)
Other versions
WO2004066356A2 (en
Inventor
Robert W Bower
Original Assignee
Robert W Bower
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert W Bower filed Critical Robert W Bower
Publication of WO2004066356A2 publication Critical patent/WO2004066356A2/en
Publication of WO2004066356A3 publication Critical patent/WO2004066356A3/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

Abstract

Structures, materials and methods for resolving forward implantation skew in the transposed splitting of ion cut materials. By way of example a 'material X' is described, such as in the form of a wafer or substrate, having a low resistivity device layer within which nanodevices can be fabricated, an insulation layer, a hydrogen getter layer (e.g., heavily doped region), and a diffusion layer. Devices fabricated in the device layer can be transferred by bonding the surface of the device layer to a target material and then injecting and diffusing hydrogen from the backside of material X through the diffusion layer to the hydrogen getter layer to form a weakened plane. A splitting process then separates the device layer from the remainder of the substrate. A method is also described for thermally isolating a device layer stack, or other target, from a heated diffusion layer when diffusing hydrogen to form the weakened plane.
PCT/US2004/001638 2003-01-22 2004-01-21 Structures, materials and methods for fabrication of nanostructures by transposed split of ion cut materials WO2004066356A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US44201203P 2003-01-22 2003-01-22
US60/442,012 2003-01-22

Publications (2)

Publication Number Publication Date
WO2004066356A2 WO2004066356A2 (en) 2004-08-05
WO2004066356A3 true WO2004066356A3 (en) 2005-06-09

Family

ID=32772005

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/001638 WO2004066356A2 (en) 2003-01-22 2004-01-21 Structures, materials and methods for fabrication of nanostructures by transposed split of ion cut materials

Country Status (1)

Country Link
WO (1) WO2004066356A2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6346459B1 (en) * 1999-02-05 2002-02-12 Silicon Wafer Technologies, Inc. Process for lift off and transfer of semiconductor devices onto an alien substrate
US6387829B1 (en) * 1999-06-18 2002-05-14 Silicon Wafer Technologies, Inc. Separation process for silicon-on-insulator wafer fabrication

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6346459B1 (en) * 1999-02-05 2002-02-12 Silicon Wafer Technologies, Inc. Process for lift off and transfer of semiconductor devices onto an alien substrate
US6387829B1 (en) * 1999-06-18 2002-05-14 Silicon Wafer Technologies, Inc. Separation process for silicon-on-insulator wafer fabrication

Also Published As

Publication number Publication date
WO2004066356A2 (en) 2004-08-05

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