WO2005015414A3 - Adaptive bandwidth allocation over a heterogeneous system - Google Patents

Adaptive bandwidth allocation over a heterogeneous system Download PDF

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Publication number
WO2005015414A3
WO2005015414A3 PCT/US2004/025533 US2004025533W WO2005015414A3 WO 2005015414 A3 WO2005015414 A3 WO 2005015414A3 US 2004025533 W US2004025533 W US 2004025533W WO 2005015414 A3 WO2005015414 A3 WO 2005015414A3
Authority
WO
WIPO (PCT)
Prior art keywords
bandwidth allocation
heterogeneous system
adaptive bandwidth
allocation over
module
Prior art date
Application number
PCT/US2004/025533
Other languages
French (fr)
Other versions
WO2005015414A2 (en
Inventor
John Yuan
Original Assignee
Visionflow Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Visionflow Inc filed Critical Visionflow Inc
Publication of WO2005015414A2 publication Critical patent/WO2005015414A2/en
Publication of WO2005015414A3 publication Critical patent/WO2005015414A3/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation

Abstract

A scheduling system comprises at least one bus master, an isochronous channel designation and usage module, a priority scheme for random users module, a bus/bridge operation status module, and a scheduler operably coupled to the at least one bus master and to the modules.
PCT/US2004/025533 2003-08-08 2004-08-06 Adaptive bandwidth allocation over a heterogeneous system WO2005015414A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US49350903P 2003-08-08 2003-08-08
US60/493,509 2003-08-08

Publications (2)

Publication Number Publication Date
WO2005015414A2 WO2005015414A2 (en) 2005-02-17
WO2005015414A3 true WO2005015414A3 (en) 2005-04-14

Family

ID=34135255

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/025533 WO2005015414A2 (en) 2003-08-08 2004-08-06 Adaptive bandwidth allocation over a heterogeneous system

Country Status (1)

Country Link
WO (1) WO2005015414A2 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6061802A (en) * 1998-07-02 2000-05-09 Advanced Micro Devices, Inc. Software based clock synchronization
EP1102171A2 (en) * 1999-11-22 2001-05-23 Texas Instruments Incorporated Universal serial bus network peripheral device
US20020181500A1 (en) * 1996-07-04 2002-12-05 Hitachi, Ltd. Packet communication method and apparatus and a recording medium storing a packet communication program
US6587477B1 (en) * 1995-04-28 2003-07-01 Matsushita Electric Industrial Co., Ltd. Data transmitting apparatus, data receiving apparatus and data transmission control apparatus

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6587477B1 (en) * 1995-04-28 2003-07-01 Matsushita Electric Industrial Co., Ltd. Data transmitting apparatus, data receiving apparatus and data transmission control apparatus
US20020181500A1 (en) * 1996-07-04 2002-12-05 Hitachi, Ltd. Packet communication method and apparatus and a recording medium storing a packet communication program
US6061802A (en) * 1998-07-02 2000-05-09 Advanced Micro Devices, Inc. Software based clock synchronization
EP1102171A2 (en) * 1999-11-22 2001-05-23 Texas Instruments Incorporated Universal serial bus network peripheral device

Also Published As

Publication number Publication date
WO2005015414A2 (en) 2005-02-17

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