WO2005041206A8 - Method, system and circuit for programming a non-volatile memory array - Google Patents
Method, system and circuit for programming a non-volatile memory arrayInfo
- Publication number
- WO2005041206A8 WO2005041206A8 PCT/IL2004/000981 IL2004000981W WO2005041206A8 WO 2005041206 A8 WO2005041206 A8 WO 2005041206A8 IL 2004000981 W IL2004000981 W IL 2004000981W WO 2005041206 A8 WO2005041206 A8 WO 2005041206A8
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- cells
- programming
- circuit
- volatile memory
- nvm
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5671—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge trapping in an insulator
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
Abstract
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP04791843A EP1683159A4 (en) | 2003-10-29 | 2004-10-27 | Method, system and circuit for programming a non-volatile memory array |
JP2006537552A JP2007510252A (en) | 2003-10-29 | 2004-10-27 | Method, system and circuit for programming a non-volatile memory array |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/695,449 US7136304B2 (en) | 2002-10-29 | 2003-10-29 | Method, system and circuit for programming a non-volatile memory array |
US10/695,449 | 2003-10-29 |
Publications (3)
Publication Number | Publication Date |
---|---|
WO2005041206A2 WO2005041206A2 (en) | 2005-05-06 |
WO2005041206A3 WO2005041206A3 (en) | 2005-06-02 |
WO2005041206A8 true WO2005041206A8 (en) | 2005-06-30 |
Family
ID=34522797
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IL2004/000981 WO2005041206A2 (en) | 2003-10-29 | 2004-10-27 | Method, system and circuit for programming a non-volatile memory array |
Country Status (6)
Country | Link |
---|---|
US (2) | US7136304B2 (en) |
EP (1) | EP1683159A4 (en) |
JP (1) | JP2007510252A (en) |
CN (1) | CN1902711A (en) |
TW (1) | TWI371755B (en) |
WO (1) | WO2005041206A2 (en) |
Cited By (1)
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KR101600551B1 (en) | 2008-10-24 | 2016-03-21 | 샌디스크 테크놀로지스, 인코포레이티드 | Programming non-volatile memory with high resolution variable initial programming pulse |
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KR101600551B1 (en) | 2008-10-24 | 2016-03-21 | 샌디스크 테크놀로지스, 인코포레이티드 | Programming non-volatile memory with high resolution variable initial programming pulse |
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CN1902711A (en) | 2007-01-24 |
EP1683159A4 (en) | 2007-03-21 |
US7136304B2 (en) | 2006-11-14 |
US20050105337A1 (en) | 2005-05-19 |
WO2005041206A2 (en) | 2005-05-06 |
US20070115726A1 (en) | 2007-05-24 |
US7675782B2 (en) | 2010-03-09 |
WO2005041206A3 (en) | 2005-06-02 |
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JP2007510252A (en) | 2007-04-19 |
TW200535848A (en) | 2005-11-01 |
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