WO2007018761A3 - Security method for data protection - Google Patents

Security method for data protection Download PDF

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Publication number
WO2007018761A3
WO2007018761A3 PCT/US2006/024161 US2006024161W WO2007018761A3 WO 2007018761 A3 WO2007018761 A3 WO 2007018761A3 US 2006024161 W US2006024161 W US 2006024161W WO 2007018761 A3 WO2007018761 A3 WO 2007018761A3
Authority
WO
WIPO (PCT)
Prior art keywords
integrated circuit
data protection
security method
conductive trace
security
Prior art date
Application number
PCT/US2006/024161
Other languages
French (fr)
Other versions
WO2007018761A2 (en
Inventor
Alain Peytavy
Alexandre Croguennec
Original Assignee
Atmel Corp
Alain Peytavy
Alexandre Croguennec
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from FR0507766A external-priority patent/FR2888975B1/en
Application filed by Atmel Corp, Alain Peytavy, Alexandre Croguennec filed Critical Atmel Corp
Priority to CN2006800325295A priority Critical patent/CN101258552B/en
Priority to BRPI0613561-7A priority patent/BRPI0613561A2/en
Publication of WO2007018761A2 publication Critical patent/WO2007018761A2/en
Publication of WO2007018761A3 publication Critical patent/WO2007018761A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/57Protection from inspection, reverse engineering or tampering
    • H01L23/576Protection from inspection, reverse engineering or tampering using active circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/86Secure or tamper-resistant housings
    • G06F21/87Secure or tamper-resistant housings by means of encapsulation, e.g. for integrated circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01057Lanthanum [La]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1532Connection portion the connection portion being formed on the die mounting surface of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

Abstract

A method and device for data security including a printed circuit board (30) and an integrated circuit (20) each having a conductive trace layer shielded by a electrical shield layer (12, 32) . Tampering with either side of the device causes disturbance of a current flowing through a conductive trace layer (13) used as an electrical shield. This triggers a security circuit to erase the data stored in the integrated circuit (20) and stop data flow between the printed circuit board (30) and the integrated circuit (20) .
PCT/US2006/024161 2005-07-21 2006-06-20 Security method for data protection WO2007018761A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN2006800325295A CN101258552B (en) 2005-07-21 2006-06-20 Security method and device for data protection
BRPI0613561-7A BRPI0613561A2 (en) 2005-07-21 2006-06-20 security method for data protection

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
FR0507766A FR2888975B1 (en) 2005-07-21 2005-07-21 SECURITY METHOD FOR DATA PROTECTION
FR0507766 2005-07-21
US11/256,124 2005-10-21
US11/256,124 US7791898B2 (en) 2005-07-21 2005-10-21 Security apparatus

Publications (2)

Publication Number Publication Date
WO2007018761A2 WO2007018761A2 (en) 2007-02-15
WO2007018761A3 true WO2007018761A3 (en) 2007-10-25

Family

ID=37727787

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/024161 WO2007018761A2 (en) 2005-07-21 2006-06-20 Security method for data protection

Country Status (2)

Country Link
KR (1) KR20080033418A (en)
WO (1) WO2007018761A2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100576985C (en) 2007-09-21 2009-12-30 百富计算机技术(深圳)有限公司 Safety cover
ES2532653B1 (en) * 2013-09-30 2016-01-05 Intelligent Data, S.L. Electronic payment device
US9859226B1 (en) 2016-12-13 2018-01-02 International Business Machines Corporation Core-shell particles for anti-tampering applications
DE102017112079A1 (en) * 2017-06-01 2018-12-06 Innogy Se Protective housing for a circuit board
KR102428479B1 (en) 2021-11-12 2022-08-03 우진라페 주식회사 Powder transfering system
CN115148118A (en) * 2022-07-07 2022-10-04 黑芝麻智能科技有限公司 Flexible circuit board and display device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4691350A (en) * 1985-10-30 1987-09-01 Ncr Corporation Security device for stored sensitive data
US5639696A (en) * 1996-01-31 1997-06-17 Lsi Logic Corporation Microelectronic integrated circuit mounted on circuit board with solder column grid array interconnection, and method of fabricating the solder column grid array

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4691350A (en) * 1985-10-30 1987-09-01 Ncr Corporation Security device for stored sensitive data
US5639696A (en) * 1996-01-31 1997-06-17 Lsi Logic Corporation Microelectronic integrated circuit mounted on circuit board with solder column grid array interconnection, and method of fabricating the solder column grid array

Also Published As

Publication number Publication date
WO2007018761A2 (en) 2007-02-15
KR20080033418A (en) 2008-04-16

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