WO2007109117A3 - Dry etch stop process for eliminating electrical shorting in mram device structures - Google Patents

Dry etch stop process for eliminating electrical shorting in mram device structures Download PDF

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Publication number
WO2007109117A3
WO2007109117A3 PCT/US2007/006607 US2007006607W WO2007109117A3 WO 2007109117 A3 WO2007109117 A3 WO 2007109117A3 US 2007006607 W US2007006607 W US 2007006607W WO 2007109117 A3 WO2007109117 A3 WO 2007109117A3
Authority
WO
WIPO (PCT)
Prior art keywords
etch stop
electrical shorting
stop process
dry etch
device structures
Prior art date
Application number
PCT/US2007/006607
Other languages
French (fr)
Other versions
WO2007109117A2 (en
Inventor
Robert Ditizio
Original Assignee
Tegal Corp
Robert Ditizio
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/724,556 external-priority patent/US7645618B2/en
Application filed by Tegal Corp, Robert Ditizio filed Critical Tegal Corp
Priority to JP2009500499A priority Critical patent/JP5085637B2/en
Priority to EP07753250A priority patent/EP1999781A2/en
Publication of WO2007109117A2 publication Critical patent/WO2007109117A2/en
Publication of WO2007109117A3 publication Critical patent/WO2007109117A3/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N52/00—Hall-effect devices

Abstract

The present invention relates generally to semiconductor fabrication and particularly to fabricating magnetic tunnel junction devices. In particular, this invention relates to a method for using the dielectric layer in tunnel junctions as an etch stop layer to eliminate electrical shorting that can result from the patterning process.
PCT/US2007/006607 2006-03-16 2007-03-16 Dry etch stop process for eliminating electrical shorting in mram device structures WO2007109117A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009500499A JP5085637B2 (en) 2006-03-16 2007-03-16 Dry etch stop process to eliminate electrical shorts in MRAM device structure
EP07753250A EP1999781A2 (en) 2006-03-16 2007-03-16 Dry etch stop process for eliminating electrical shorting in mram device structures

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US78315706P 2006-03-16 2006-03-16
US60/783,157 2006-03-16
US11/724,556 2007-03-14
US11/724,556 US7645618B2 (en) 2004-09-09 2007-03-14 Dry etch stop process for eliminating electrical shorting in MRAM device structures

Publications (2)

Publication Number Publication Date
WO2007109117A2 WO2007109117A2 (en) 2007-09-27
WO2007109117A3 true WO2007109117A3 (en) 2007-12-13

Family

ID=38522964

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/006607 WO2007109117A2 (en) 2006-03-16 2007-03-16 Dry etch stop process for eliminating electrical shorting in mram device structures

Country Status (4)

Country Link
EP (1) EP1999781A2 (en)
JP (1) JP5085637B2 (en)
KR (1) KR20090008240A (en)
WO (1) WO2007109117A2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100304504A1 (en) * 2009-05-27 2010-12-02 Canon Anelva Corporation Process and apparatus for fabricating magnetic device
JP6096762B2 (en) * 2012-04-26 2017-03-15 東京エレクトロン株式会社 Plasma processing method and plasma processing apparatus
JP5918108B2 (en) * 2012-11-16 2016-05-18 東京エレクトロン株式会社 Plasma processing method and plasma processing apparatus
JP6160903B2 (en) * 2013-03-13 2017-07-12 株式会社東芝 Magnetic storage element and nonvolatile storage device
JP6134611B2 (en) * 2013-08-29 2017-05-24 株式会社アルバック Method for manufacturing magnetoresistive element
EP3572549A1 (en) 2018-05-24 2019-11-27 Richemont International S.A. Jewellery item
CN111146336A (en) * 2018-11-02 2020-05-12 江苏鲁汶仪器有限公司 Single-isolation-layer magnetic tunnel junction etching method
CN111162164B (en) * 2018-11-08 2023-06-13 江苏鲁汶仪器股份有限公司 Manufacturing method of semiconductor device

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3911579A (en) * 1971-05-18 1975-10-14 Warner Lambert Co Cutting instruments and methods of making same
US5980686A (en) * 1998-04-15 1999-11-09 Applied Komatsu Technology, Inc. System and method for gas distribution in a dry etch process
US6114719A (en) * 1998-05-29 2000-09-05 International Business Machines Corporation Magnetic tunnel junction memory cell with in-stack biasing of the free ferromagnetic layer and memory array using the cell
US6139702A (en) * 1999-03-05 2000-10-31 United Microelectronics Corp. Seasoning process for etcher
US6281538B1 (en) * 2000-03-22 2001-08-28 Motorola, Inc. Multi-layer tunneling device with a graded stoichiometry insulating layer
US6326637B1 (en) * 1999-10-18 2001-12-04 International Business Machines Corporation Antiferromagnetically exchange-coupled structure for magnetic tunnel junction device
US6531404B1 (en) * 2000-08-04 2003-03-11 Applied Materials Inc. Method of etching titanium nitride
US20040242005A1 (en) * 2003-04-14 2004-12-02 Chentsau Ying Method of etching metal layers
US20050051820A1 (en) * 2003-09-10 2005-03-10 George Stojakovic Fabrication process for a magnetic tunnel junction device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19728472A1 (en) * 1997-07-03 1999-01-07 Siemens Ag Structuring process
JP4809991B2 (en) * 2001-04-17 2011-11-09 キヤノン株式会社 Processing method of tunnel magnetoresistive element
JP2003324187A (en) * 2002-05-01 2003-11-14 Sony Corp Method for manufacturing magnetic memory device and magnetic memory device
JP4111274B2 (en) * 2003-07-24 2008-07-02 キヤノンアネルバ株式会社 Magnetic material dry etching method

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3911579A (en) * 1971-05-18 1975-10-14 Warner Lambert Co Cutting instruments and methods of making same
US5980686A (en) * 1998-04-15 1999-11-09 Applied Komatsu Technology, Inc. System and method for gas distribution in a dry etch process
US6114719A (en) * 1998-05-29 2000-09-05 International Business Machines Corporation Magnetic tunnel junction memory cell with in-stack biasing of the free ferromagnetic layer and memory array using the cell
US6139702A (en) * 1999-03-05 2000-10-31 United Microelectronics Corp. Seasoning process for etcher
US6326637B1 (en) * 1999-10-18 2001-12-04 International Business Machines Corporation Antiferromagnetically exchange-coupled structure for magnetic tunnel junction device
US6281538B1 (en) * 2000-03-22 2001-08-28 Motorola, Inc. Multi-layer tunneling device with a graded stoichiometry insulating layer
US6531404B1 (en) * 2000-08-04 2003-03-11 Applied Materials Inc. Method of etching titanium nitride
US20040242005A1 (en) * 2003-04-14 2004-12-02 Chentsau Ying Method of etching metal layers
US20050051820A1 (en) * 2003-09-10 2005-03-10 George Stojakovic Fabrication process for a magnetic tunnel junction device

Also Published As

Publication number Publication date
EP1999781A2 (en) 2008-12-10
JP5085637B2 (en) 2012-11-28
KR20090008240A (en) 2009-01-21
WO2007109117A2 (en) 2007-09-27
JP2009530825A (en) 2009-08-27

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