WO2009009302A3 - Error recovery storage along a nand-flash string - Google Patents
Error recovery storage along a nand-flash string Download PDFInfo
- Publication number
- WO2009009302A3 WO2009009302A3 PCT/US2008/068236 US2008068236W WO2009009302A3 WO 2009009302 A3 WO2009009302 A3 WO 2009009302A3 US 2008068236 W US2008068236 W US 2008068236W WO 2009009302 A3 WO2009009302 A3 WO 2009009302A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- error correction
- correction codes
- error recovery
- nand
- data
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1072—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in multilevel memories
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/256—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with trellis coding, e.g. with convolutional codes and TCM
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
- H03M13/2909—Product codes
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Detection And Correction Of Errors (AREA)
- Error Detection And Correction (AREA)
Abstract
Apparatus and methods store error recovery data in different dimensions of a memory array (102). For example, in one dimension, block error correction codes (ECC) are used, and in another dimension, supplemental error correction codes, such as convolutional codes, are used. By using separate dimensions, the likelihood that a defect affects both error recovery techniques is lessened, thereby increasing the probability that error recovery (510/ 525/530/535) can be performed successfully. In one example, block error correction codes are used for data stored along rows, and this data is stored in one level of multiple-level cells of the array. Supplemental error correction codes are used for data stored along columns, such as along the cells of a string, and the supplemental error correction codes are stored in a different level than the error correction codes.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/774,316 | 2007-07-06 | ||
US11/774,316 US8051358B2 (en) | 2007-07-06 | 2007-07-06 | Error recovery storage along a nand-flash string |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2009009302A2 WO2009009302A2 (en) | 2009-01-15 |
WO2009009302A3 true WO2009009302A3 (en) | 2009-03-05 |
Family
ID=40222373
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2008/068236 WO2009009302A2 (en) | 2007-07-06 | 2008-06-25 | Error recovery storage along a nand-flash string |
Country Status (3)
Country | Link |
---|---|
US (5) | US8051358B2 (en) |
TW (1) | TW200912942A (en) |
WO (1) | WO2009009302A2 (en) |
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Also Published As
Publication number | Publication date |
---|---|
US20090013233A1 (en) | 2009-01-08 |
US8245100B2 (en) | 2012-08-14 |
US8468415B2 (en) | 2013-06-18 |
US8051358B2 (en) | 2011-11-01 |
US20120030545A1 (en) | 2012-02-02 |
US9063875B2 (en) | 2015-06-23 |
US20140325317A1 (en) | 2014-10-30 |
US20120304038A1 (en) | 2012-11-29 |
US8713401B2 (en) | 2014-04-29 |
US20130283130A1 (en) | 2013-10-24 |
WO2009009302A2 (en) | 2009-01-15 |
TW200912942A (en) | 2009-03-16 |
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