WO2011095516A1

WO2011095516A1 - Method and system for mass storage on flash memory

Info

Publication number: WO2011095516A1
Application number: PCT/EP2011/051477
Authority: WO
Inventors: Saugata Das Purkayastha
Original assignee: St-Ericsson Sa
Priority date: 2010-02-05
Filing date: 2011-02-02
Publication date: 2011-08-11

Abstract

Exemplary embodiments provide for mass storage transfers on embedded platforms to flash memory devices to recover their throughput even after prolonged usage when connected to an external control device, e.g., a PC, by reducing copies made during garbage collection. Entries in a flash translation layer (FTL) are updated by evaluating information associated with a file allocation table (FAT table) of a FAT file system to identify at least one free data cluster on the FAT file system and marking as invalid entries in a FTL mapping table which correspond to the at least one identified free data cluster.

Description

METHOD AND SYSTEM FOR MASS STORAGE ON FLASH MEMORY

RELATED APPLICATION

[0001] The present application is related to Indian Provisional Application Serial No.

263/DEL/2010, filed on February 5, 2010, entitled "Improving Mass Storage Throughput on Flash Memory", the disclosure of which is incorporated here by reference.

TECHNICAL FIELD

[0002] The present invention relates to mass storage devices and particularly to internal flash memory devices.

BACKGROUND

[0003] As is generally known, the provision of mass storage capability for internal embedded device memory is an important feature in many embedded platforms, e.g., such as embedded platforms used in mobile phones and other electronic devices. Figure 1 illustrates how a mass storage device 100 disposed within an electronic device 102 can be accessed from a computer (PC) 104. For example, and as illustrated in Figure 1, the contents of the mass storage device 100 can be accessed over, for example, a universal serial bus (USB). The USB 106 may be connected to the electronic device 102 having the mass storage device 100 in order to, for example, enable the user to manipulate data stored in the mass storage device via the PC 104. Read/write commands are then transmitted from the PC 104 to the electronic device 102 via USB 106. The electronic device 102 in turn communicates with the mass storage device 100 which can, for example, be implemented using NAND or NOR flash memory, via a bus or interconnect 107.

[0004] Use of NAND or NOR flash memory as mass storage devices 100 associated with embedded platforms is very common. However, currently NAND and NOR flash memory devices have somewhat limited programming or erase life cycles compared for instance to solid state discs and hard disks. In order to improve the lifetime of NAND or NOR flash memory devices, a file system associated with flash memory devices typically implements a wear leveling algorithm. The wear leveling algorithm enables the file system to evenly program and erase pages in the NAND or NOR flash memory. The component within the file system which is responsible for performing wear level management and garbage collection (to be described below) is a logical layer called the flash translation layer (FTL), also sometimes referred to herein as an "FTL module". A file storage system can use a File Allocation Table (FAT) file system as an interface to the FTL.

[0005] Embedded flash file systems, such as those used in mobile phones, typically include both FAT and FTL components which handle the marking of dirty pages and invalidating of FTL mapping table entries when a file is deleted by a user and the electronic device 102 is unconnected to, e.g., the PC 104. For example, when a user deletes a file on his or her electronic device 102, e.g., using a mobile phone's man-machine interface (MMI), the embedded file system operating on the electronic device 102 synchronously performs the deletion, invalidates the corresponding FTL mapping table entries, and marks the corresponding pages in flash memory as dirty prior to returning to the MMI in one turn, i.e., synchronously.

[0006] By way of contrast, when the electronic device 102 is connected to the PC 104, the PC 104 will operate to control data read commands ("reads") and data write commands ("writes") to and/or from the PC 104 to the mass storage device 100. However there is currently no mechanism available for the FAT file system of the PC 104 to inform the FTL of the embedded platform on the electronic device 102 about modifications which the FAT file system is making to pages of the mass storage device 100. For example, as the user deletes several files stored in the mass storage device 100 via commands from the PC 104 then, more and more pages will be identified as valid by the FTL, i.e., appear to reflect valid data being stored in those sectors, which sectors are, however, actually free in the FAT table of the mass storage device 100 since the user deleted the mentioned several files.

[0007] When a garbage collection algorithm is run in the mass storage device, then the

FTL finds that some of the pages are marked as valid (some of which pages are incorrectly marked as such due to the changes made to the FAT file system by the PC 104), and the garbage collection process requires that all of those pages marked as valid (for identified memory blocks) be copied into other memory locations in the flash memory device. This process continues during every garbage collection. As the volume is ostensibly filled, the garbage collection frequency is increased and throughput of the flash memory drops drastically. This problem is discussed in more detail below.

[0008] According to one known solution for addressing this problem, the FTL reserves some memory blocks. The provision of reserved blocks increases the number of free pages in the volume and improves garbage collection time. However, this method reduces the useable space for the user in the volume, which is undesirable.

[0009] According to another known solution, the FTL performs a queuing of memory write commands issued between the USB and the FTL or between the FTL and drivers operating on the embedded platform. However, these queuing operations delay the actual write operations and have the drawback that they also consume more RAM. [0010] Accordingly, exemplary embodiments seek to overcome one or more of the problems as set forth above by providing new methods and systems for handling mass storage associated with flash memory devices.

SUMMARY

[0011] Exemplary embodiments provide, among other benefits and advantages, mass storage transfers on embedded platforms to flash memory devices to recover their throughput even after prolonged usage when connected to an external control device, e.g., a PC by reducing copies made during garbage collection. It will be appreciated that, however, the present invention is not limited to implementations which experience these benefits and advantages except to the extent that such benefits and advantages are explicitly recited in the claims.

[0012] According to an exemplary embodiment, a method for updating entries in a flash translation layer (FTL) mapping table includes the steps of evaluating information associated with a file allocation table (FAT) of a file storage system to identify at least one free data cluster associated with a flash memory device, marking as invalid, in response to the evaluating, entries in the FTL mapping table which correspond to the at least one identified free data cluster, and marking, as dirty, pages of the flash memory device corresponding to the invalid entries in the FTL mapping table.

[0013] According to another exemplary embodiment, an electronic device includes a memory interface for connecting at least one flash memory device, a processor configured to execute a file storage system application configured to provide access to at least one flash memory device when the at least one flash memory device is connected to the memory interface, wherein the file storage system application comprises a module which is configured to evaluate information associated with a file allocation table (FAT) to identify at least one free data cluster associated with the flash memory device, to mark as invalid, in response to the evaluation, entries in an FTL mapping table which correspond to the at least one identified free data cluster and to mark, as dirty, pages of the flash memory device corresponding to the invalid entries in the FTL mapping table. [0014] According to another exemplary embodiment, a computer-readable medium includes computer program instructions stored thereon which, when executed on one or more processors, enable the one or more processors to cause a file storage system which manages memory access to at least one flash memory device to perform the steps of: evaluating information associated with a file allocation table (FAT) of a file storage system to identify at least one free data cluster associated with a flash memory device, marking as invalid, in response to the evaluating, entries in the FTL mapping table which correspond to the at least one identified free data cluster, and marking, as dirty, pages of the flash memory device corresponding to the invalid entries in the FTL mapping table.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The features of the present invention will be exemplified in the following description and the accompanying drawing, wherein:

[0016] Figure 1 illustrates a personal computer (PC) connected to an electronic device which contains a flash memory device;

[0017] Figure 2(a) depicts file storage system elements in the PC and in an electronic device including a file allocation table (FAT) file storage system software component;

[0018] Figure 2(b) depicts file storage system elements in the PC and in an electronic device without a FAT file storage system software component;

[0019] Figure 3 shows an exemplary FAT table and data stored in clusters;

[0020] Figure 4 illustrates an exemplary flash translation layer (FTL) mapping relationship between data sectors and flash memory pages;

[0021] Figure 5 depicts exemplary valid block copying associated with a garbage collection process;

[0022] Figure 6 depicts exemplary FAT, FTL and flash memory page statuses at an initial time;

[0023] Figure 7 depicts exemplary FAT, FTL and flash memory page statuses at a second time after a file has been deleted;

[0024] Figure 8 depicts exemplary FAT, FTL and flash memory page statuses at a third time after copying of valid pages associated with a garbage collection process has been performed;

[0025] Figure 9 depicts exemplary FAT, FTL and flash memory page statuses at a fourth time after erasure of dirty pages associated with the garbage collection process has been performed; [0026] Figure 10 is a flowchart illustrating a method for updating FTL entries according to an exemplary embodiment;

[0027] Figures 11-13 show exemplary FAT, FTL and flash memory page statuses at said second, third, and fourth times, respectively, when updating FTL entries according to exemplary embodiments;

[0028] Figure 14 is a flowchart illustrating another method for updating flash memory according to an exemplary embodiment;

[0029] Figure 15 is a graph depicting improvement in throughput obtained based on a particular embodiment of the present invention; and

[0030] Figure 16 shows exemplary hardware elements associated with an electronic device in which exemplary embodiments can be implemented.

DETAILED DESCRIPTION

[0031] The following detailed description of the exemplary embodiments refers to the accompanying drawings. The same reference numbers in different drawings identify the same or similar elements. Also, the following detailed description does not limit the invention. The scope of the invention remains defined by the appended claims.

[0032] Exemplary embodiments provide various methods and systems for improving mass storage throughput on flash memory. According to one exemplary embodiment, when a USB cable is removed from an electronic device, the mass storage volume inside the user equipment is accessed by the embedded platform. The mass storage device has a FAT table stored in the embedded platform. The embedded platform checks the FAT table to determine whether each cluster entry in FAT table is marked as unused or not. If a cluster entry in the FAT table is marked as unused, then the embedded platform marks the corresponding pages in FTL as dirty.

[0033] According to another exemplary embodiment, a FAT software sniffer or daemon is implemented on embedded platforms. The sniffer can, for example, be implemented as a separate background task or within the FTL module itself. The sniffer checks all writes to the FTL and detects writes to the FAT table, e.g., when the user equipment is connected to a PC via USB. If the FAT table is updated and there is a cluster which is marked free, then the FAT sniffer will mark the corresponding mapping in FTL as invalid and the NAND or NOR page as dirty. It should be noted that although NAND or NOR flash memory devices are described herein as examples of types of flash memory which can be used in conjunction with these exemplary embodiments, the present invention is not limited to these types of flash memory but is instead generic to all types of flash memory devices, e.g., including OneNAND and PRAM flash memory devices. Moreover, although the exemplary embodiments described herein refer to FAT file systems, the present invention can be implemented in association with other file systems, e.g., disk-based file systems such as EXT2.

[0034] These embodiments, and others, will be described below in more detail. Initially, however, it will be useful for the reader to provide some additional information regarding how data is organized in, written to, and erased from mass storage devices 100, in order to provide some context for such embodiments. As shown in Figure 2(a), both the PC 104 and the electronic device 102 will have their own file storage systems 200 and 202, respectively. The PC 104's file storage system 200 includes FAT file system software 204 and hard drive disk sectors 206 which store, among other things, the PC's file allocation table (FAT) 208. The FAT file software 204 coordinates memory accesses to the hard drive disk sectors 206, while the FAT 208, sometimes also referred to herein as a "FAT table" provides a record regarding the manner in which files are stored on the disk sectors 206, as described in more below with respect to Figure 3.

[0035] The file storage system 202 associated with the embedded platform on the electronic device 102 can also include a FAT file system software component 210 which controls memory access to flash memory pages 212 of the flash memory device 100 when the electronic device 102 is operating independently, i.e., when the electronic device 102 is not connected to the PC 104 via link 106. Typically electronic devices 102 which have independent operational modes, i.e., modes where they operate when unconnected to other devices, some mobile phones are examples of such electronic devices, will include a FAT file system component 210. By way of contrast, as shown for example in Figure 2(b), electronic devices 102 which do not have independent operational modes, e.g., flash drives, SD/MMC cards and their associated readers, etc., will not have a FAT file system component 210. Both Figures 2(a) and 2(b) are otherwise identical. [0036] A FAT table for the electronic device (ED FAT 213) is also stored in the flash memory 212. The embedded platform of the electronic device 102 further includes an FTL 214 which operates as an interface between the FAT file software 210 and the flash memory pages 212, i.e., FTL 214 stores data which maps the record stored in the ED FAT table 213 to the locations in which data is actually stored in the flash memory pages 212 due to the operation of the wear leveling algorithm. Thus, the PC side does not, at least in this example, include an FTL since the mass storage device(s) used in the PC 104, e.g., hard disk drives, do not require, for example, a wear leveling algorithm and instead actual data storage locations map directly to the records stored in the FAT table 208 associated with the FAT file storage system 200. It should also be noted that, more generally, PC 104 can be any device which can control memory accesses to an electronic device 102 via a communication link 106. When the electronic device 102 is connected to the PC 104 via communication link 106, the PC 104's FAT file software 204 controls access to the flash memory pages 212.

[0037] Figure 3 illustrates the organization of data stored by an exemplary file storage system 200 or 202. Therein, a plurality of data clusters 300 is illustrated as a row of rectangles. In file system parlance, a data cluster can be considered a smallest logical amount of disk space which can be allocated to hold a file. Each data cluster comprises one or more data sectors— in this exemplary file storage system 200 or 202 two data sectors 302 comprise each data cluster 300. Each data sector 302 represents the smallest addressable physical unit of memory space.

[0038] An exemplary FAT table 304 is shown in the left hand side of the Figure. As a purely illustrative example, the FAT table 304 illustrated in Figure 3 has entries associated with six data clusters (N, N+l, N+2, N+3, N+4, N+5), wherein five out of the six data clusters represent two files, i.e., File 1 (i.e., data clusters N, N+l, N+2) and File 2 (i.e., data clusters N+3, N+4). In the FAT table 304, each entry includes, for example, the identity of the next data cluster in a chain (e.g., entry N in the FAT table 304 contains N+l) or an end of cluster (EOC) value (e.g., entry N+2, being the end of File 1, contains an EOC value in FAT table 304). In a hard drive mass storage device, e.g., within the PC 104, the FAT table 304 is followed by the actual data clusters 300 themselves.

[0039] As mentioned earlier, when the NAND or NOR flash memory device 100 is connected to a PC 104 over, for example, a USB connection 106, the FAT file software 204 of the electronic device 102 will control memory accesses to the electronic device, which now views the mass storage device 100 of the electronic device 102 as another one of its own mass storage devices while the electronic device 102 is connected thereto via the USB 106. Note that although a USB cable or link is used as an exemplary communication interconnect between the electronic device 102 and the PC 104, it will be appreciated that other types of communication link (wired or wireless) may be used to establish (and disestablish) the data transfer connection between the electronic device 102 and the PC 104. Thus, when the electronic device 102 and the PC 104 are connected together, and using the example of Figure 3 as reflecting data stored in file storage system 202 at the time of connection, the data clusters marked as File 1 and File 2 in the FAT table 213 of file storage system 202 of the electronic device 102 and the corresponding data stored in flash memory pages 212 will become accessible to a user via FAT file system software 204 regardless of whether the electronic device 102 possesses its own FAT file system software 210 (Figure 2(a)) or not (Figure 2(b)).

[0040] As mentioned previously, the embedded platform in the electronic device 102 will also include an FTL 214 to control memory access, and to map between the FAT file system software 210 (if present) and the physical NAND or NOR flash memory pages 212. The FTL 214 maintains a mapping table between the data sectors of each data cluster having entries in the FAT table 213 and corresponding physical NAND or NOR flash memory pages, as illustrated conceptually in Figure 4. Therein, the arrows which point from each data sector 302 (associated with data clusters in the FAT table) toward a corresponding physical NAND or NOR flash memory page in which those data sectors are actually stored in the mass storage device 100 serve to illustrate the mapping relationship 400 captured by the FTL 214. It will be appreciated that the particular mapping shown in Figure 4 is purely exemplary.

[0041] Consider first the operation of the FTL 214 when the electronic device 102 is not connected to PC 104 via a communication link 106. When a new write request is received, the FTL 214 finds a free page in the flash memory 100 and writes the contents of the write request to that free page. The FTL 214 then updates its mapping table to reflect the new address for the logical FAT data clusters which have been written and marks the previous physical NAND or NOR page as "dirty" which were associated with those logical FAT data clusters, i.e., a designation that the contents of that page are no longer valid data. Over time it is necessary to replenish free memory space in the mass storage device 100. A so-called "garbage collection" process is performed by the FTL 214 within the embedded platform of the electronic device 102 to achieve this objective. More specifically, a free page pool is maintained by the FTL 214 and, whenever the number of pages in the free page pool falls below a threshold, the FTL 214 runs a garbage collection algorithm to replenish the free page pool as will now be described with respect to Figure 5.

[0042] During the garbage collection process, the FTL 214 selects one or more memory block(s) which have some dirty pages and/or which are having low program or erase cycles. The FTL 214 then determines which pages within the selected block(s) are dirty and which pages are not dirty, i.e., which still contain valid data. In Figure 5, the four rectangles 500 represent valid pages, while the remaining pages in the selected blocks which have been selected for garbage collection are dirty. The FTL 214 copies the valid pages 500 to free pages in a block from the free page pool, i.e., as shown by the arrows in Figure 5.

[0043] Once the valid pages in the selected block(s) have been copied, the FTL 214 then erases all of the pages in the selected block(s) and adds all of those now erased pages to the free page pool to complete the garbage collection process. It will thus be appreciated by those skilled in the art that the process of copying the valid pages slows the garbage collection process and that, therefore, the efficiency of the garbage collection process is based (at least in part) upon the number of dirty pages in the block(s) selected by the file system for garbage collection.

[0044] With this context regarding flash memory data storage management in mind, the discussion returns again to the scenario which occurs when the mass storage device 100 is connected to a PC 104 over, e.g., a USB cable 106. The FAT file software 204 is updated as described above with respect to the newly attached mass storage device 100, such the FAT file software 204 now coordinates memory accesses to the mass storage device 100 using the FAT table 213 of the file storage system 202 in the electronic device 102. Using the previously discussed file storage hypothetical discussed above with respect to Figure 3, the statuses of the FAT table 213, the FTL 214 and the physical NAND or NOR flash memory pages 212 are shown in Figure 6 at this time. It will be appreciated by those skilled in the art that the actual mapping of data sectors to flash memory pages illustrated in Figure 6 is purely exemplary and that other mapping schemes might actually occur in an implementation of these embodiments.

[0045] Now consider that the user uses an application or tool running on the PC 104 to delete File 2 from the NAND or NOR flash memory 212 over the communication link, e.g., USB 106, i.e., the file which occupies the FAT data clusters (N+3, N+4). Upon deletion of File 2, the FAT file software 204 will mark data clusters {N+3, N+4} as unused in the FAT table 213 in the electronic device 102. Thus, for example, Figure 7 illustrates the statuses at this point in the process wherein the data cluster entries corresponding to deleted File2 in the FAT table 213 are marked with zeros to indicate their unused status.

[0046] However, as mentioned above, since the FAT file system software 204 in the PC

104 does not have a mechanism for updating the FTL 214, there is no indication provided to the FTL 214 that the clusters N+3 and N+4 are no longer in use, i.e., are free for data storage. Thus, FTL 214 will continue to hold the mapping for the clusters {N+3, N+4} and the corresponding pages in NAND or NOR as valid as also seen in Figure 7 wherein the FTL 214 and NAND/NOR pages 212 show the same status as at the pre-deletion time shown in Figure 6. In particular note that pages 700 in the flash memory 212 are marked as valid, as are the corresponding entries in the FTL 206, despite the fact that the FAT table 213 indicates that File2 has been erased. Page 702 of the five pages marked as valid in Block2 of the flash memory device are, in fact, valid at this point in time, as it is associated with an existing file, namely Filel .

[0047] Consider now that the FTL 214 selects Block2 in the flash memory pages 212 for the garbage collection process. As mentioned above, as part of the garbage collection process all of the pages marked as valid are copied from their current pages in flash memory to other pages. This means that, in the context of Figure 7, the four pages 700 are copied from their current location in the flash memory device 100 to new locations 800 as shown in Figure 8. These copies are unnecessary because, in actuality, the data in the pages 700 is invalid since File2 was erased by the FAT file software 204. In fact, in this example, only one of the five page copies which are performed during this portion of the garbage collection process for Block2 actually needed to be performed, i.e., that associated with page 702 being copied to page 802, thereby implying a significant inefficiency in this cycle of the garbage collection process.

[0048] Once copied, these "valid" pages in Block2 are marked as dirty as shown in

Figure 8 and their location mappings in FTL 214 are changed to reflect the new location of this data in Block3 of the flash memory device 100 as shown by the corresponding arrows between FTL 214 and Block3. Then, all of the pages in Block2 are erased so that Block2 can be added to the free page pool, as illustrated in Figure 9.

[0049] According to exemplary embodiments of the invention, by way of contrast, an updating mechanism can be added to the file storage system 202 (or more generally to the embedded platform associated with the electronic device 102) which performs, for example, the steps illustrated in Figure 10. Therein, at step 1000, the updating mechanism evaluates information associated with the FAT table 213 of a file storage system to identify at least one free data cluster associated with a flash memory device. In response to this evaluation, entries are marked as invalid in a flash translation layer (FTL) mapping table when those entries correspond to the at least one identified free data cluster a step 1002. Additionally, as shown at step 1004, the pages of the flash memory device which correspond to the invalid entries in the FTL mapping table are marked as dirty.

[0050] Figures 11-13 illustrate the statuses of the FAT table 213, the FTL 214 and the physical NAND or NOR flash memory pages 212 during the hypothetical flash memory access scenario discussed above with respect to Figures 7-9, but instead with an updating in accordance with the invention. Therein, it can be seen that this updating mechanism has the effect of reducing the number of unnecessary copies made during the garbage collection process. For example, in Figure 11, the updating mechanism has evaluated entries N+3 and N+4 of the FAT table 213, determined that these entries indicate deleted data, and marked the corresponding entries 1100 in the FTL mapping table 214 as invalid and the corresponding pages 1102 in the flash memory device 100 as dirty. As a result, as shown in Figure 12, when garbage collection process is performed, and Block2 is again selected for copying/erasing, only block 1200 need be copied into Block3 of the flash memory device 100. For completeness, Figure 13 illustrates the statuses after the step of erasing Block2 is performed.

[0051] This updating mechanism according to exemplary embodiments can take different forms depending upon the desired implementation and may be implemented in software, hardware or some combination thereof. For example, the updating mechanism can be implemented as a software routine or background task which is executed by the processor of the electronic device when triggered. The particular trigger for executing the updating mechanism may vary and can, for example, be selected to run the updating mechanism when there will be no contention with respect to accessing the FAT table entries, FTL mapping table entries and/or flash memory pages.

[0052] For example, according to one exemplary embodiment, the triggering mechanism which can be used to initiate the updating mechanism can be asynchronous relative to the memory writes which are being performed, e.g., the updating mechanism can be triggered upon the disestablishment of the communication link between the electronic device 102 and the PC 104, e.g., disconnection of a USB cable 106. This exemplary embodiment may be used when, for example, the electronic device 102 has its own internal power source, e.g., a battery, and therefore does not rely upon the communication link for power, e.g., a mobile phone. According to this exemplary embodiment, when a USB cable 106 is removed, the mass storage device 100 (i.e., flash memory device) is accessed by the updating mechanism in the electronic device 102. The updating mechanism checks through the FAT table 213 of the file storage system 202 of the electronic device 102 to determine if data cluster entries in the FAT table are marked unused or not. If a data cluster entry in the FAT table is marked as unused, then the updating mechanism marks the corresponding pages 212 in the flash memory 100 as dirty. The updating mechanism in the embedded platform further invalidates the mapping table entries for those pages in the FTL 214 in the manner described above.

[0053] According to another exemplary embodiment, the updating mechanism can be triggered periodically or operate continuously, e.g., while the communication link is established. Such exemplary embodiments may be useful in (but are not limited to) situations wherein the electronic device 102 does not have its own power source, e.g., for devices such as flash drives, and which, therefore, rely upon the communication link to also deliver power. According to this exemplary embodiment, a FAT sniffer or daemon is implemented on the embedded platform associated with the electronic device 102. The background task can be implemented as a separate task or as part of the FTL module 214 itself.

[0054] According to this exemplary embodiment, as illustrated in the flowchart of Figure

14, the FAT sniffer or daemon checks all writes which occur via the communication link to the FAT table 213 of the file storage system 202 as indicated by step 1400. If the FAT table 213 is updated, then the flow follows the "Yes" branch of the process wherein the background task further checks to see which data clusters are now marked as free in the FAT table 213, as shown by step 1402. In this exemplary embodiment, an FTL Cleanup bit is set at step 1404, to indicate a need to subsequently cleanup the FTL mapping table and mark the corresponding flash memory page(s) as dirty. Then, an FTL write is performed, i.e., the write command transmitted over the communication link is actually performed to the flash memory device, as indicated by step 1406. For writes which do not effect the FAT table 213, e.g., modifications to existing files, the flow follows the "No" path directly to step 1406. If the FTL Cleanup bit is set at step 1408, then the background task updates the FTL mapping table to mark entries as invalid and to mark the corresponding flash memory pages as dirty, as described above and indicated by step 1410. This ensures that, for example, when the FTL 214 starts the garbage collection process more dirty pages will be correctly identified. Among other things, this optimizes the garbage collection process and write throughput. The advantage of this method is that USB cable is not required to be removed and reconnected.

[0055] The foregoing exemplary embodiments describe two mechanisms for triggering or initiating the updating mechanism, i.e., either upon disconnection of a communication link between the electronic device 102 and the PC 104, or periodically or continuously while the electronic device 102 and PC 104 are connected. However the present invention is not limited to only these triggering mechanisms and those skilled in the art will appreciate that the updating mechanisms described herein can be triggered or initiated based upon one or more other criteria.

[0056] To exemplify throughput improvement associated with these exemplary embodiments, Figure 15 illustrates test results performed using an FD Bench tool, which fills the mass storage device 100 from the PC 104 when connected over a USB link 106. In the graphical representation of Figure 15, the x-axis indicates the number of tests performed and y-axis indicates the writing throughput. When the first and second tests are performed, it can be seen in Figure 15 that the writing throughput to the flash memory 100 continues to decrease until it reaches a low, steady state throughput which continues through the third and fourth test when using a conventional FTL 214 as indicated by the portion 1500 of the illustrated function. With, however, the addition of an updating mechanism according to exemplary embodiments described above, when the USB link 106 is removed and reconnected between the third and fourth test, the writing throughput increases as shown by the portion 1502 of the illustrated function.

[0057] Figure 16 illustrates an exemplary electronic device 102 according to an exemplary embodiment including a processor 1600 configured to execute a file storage system application 1602 which controls memory accesses. The file storage system application 1602 includes a FAT table 1604, an FTL mapping table 1606 and an updating mechanism or module 1608 which operate together as described above. The exemplary electronic device 102 illustrated in Figure 16 also includes a power source in this example, e.g., a battery 1610, although as described above some flash memory devices do not include power sources. The exemplary electronic device 102 also includes a flash memory device or interface 1612. In one embodiment, the electronic device 102 includes both the flash memory device itself and an interface into which the flash memory device can be inserted. According to another exemplary embodiment, the electronic device 102 includes only the flash memory interface, i.e., the flash memory device itself may be added subsequent to the initial manufacturing of the electronic device 102. The electronic device 102 further includes a communication port 1614 via which a communication link, e.g., a USB link 106, can be established with a PC 104 as described above. The electronic device 102 may be a portable device, e.g., a mobile phone or a flash drive, or may be another device which is not necessarily considered to be such as a home PC, television set, audio receiver, modem, router, and other devices similar to these.

[0058] From the foregoing discussion, it will be appreciated by those skilled in the art that various aspects of the exemplary embodiments may be implemented in hardware, software or a combination thereof. Regarding software, the updating mechanisms described herein can, for example, be implemented as background tasks implemented as a set of computer program instructions which, when executed on one or more processors perform steps that result in the afore-described functions being performed. Such computer program instructions are stored on a computer-readable medium, e.g., RAM, ROM, CD, flash memory, or the like, in a manner which is non-transitory. For example, according to one exemplary embodiment, a computer-readable medium comprises computer program instructions stored thereon which, when executed on one or more processors, enable the one or more processors to cause a file storage system which manages memory access to at least one flash memory device to perform the steps of: evaluating information associated with a file allocation table (FAT) of a file storage system to identify at least one free data cluster associated with a flash memory device, marking, in response to the evaluating, as invalid entries in a flash translation layer (FTL) mapping table which correspond to the at least one identified free data cluster, and marking, as dirty, pages of the flash memory device corresponding to the invalid entries in the FTL mapping table.

[0059] The above-described exemplary embodiments are intended to be illustrative in all respects, rather than restrictive, of the present invention. Thus the present invention is capable of many variations in detailed implementation that can be derived from the description contained herein by a person skilled in the art. All such variations and modifications are considered to be within the scope and spirit of the present invention as defined by the following claims. No element, act, or instruction used in the description of the present application should be construed as critical or essential to the invention unless explicitly described as such. Also, as used herein, the article "a" is intended to include one or more items.

Claims

CLAIMS:

1. A method for updating entries in a flash translation layer (FTL) mapping table, comprising: evaluating information associated with a file allocation table (FAT) of a file storage system to identify at least one free data cluster associated with a flash memory device;

marking as invalid, in response to said evaluating, entries in said FTL mapping table which correspond to said at least one identified free data cluster; and

marking pages of said flash memory device corresponding to said invalid entries in the FTL mapping table as dirty.

2. The method of claim 1, further comprising the steps of:

detecting disestablishment of a communication link from an electronic device which includes said flash memory device, the communication link providing access to the file storage system; and

asynchronously performing said steps of evaluating and marking in response to said detecting.

3. The method of claim 2, wherein said electronic device includes a power source.

4. The method of claim 1, wherein said information associated with said FAT table includes entries in said FAT table.

5. The method of claim 1, further comprising the steps of: detecting establishment of a communication link to an electronic device which includes said flash memory device, the communication link providing access to the file storage system; and

executing a background task on said electronic device to periodically or continuously perform said steps of evaluating and marking in response to said detecting.

6. The method of claim 5, wherein said steps of evaluating and marking are performed in response to detection of writing to said FAT table.

7. The method of claim 5, wherein said electronic device does not include a power source.

8. The method of claim 5, wherein said information associated with said FAT table includes information stored in a write buffer.

9. The method of claim 1, further comprising:

running a garbage collection process algorithm adapted to not copy at least one page which is marked dirty.

10. An electronic device comprising:

a memory interface for connecting at least one flash memory device,

a processor configured to execute a file storage system application configured to provide access to at least one flash memory device when said at least one flash memory device is connected to the memory interface,

wherein said file storage system application comprises a module which is configured to evaluate information associated with a file allocation table (FAT) to identify at least one free data cluster associated with said flash memory device, to mark as invalid, in response to the evaluation, entries in an FTL mapping table which correspond to said at least one identified free data cluster and to mark, as dirty, pages of said flash memory device corresponding to said invalid entries in the FTL mapping table.

11. The electronic device of claim 10, further comprising:

a communication port configured to communicate via a communication link, wherein said module is further configured to detect a disestablishment of the communication link, and to asynchronously perform said evaluating and marking in response to said disestablishment of the communication link, the communication link providing access to the file storage system.

12. The electronic device of claim 11, further comprising: a power source connected to power said processor and said memory interface.

13. The electronic device of claim 11, wherein said information associated with said FAT table comprises entries in said FAT table.

14. The electronic device of claim 10, further comprising:

a communication port configured to communicate via a communication link,

wherein said module is further configured to detect establishment of the communication link via said communication port, and to execute a background task on said electronic device to periodically or continuously perform said evaluating and marking in response to said detection.

15. The electronic device of claim 14, further comprising:

a write buffer configured to receive write commands via said communication link, wherein said module is further configured to perform said evaluating and marking in response to detection of a write command directed to said FAT table.

16. The electronic device of claim 15, wherein said electronic device does not include a power source.

17. The electronic device of claim 10, further comprising:

at least one flash memory device connected to said memory interface.

18. A computer-readable medium comprising computer program instructions stored thereon which, when executed on one or more processors, enable the one or more processors to cause a file storage system which manages memory access to at least one flash memory device to perform the steps of:

evaluating information associated with a file allocation table (FAT) of a file storage system to identify at least one free data cluster associated with a flash memory device; marking as invalid, in response to said evaluating, entries in said FTL mapping table which correspond to said at least one identified free data cluster; and

19. The computer-readable medium of claim 18, wherein the at least one flash memory device is disposed in an electronic device.

20. The computer-readable medium of claim 18, further comprising computer program instructions which, when executed on the one or more processors, enable the one or more processors to cause the file storage system to perform the steps of:

detecting disestablishment of a communication link from said electronic device; and asynchronously performing said steps of evaluating and marking in response to said detecting step.

21. The computer-readable medium of claim 20, wherein said information associated with said FAT table includes entries in said FAT table.

22. The computer-readable medium of claim 18, further comprising computer program instructions which, when executed on the one or more processors, enable the one or more processors to cause the file storage system to perform the steps of:

detecting establishment of a communication link to said electronic device; and

executing a background task to periodically or continuously perform said steps of evaluating and marking in response to said detecting step.

23. The computer-readable medium of claim 22, wherein said steps of evaluating and marking are performed in response to detection of writing to said FAT table.

24. The computer-readable medium of claim 22, wherein said information associated with said FAT table includes information stored in a write buffer.