WO2011159465A3 - Balanced on-die termination - Google Patents

Balanced on-die termination Download PDF

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Publication number
WO2011159465A3
WO2011159465A3 PCT/US2011/038656 US2011038656W WO2011159465A3 WO 2011159465 A3 WO2011159465 A3 WO 2011159465A3 US 2011038656 W US2011038656 W US 2011038656W WO 2011159465 A3 WO2011159465 A3 WO 2011159465A3
Authority
WO
WIPO (PCT)
Prior art keywords
die termination
balanced
signaling link
speed signaling
termination
Prior art date
Application number
PCT/US2011/038656
Other languages
French (fr)
Other versions
WO2011159465A2 (en
Inventor
John Wilson
Joong-Ho Kim
Ravindranath Kollipara
David Secker
Kyung Suk Oh
Original Assignee
Rambus Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rambus Inc. filed Critical Rambus Inc.
Priority to JP2013515364A priority Critical patent/JP2013534100A/en
Priority to CN2011800183308A priority patent/CN102859598A/en
Priority to EP11796154.0A priority patent/EP2583280A4/en
Publication of WO2011159465A2 publication Critical patent/WO2011159465A2/en
Publication of WO2011159465A3 publication Critical patent/WO2011159465A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4086—Bus impedance matching, e.g. termination
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus

Abstract

Termination of a high-speed signaling link is effected by simultaneously engaging on- die termination structures within multiple integrated-circuit memory devices disposed on the same memory module, and/or within the same integrated-circuit package, and coupled to the high-speed signaling link.
PCT/US2011/038656 2010-06-17 2011-06-01 Balanced on-die termination WO2011159465A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2013515364A JP2013534100A (en) 2010-06-17 2011-06-01 Balanced on-die termination
CN2011800183308A CN102859598A (en) 2010-06-17 2011-06-01 Balanced on-die termination
EP11796154.0A EP2583280A4 (en) 2010-06-17 2011-06-01 Balanced on-die termination

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US35567310P 2010-06-17 2010-06-17
US61/355,673 2010-06-17

Publications (2)

Publication Number Publication Date
WO2011159465A2 WO2011159465A2 (en) 2011-12-22
WO2011159465A3 true WO2011159465A3 (en) 2012-02-09

Family

ID=45329690

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2011/038656 WO2011159465A2 (en) 2010-06-17 2011-06-01 Balanced on-die termination

Country Status (5)

Country Link
US (1) US8588012B2 (en)
EP (1) EP2583280A4 (en)
JP (1) JP2013534100A (en)
CN (1) CN102859598A (en)
WO (1) WO2011159465A2 (en)

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See also references of EP2583280A4 *

Also Published As

Publication number Publication date
EP2583280A2 (en) 2013-04-24
WO2011159465A2 (en) 2011-12-22
JP2013534100A (en) 2013-08-29
US8588012B2 (en) 2013-11-19
US20110314200A1 (en) 2011-12-22
EP2583280A4 (en) 2014-06-18
CN102859598A (en) 2013-01-02

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