WO2012021776A3 - Method of forming monolithic cmos-mems hybrid integrated, packaged structures - Google Patents

Method of forming monolithic cmos-mems hybrid integrated, packaged structures Download PDF

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Publication number
WO2012021776A3
WO2012021776A3 PCT/US2011/047537 US2011047537W WO2012021776A3 WO 2012021776 A3 WO2012021776 A3 WO 2012021776A3 US 2011047537 W US2011047537 W US 2011047537W WO 2012021776 A3 WO2012021776 A3 WO 2012021776A3
Authority
WO
WIPO (PCT)
Prior art keywords
chip
mems
substrate
applying
nems
Prior art date
Application number
PCT/US2011/047537
Other languages
French (fr)
Other versions
WO2012021776A2 (en
Inventor
G. Krishna Kumar
Nishit A. Choksi
Joseph M. Chalil
Original Assignee
Advanced Microfab, LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Microfab, LLC filed Critical Advanced Microfab, LLC
Publication of WO2012021776A2 publication Critical patent/WO2012021776A2/en
Publication of WO2012021776A3 publication Critical patent/WO2012021776A3/en

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Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00222—Integrating an electronic processing unit with a micromechanical structure
    • B81C1/00246—Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2207/00—Microstructural systems or auxiliary parts thereof
    • B81B2207/07—Interconnects
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00—Forming microstructural systems
    • B81C2203/07—Integrating an electronic processing unit with a micromechanical structure
    • B81C2203/0707—Monolithic integration, i.e. the electronic processing unit is formed on or in the same substrate as the micromechanical structure
    • B81C2203/0728—Pre-CMOS, i.e. forming the micromechanical structure before the CMOS circuit

Abstract

A method of forming Monolithic CMOS-MEMS hybrid integrated, packaged structures includes the steps of providing: providing a semiconductor substrate with pre-fabricated cmos circuits on the front side and a polished back-side with through substrate conductive vias; forming at least one opening in the polished backside of the semiconductor substrate by appropriately protecting the front- side; applying at least one filler material in the at least one opening on the semiconductor substrate; positioning at least one prefabricated mems, nems or cmos chip on the filler material, the chip including a front face and a bare back face with the prefabricated mems/nems chips containing mechanical and dielectric layers; applying at least one planarization layer overlying the substrate, filler material and the chip; forming at least one via opening on a portion of the planarization layer interfacing pads on the chip and the through substrate conductive vias; applying at least one metallization layer overlying the planarization layer on the substrate and the chip connecting the through substrate conductive vias to the at least one chip; applying at least one second insulating layer overlying the metallization layer; performing at least one micro/nano fabrication etching step to release the mechanical layer on the prefabricated mems/nems chips; positioning protective cap to package the integrated device over the mems/nems device area on the pre-fabricated chips.
PCT/US2011/047537 2010-08-12 2011-08-12 Method of forming monolithic cmos-mems hybrid integrated, packaged structures WO2012021776A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/855,107 US8101458B2 (en) 2009-07-02 2010-08-12 Method of forming monolithic CMOS-MEMS hybrid integrated, packaged structures
US12/855,107 2010-08-12

Publications (2)

Publication Number Publication Date
WO2012021776A2 WO2012021776A2 (en) 2012-02-16
WO2012021776A3 true WO2012021776A3 (en) 2012-05-10

Family

ID=45568206

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2011/047537 WO2012021776A2 (en) 2010-08-12 2011-08-12 Method of forming monolithic cmos-mems hybrid integrated, packaged structures

Country Status (2)

Country Link
US (1) US8101458B2 (en)
WO (1) WO2012021776A2 (en)

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US8101458B2 (en) * 2009-07-02 2012-01-24 Advanced Microfab, LLC Method of forming monolithic CMOS-MEMS hybrid integrated, packaged structures
FR2952427B1 (en) * 2009-11-12 2012-02-24 Sagem Defense Securite RESONATOR COMPRISING A PASSIVATION LAYER, VIBRATING SENSOR COMPRISING SUCH A RESONATOR AND METHOD OF MANUFACTURE
TW201250947A (en) * 2011-05-12 2012-12-16 Siliconware Precision Industries Co Ltd Package structure having a micromechanical electronic component and method of making same
KR101781553B1 (en) * 2011-08-22 2017-09-26 삼성전자주식회사 Capacitive transducer and methods of manufacturing and operating the same
DE102012212445A1 (en) * 2012-07-17 2014-01-23 Robert Bosch Gmbh Micromechanical structure, in particular sensor arrangement, and corresponding operating method
KR102007258B1 (en) * 2012-11-21 2019-08-05 삼성전자주식회사 Method of fabricating optoelectronic substrate
TWI512938B (en) 2013-01-28 2015-12-11 Asia Pacific Microsystems Inc Integrated mems device and its manufacturing method
FR3008690B1 (en) * 2013-07-22 2016-12-23 Commissariat Energie Atomique DEVICE COMPRISING A FLUID CHANNEL PROVIDED WITH AT LEAST ONE MICRO OR NANOELECTRONIC SYSTEM AND METHOD OF MAKING SUCH A DEVICE
US9533162B2 (en) * 2014-08-21 2017-01-03 Boston Scientific Neuromodulation Corporation Use of a dedicated remote control as an intermediary device to communicate with an implantable medical device
US20160090300A1 (en) * 2014-09-30 2016-03-31 Invensense, Inc. Piezoelectric microphone with integrated cmos
US9945727B2 (en) 2014-12-10 2018-04-17 Robert Bosch Gmbh Resistive switching for MEMS devices
CN106032264B (en) * 2015-03-11 2018-02-06 中芯国际集成电路制造(上海)有限公司 A kind of CMEMS devices and preparation method thereof, electronic installation
US9738516B2 (en) * 2015-04-29 2017-08-22 Taiwan Semiconductor Manufacturing Co., Ltd. Structure to reduce backside silicon damage
US9556019B2 (en) * 2015-05-06 2017-01-31 Invensense, Inc. Cavity pressure modification using local heating with a laser
US9443830B1 (en) 2015-06-09 2016-09-13 Apple Inc. Printed circuits with embedded semiconductor dies
US9455539B1 (en) 2015-06-26 2016-09-27 Apple Inc. Connector having printed circuit with embedded die
JP6256431B2 (en) * 2015-08-21 2018-01-10 Tdk株式会社 Magnetic sensor device
CN112764158B (en) * 2020-12-31 2022-09-23 华中光电技术研究所（中国船舶重工集团公司第七一七研究所） Silicon-based photoelectron monolithic heterogeneous integration method
CN116425110B (en) * 2023-06-12 2023-09-19 之江实验室 Wafer-level manufacturing method of high-temperature photoelectric pressure sensing chip with differential structure

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JP2005130071A (en) * 2003-10-22 2005-05-19 Toyo Commun Equip Co Ltd Package structure of piezoelectric device
US20050189644A1 (en) * 2004-02-27 2005-09-01 Kwun-Yao Ho Low coefficient of thermal expansion build-up layer packaging and method thereof
US20070224832A1 (en) * 2006-03-21 2007-09-27 Peter Zurcher Method for forming and sealing a cavity for an integrated MEMS device
US20110027941A1 (en) * 2009-07-02 2011-02-03 Advanced Microfab, LLC Method of forming monolithic cmos-mems hybrid integrated, packaged structures

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US6060336A (en) * 1998-12-11 2000-05-09 C.F. Wan Incorporated Micro-electro mechanical device made from mono-crystalline silicon and method of manufacture therefore
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Publication number Priority date Publication date Assignee Title
US5798283A (en) * 1995-09-06 1998-08-25 Sandia Corporation Method for integrating microelectromechanical devices with electronic circuitry
JP2005130071A (en) * 2003-10-22 2005-05-19 Toyo Commun Equip Co Ltd Package structure of piezoelectric device
US20050189644A1 (en) * 2004-02-27 2005-09-01 Kwun-Yao Ho Low coefficient of thermal expansion build-up layer packaging and method thereof
US20070224832A1 (en) * 2006-03-21 2007-09-27 Peter Zurcher Method for forming and sealing a cavity for an integrated MEMS device
US20110027941A1 (en) * 2009-07-02 2011-02-03 Advanced Microfab, LLC Method of forming monolithic cmos-mems hybrid integrated, packaged structures

Also Published As

Publication number Publication date
US8101458B2 (en) 2012-01-24
US20110027941A1 (en) 2011-02-03
WO2012021776A2 (en) 2012-02-16

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