WO2012079358A1

WO2012079358A1 - Data processing method, apparatus and system

Info

Publication number: WO2012079358A1
Application number: PCT/CN2011/076327
Authority: WO
Inventors: 段灿; 许进; 徐俊
Original assignee: 中兴通讯股份有限公司
Priority date: 2010-12-17
Filing date: 2011-06-24
Publication date: 2012-06-21
Also published as: CN102546079A; CN102546079B

Abstract

The present invention discloses a data processing method, apparatus and system. The method includes: scrambling a data sequence by using a scrambling seed, wherein the data sequence carries a check bit which is used to check the scrambling seed (S102); and transmitting the scrambled data sequence (S104). The present invention can ensure the validity of scrambling seeds, thus avoiding mistakenly descrambling data.

Description

TECHNICAL FIELD The present invention relates to the field of communications, and in particular to a data processing method, apparatus, and system. BACKGROUND OF THE INVENTION Wireless Local Area Networks (WLANs) are wireless network technologies that interconnect computer devices to form a network system that can communicate with each other and share resources. The essence of WLAN is that the communication cable is no longer used to connect the computer to the network, but is connected wirelessly, so that the construction of the network and the movement of the terminal are more flexible. IEEE802.il is one of the mainstream technologies of wireless LAN. This protocol mainly specifies the physical layer (PHY) and media access control (MAC) layer specifications. With the development of mobile communication technology and the increasing demand for wireless networks, the physical layer specification has been moving toward higher and higher speeds, going from 802.11 to 802.11b to 802. Ha/g, then 802.11n, Finally, the development of 802. llac. The channel coding process is as follows: The data information is scrambled by a sequence of random codes and then modulated into OFDM symbols by coding, spatial shunting, modulation, mapping, OFDM modulation, etc., and then transmitted. The scrambling code seed is the initial state of the scrambling code generator. The scrambling code seed at the transmitting end obtains the scrambling code sequence through the scrambling code generator, and then adds 4 to the data information. At the receiving end, the scrambling code sequence is obtained by the same 4 semaphore seed and 4 sigma generator as the transmitting end, and the decoding information is used to implement descrambling. In the related art, the receiving end scrambling code seed is notified by the transmitting end, and if the scrambling code seed has an error during the transmission, the data error after descrambling is caused. SUMMARY OF THE INVENTION The present invention has been made in view of the problems in the prior art that a scrambling code seed has an error during transmission, thereby causing data error after descrambling. To this end, the main object of the present invention is to provide a data processing method, device and system. To solve the above problem. In order to achieve the above object, according to an aspect of the present invention, a data processing method is provided. The data processing method according to the present invention comprises: scrambling a data sequence using a scrambling code seed, wherein the data sequence carries a parity bit, the parity bit is used to verify the scrambling code seed; and the scrambled data sequence is transmitted. The check bits are used to verify a portion of the bits in the scrambling code seed. The partial bits are bits out of the bits in the 4 sigma seed except for the bits corresponding to the tap position of the 4 sigma generator. Scrambling the data sequence using the scrambling code seed includes: generating a random scrambling code sequence using the scrambling code seed; scrambling the data sequence using the random scrambling code sequence.校验 Verify the scrambling seed by parity. In order to achieve the above object, according to an aspect of the present invention, a data processing method is also provided. The data processing method according to the present invention comprises: receiving a scrambled data sequence, wherein the scrambled data sequence uses a scrambling code seed to scramble the data sequence, the data sequence carries a check digit, and the check digit is used. Checking the scrambling code seed; determining that the check digit is correct; using the scrambling code seed to solve the scrambled data sequence. When the check digit is used to check a part of the bits in the scrambling code seed, it is determined that the check digit is correctly included: using all the bits in the bits in the 4 sigma seed to determine that the school-risk is correct , wherein some of the bits are bits other than the bits corresponding to the 4th code generator tap position in the 4th code seed. When the check bit is used to check all the bits in the bit in the scrambling code seed, determining the check bit correctly comprises: using a part of the bits in the scrambling code seed to determine that the check bit is correct, wherein The partial bits are bits out of the bits in the 4 sigma seed except for the bits corresponding to the tap position of the 4 sigma generator. In order to achieve the above object, according to another aspect of the present invention, a data processing apparatus is provided. A data processing apparatus according to the present invention includes: a scrambling module configured to scramble a data sequence using a scrambling code seed, wherein the data sequence carries a parity bit, the parity bit is used to verify the scrambling code seed; the transmitting module, setting To send a scrambled data sequence. In order to achieve the above object, according to another aspect of the present invention, a data processing apparatus is also provided. The data processing apparatus according to the present invention comprises: a receiving module configured to receive the scrambled data sequence 'J, wherein the scrambled data sequence scrambles the data sequence using the scrambling code seed, and the data sequence carries the school The check bit is used to check the scrambling code seed; the determining module is set to determine that the check bit is correct; the descrambling module is set to descramble the scrambled data sequence using the scrambling code seed. In order to achieve the above object, in a further aspect of the invention, a data processing system is provided. A data processing system according to the present invention includes a transmitting end and a receiving end, wherein the transmitting end includes: a scrambling module configured to scramble the data sequence using the scrambling code seed, wherein the data sequence carries a check digit, and the check bit is used for The scrambling code seed is sent; the sending module is configured to send the scrambled data sequence; the receiving end comprises: a receiving module, configured to receive the scrambled data sequence; a determining module, configured to determine that the check digit is correct; the descrambling module , set to descramble the scrambled data sequence using the scrambling code seed. The invention solves the error in the transmission process of the scrambling code seed in the related art by carrying the check digit in the data sequence by the transmitting end and verifying the scrambling code seed by using the check bit by the receiving end, thereby causing the descrambling error The problem of data error can ensure the correctness of the scrambling code seed and avoid the data error. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are set to illustrate,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, 1 is a flow chart 1 of a data processing method according to an embodiment of the present invention; FIG. 2 is a second flowchart of a data processing method according to an embodiment of the present invention; Figure 4 is a flow chart of a data processing method according to a preferred embodiment of the present invention; Figure 5 is a flow chart of a data processing method according to a preferred embodiment 2 of the present invention; Figure 6 is a flowchart of a preferred embodiment of the present invention. a flow chart of three data processing methods; 7 is a flowchart of a data processing method according to a preferred embodiment 4 of the present invention; FIG. 8 is a block diagram showing the structure of a data processing apparatus according to an embodiment of the present invention; FIG. 9 is a block diagram showing the structure of a data processing apparatus according to an embodiment of the present invention. FIG. 10 is a block diagram showing the structure of a data processing system according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS It should be noted that the embodiments in the present application and the features in the embodiments may be combined with each other without conflict. The invention will be described in detail below with reference to the drawings in conjunction with the embodiments. The embodiment of the invention provides a data processing method. 1 is a flow chart 1 of a data processing method according to an embodiment of the present invention. As shown in FIG. 1, the following steps include a step S1 to a step S4. Step S102: Scrambling the data sequence by using the scrambling code seed, wherein the data sequence carries a check digit, wherein the school-risk is used for the school-risk 4 special code seed. Step S104: Send the scrambled data sequence. In the related art, the scrambling code seed may have an error during transmission, thereby causing data error after descrambling. In the embodiment of the present invention, the check bit can be used to check whether the scrambling code seed is correctly transmitted. Therefore, the transmitting end carries the school-risk position in the data sequence and uses the school-risk position to pass the risk through the receiving end. You code seed, can guarantee the correctness of the 4 special code seeds, thus avoiding the solution of the 4 special data. Preferably, the check bits are used to verify a portion of the bits in the scrambling code seed. In the preferred embodiment, the effect of adding 4 especially to the school-risk position is such that when the school-risk is used for a part of the bits in the school-risk 4 special code seed, the scrambled check bit is used. Is the verification of all bits. Preferably, the partial bits are the bits of the bits in the scrambling code seed that are removed from the bits corresponding to the tap position of the scrambling code generator. Preferably, scrambling the data sequence using the scrambling code seed comprises: generating a random scrambling code sequence using the scrambling code seed; scrambling the data sequence using the random scrambling code sequence. Preferably, the odd-school-risk method is used to remedy the 4 yards seed. In the preferred embodiment, the scrambling code seed is verified by means of parity, and the implementation manner is simple and reliable. The embodiment of the invention provides a data processing method. 2 is a second flowchart of a data processing method according to an embodiment of the present invention. As shown in FIG. 2, the following steps include step S202 to step 4: S206. Step S202, receiving the scrambled data sequence, wherein the scrambled data sequence uses a scrambling code seed to scramble the data sequence, where the data sequence carries the scrambling code seed and the check digit, and the check digit is used for Verify the scrambling code seed. In step S204, it is determined that the school-risk position is correct. Step S206, using the scrambling code seed to descramble the scrambled data sequence. Preferably, when the parity bit is used to check a part of the bits in the scrambling code seed, determining the parity bit correctly comprises: determining the parity bit using all of the bits in the scrambling code seed Correctly, some of the bits are bits in the bits in the scrambling code seed except for the bits corresponding to the tap position of the scrambling code generator. Preferably, when the school-risk bit is used for all the bits in the bit in the school-risk 4 semaphore seed, determining the check digit correctly comprises: using a part of the bits in the scrambling code seed to determine the school The bit is correctly verified, and some of the bits are bits other than the bit corresponding to the bit position of the scrambling code generator in the bit in the scrambling code seed. The implementation process of the embodiment of the present invention will be described in detail below with reference to examples. It should be noted that the following preferred embodiments may all be based on an IEEE 802.11 system. Preferred Embodiment 1 FIG. 3 is a schematic diagram of a scrambling code generation formula according to a preferred embodiment of the present invention. As shown in FIG. 3, the scrambling code generation formula is: S(x) = x ⁷ + x ⁴ + l. 4 is a flowchart of a data processing method according to a preferred embodiment of the present invention. As shown in FIG. 4, the transmitting end needs to transmit data with a length of 108 bits, wherein the first 7 bits plus 4 especially the front 0 are used to save 4 The code generator seed is 1001001 and the information bit is 100 bits. Let 4 special code generation be: S(x) = x ⁷ + x ⁴ + l (as shown in Figure 3). Set the 8th bit of the data sequence to the odd parity bit and check all the bits, then the 8th bit of the data sequence is Β ₇ =Β ₀ +Β _λ +Β ₂ +Β ₃ +Β ₄ +Β ₅ +Β ₆ +\ = 1+0+0+ 1+0+0+1+0=0, the scrambling code sequence is generated from the random 4 semaphore seed and the data is scrambled. After the scrambling, the 8th parity bit of the data sequence S ₇ =B ₇ + s ₇ =0+1+1=0, if the decoding is not decoded after the decoding of the receiving end, the first 7 digits of the 4th special code sequence is 1001011 The 8th bit is 0, and the 8th bit of the 4th code sequence is 0 from the 4th code seed. If the partial bit odd check is not satisfied, the scrambling code seed transmission error occurs and needs to be retransmitted. Preferred Embodiment 2 FIG. 5 is a flowchart of a data processing method according to a preferred embodiment 2 of the present invention. As shown in FIG. 5, the transmitting end needs to transmit data with a length of 3080 bits, wherein the first 7 bits plus 4 are especially used for 0. Save 4 special code generator seeds, information bits 3054 bits, the 9th to 16th bits are all reserved bits, then set the 7-bit 4 special code seed to 0101010 when scrambling. Let 4 special code generation be: S(x) = x ⁷ + x ⁴ + l (as shown in Figure 3). Setting the 8th bit of the data sequence to odd parity and partial bit check, the 8th bit of the data sequence is the exclusive OR of the remaining bits of the 4th code seed corresponding to the 4th code generator: Β ₇ =Β _λ + Β ₂ +Β ₄ +Β ₅ +Β ₆ +\ =1+0+0+ 1+0+ 1=1, then generate 4 special code sequences from random 4 special code seeds and add 4 to the data. After the scrambling, the 8th parity bit of the data sequence S ₇ =B ₇ + s ₇ =1+0+1=0, if the decoding is not decoded after the decoding of the receiving end, the first 7 digits of the 4th special code sequence is 0101010 The 8th school-risk is 0, then there is no need to solve 4, especially if the odd parity is satisfied, then the scrambling seed is transmitted correctly. Preferred Embodiment 3 FIG. 6 is a flowchart of a data processing method according to a preferred embodiment 3 of the present invention. As shown in FIG. 6, the transmitting end needs to transmit data with a length of 10016 bits, wherein the first 7 bits plus 4 are especially used for 0. Save 4 special code generator seeds, information bits 10000 bits, the 9th to 16th bits are all reserved bits, the first 16 bits are collectively referred to as the service domain, then the seven-bit scrambling code seed is set to 0100111 during scrambling. Let 4 special code generation be: S(x) = x ⁷ + x ⁴ + l (as shown in Figure 3). Setting the 8th bit of the data sequence to even parity and partial bit check, the 8th bit of the data sequence is the exclusive OR of the remaining bits of the 4th code seed corresponding to the 4th code generator: Β ₇ =Β _λ +Β ₂ +Β ₄ +Β ₅ +Β ₆ = 1+0+1+1+1=0, then generate a 4 y code sequence from the random 4 yum seed and add 4 to the data. After the scrambling, the 8th parity bit of the data sequence is ^ = + ^ =0+0+0=0. If the decoding is not decoded after receiving the data, the first 7 digits of the data sequence are 0100011, 8th. If the position-risk is 0, then there is no need to solve the problem. In particular, it is judged that the even parity is not satisfied, and the scrambling code is transmitted incorrectly. Preferred Embodiment 4 FIG. 7 is a flowchart of a data processing method according to a preferred embodiment 4 of the present invention. As shown in FIG. 7, the transmitting end needs to transmit data with a length of 25201 bits, wherein the first seven bits are 4 尤码 seeds, and the information bits 25193 bit, then set the seven-bit scrambling code seed to 1100001 when scrambling. Let 4 special code generation be: S(x) = x ⁷ + x ⁴ + l (as shown in Figure 3). Set the 8th bit of the data sequence to even parity and check all bits, then the XOR of all bits of the 8th bit of the data sequence: ₇ = + ₂ + ₄ + ₅ + ₆ = 1+1+0+0 +0+0 +1=1, then a random 4 special code seed generates a scrambling code sequence and scrambles the data. After scrambling, the 8th parity bit of the data sequence is scrambled as ^ =3 ₇ + ^ =1+1+0=0. If the decoder is decoded at the receiving end, the first 7 digits of the data sequence are not solved. If it is 1100001 and the 8th bit is 0, it can be judged that part of the bit parity is satisfied, and the scrambling code seed transmission is correct. It should be noted that the steps shown in the flowchart of the accompanying drawings may be performed in a computer system such as a set of computer executable instructions, and, although the logical order is shown in the flowchart, in some cases, The steps shown or described may be performed in an order different from that herein. The embodiment of the invention provides a data processing device, which can be used to implement the above data processing method. FIG. 8 is a block diagram showing the structure of a data processing apparatus according to an embodiment of the present invention. As shown in FIG. 8, a scrambling module 82 and a transmitting module 84 are included. This will be described in detail below. The scrambling module 82 is configured to scramble the data sequence by using the scrambling code seed, wherein the scrambled data sequence carries a check digit, where the check digit is used to check the scrambling code seed; the sending module 84 is connected to the adding The scrambling module 82 is configured to send the scrambled data sequence by the scrambling module 82. The embodiment of the invention provides a data processing device, which can be used to implement the above data processing method. 9 is a structural block diagram 2 of a data processing apparatus according to an embodiment of the present invention, such as As shown in FIG. 9, the receiving module 92, the determining module 94 and the descrambling module 96 are included. This will be described in detail below. The receiving module 92 is configured to receive the scrambled data sequence, wherein the scrambled data sequence uses a scrambling code seed to scramble the data sequence, where the data sequence carries a check digit, and the check digit is used for verifying a scrambling seed; a determining module 94, coupled to the receiving module 92, configured to determine that the school-risk bit received by the receiving module 92 is correct; a solution 4 module 96, coupled to the determining module 94, configured to be used after the determining module 94 determines The scrambling seed descrambles the scrambled data sequence. The embodiment of the invention provides a data processing system, which can be used to implement the above data processing method. FIG. 10 is a structural block diagram of a data processing system according to an embodiment of the present invention. As shown in FIG. 10, a transmitting end 1002 and a receiving end 1004 are provided, which are described in detail below. The sending end 1002 includes: a 4 special module 10022, configured to scramble the data sequence by using 4 special code seeds, wherein the scrambled data sequence carries the scrambling code seed and the check digit, wherein the check digit is used for verifying The receiving module 10024 is configured to send the scrambled data sequence that carries the scrambling code seed and the check bit of the carrying module 10022. The receiving end 1004 includes: a receiving module 10042, configured to receive the scrambling The subsequent data sequence; the determining module 10044 is connected to the receiving module 10042, and is configured to determine that the school-risk bit received by the receiving module 10042 is correct; the solution 4 module 10046 is connected to the determining module 10044, and is set to be determined by the determining module 10044, The scrambled data sequence is descrambled using the scrambling code seed. In summary, according to the above embodiments of the present invention, a data processing method, apparatus and system are provided. The transmitting end carries the check digit in the data sequence and uses the check bit to check the scrambling code seed by the receiving end, which solves the error in the transmission process of the scrambling code seed in the related art, thereby causing data error after descrambling. The problem is that the correctness of the scrambling code seed can be guaranteed, thereby avoiding descrambling data errors. It should be noted that the data processing system described in the device embodiment corresponds to the foregoing method embodiment, and the specific implementation process has been described in detail in the method embodiment, and is not described herein. Obviously, those skilled in the art should understand that the above modules or steps of the present invention can be implemented by a general-purpose computing device, which can be concentrated on a single computing device or distributed over a network composed of multiple computing devices. Alternatively, they may be implemented by program code executable by the computing device, such that they may be stored in the storage device by the computing device, or they may be Each of the integrated circuit modules is fabricated separately, or a plurality of modules or steps thereof are fabricated into a single integrated circuit module. Thus, the invention is not limited to any specific combination of hardware and software. The above is only the preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes can be made to the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the scope of the present invention are intended to be included within the scope of the present invention.

Claims

Claim

1. A data processing method, comprising:

The data sequence is scrambled using a scrambling code seed, wherein the data sequence carries a check digit, and the school-risk bit is used to calibrate the 4th code seed;

Send the data sequence after the addition.

2. The method of claim 1, wherein the check bits are used to verify a portion of the bits in the scrambling code seed.

3. The method according to claim 2, wherein the partial bit is a bit other than a bit corresponding to a bit position of a 4-bit code generator tap position in a bit in the scrambling code seed.

The method according to any one of claims 1 to 3, wherein scrambling the data sequence using the scrambling code seed comprises:

Generate a random 4 special code sequence using 4 尤码 seeds;

The data sequence is scrambled using the random scrambling code sequence.

The method according to any one of claims 1 to 3, wherein the scrambling code seed is verified by means of parity.

6. A data processing method, wherein:

Receiving the scrambled data sequence, wherein the scrambled data sequence is scrambling the data sequence by using a scrambling code seed, where the data sequence carries a check digit, and the check digit is used for verifying The scrambling code seed;

Determining that the school-risk position is correct;

The scrambled data sequence is descrambled using the scrambling code seed.

7. The method according to claim 6, wherein, when the check bit is used to check a part of bits in a bit in the scrambling code seed, determining that the check bit is correct comprises: Determining that the calibrated bit is correct, wherein the partial bit is the punctured position of the scrambling code generator in the bit in the scrambling code seed The bit corresponding to the bit.

8. The method according to claim 6, wherein, when the check bit is used to check all bits in a bit in the scrambling code seed, determining that the check bit is correct comprises: Determining a portion of the bits in the scrambling code seed to determine that the parity bit is correct, wherein the partial bit is a bit corresponding to a tap location of the scrambling code generator in the bit in the scrambling code seed The bit of the bit.

9. A data processing apparatus, comprising:

a scrambling module, configured to scramble the data sequence using a scrambling code seed, wherein the data sequence carries a school-risk position, and the school-risk position is used to calibrate the 4th yard seed;

The sending module is configured to send the scrambled data sequence.

10. A data processing device comprising:

a receiving module, configured to receive the scrambled data sequence, wherein the scrambled data sequence uses a scrambling code seed to scramble the data sequence, where the data sequence carries a check digit, and the school-risk The position is used for school-risk 4 yam seeds;

Determining a module, setting to determine that the school-risk position is correct;

A descrambling module is arranged to descramble the scrambled data sequence using the scrambling code seed.

11. A data processing system comprising a transmitting end and a receiving end, wherein

The sending end includes:

a sending module, configured to send the scrambled data sequence;

The receiving end includes:

a receiving module, configured to receive the scrambled data sequence;