WO2015163800A1

WO2015163800A1 - Compensation for non-linearity in a radio frequency power amplifier

Info

Publication number: WO2015163800A1
Application number: PCT/SE2014/050497
Authority: WO
Inventors: Haiying CAO; Tony FONDÉN; Mats Klingberg
Original assignee: Telefonaktiebolaget L M Ericsson (Publ)
Priority date: 2014-04-24
Filing date: 2014-04-24
Publication date: 2015-10-29

Abstract

There is provided a pre-distorter for compensating for non-linearity in a radio frequency power amplifier (RFPA). The RFPA comprises a transistor having an input terminal, an output terminal, and a control terminal. The pre-distorter is operative to acquire an input sequence. The pre-distorter is operative to determine a compensated RFPA input sequence based on the input sequence and by implementing compensation of non-linearity in the RFPA based on a behaviour model of the RFPA. The behaviour model at least comprises a nonlinear input terminal element and a recursive linear input terminal reflection filter element such that output of the recursive linear input terminal reflection filter element provides input to the nonlinear input terminal element. Separate nonlinear and linear functions for each harmonics are provided in the behaviour model.

Description

COMPENSATION FOR NON-LINEARITY IN A RADIO

FREQUENCY POWER AMPLIFIER

TECHNICAL FIELD

Embodiments presented herein relate to non-linearity in a radio frequency power amplifier, and particularly to a method, a pre-distorter, a computer program, and a computer program product for compensating for nonlinear effects caused by the radio frequency power amplifier.

BACKGROUND

In radio based communication networks it may be a challenge to obtain good performance and capacity for a given communications protocol, its parameters and the physical environment in which the radio based

communication network is deployed.

One component in a radio based communication network is the network node. In general terms, a network node facilitates wireless communication between a wireless electronic device and a network. In order to do so the network node comprises hardware as well as software. A transceiver unit is responsible for transmission and reception of radio signals. The signals to be transmitted from the transceiver unit are provided to a radio frequency power amplifier (RFPA) which amplifies the signals from the transceiver unit before being fed to an antenna. The RFPA maybe integrated with the transceiver unit. In general terms, RFPAs maybe regarded as highly nonlinear elements which commonly inflict distortion on to the signal when driven in compression.

In order to compensate for this, a pre-distorter may be used in order to cancel out the distortion added by the RFPA. In general terms, pre-distortion maybe used to solve, or at least mitigate, the aforementioned issues. The basic idea of digital pre-distortion is to "pre-distort" the original input signal (i.e., to filter the input signal with an inverse nonlinear memory function of the RFPA) before sending to the RFPA. The output signal from the RFPA may thereby become more linear (ideally, the output signal of the RFPA is the original input signal to the RFPA multiply by the gain of the RFPA) and thus the signal information can be maintained.

In general terms, digital pre-distortion techniques utilize an inverse model of the RFPA to compensate for the non-ideality in the RFPA. The selected models for use in digital pre-distortion (or the implemented digital pre- distorter) have impact on the linearization performance of the RFPA.

Two types of models are commonly used in digital pre-distortion. The first type of models is the so-called black box model. According to the black box model, input data and output data of a RFPA is used to calculate model coefficients. The black box model does not require any further information regarding the RFPA being modeled and thus is convenient to use. One example to illustrate the concept of the black box model is the so-called memory polynomial model which is derived from the Volterra series and can be written as y(n) = - mf , (l)

where y and u are the output and input of the RFPA, respectively, where a_{k m} are the model parameters, where N is the nonlinear order, and where M is the memory depth. A summary for different black box RFPA behavioral models can be found in "A comparative overview of microwave and wireless power amplifier behavioral modeling approaches," by Pedro et al, in IEEE

Transactions on Microwave Theory and Techniques, Vol. 53, No. 4, pp. 1150- 1163, April 2005.

The second type of models is the so-called grey-box model. In general terms, this type of model is derived from the circuit topology of RFPA and thus the physical knowledge of the RFPA and other a priori information may be incorporated directly into the model. Compared to the black box model, the grey-box model may have fewer but physically more meaningful, coefficients. One study for using a grey-box model for cancelling memory effects in the fundamental frequency of a Doherty amplifier is made in WO2007/ 117187. In that study, it was found that due to the non-constant load impedance to the amplifier, the drain voltage has large variations.

The above described black-box model uses merely input and output data of the RFPA to identify the model parameters, without knowledge of internal components of the RFPA. The model accuracy is generally sensitive to the selected model structure, the observed data, and also the parameters extraction procedure. The above described grey-box model will be dependent on the number of parameters modeled, and also which parameters that are modeled.

Hence, there is still a need for an improved pre-distorter for RFPAs. SUMMARY

An object of embodiments herein is to provide an improved pre-distorter for RFPAs. The inventors of the enclosed embodiments have realized that the conclusion made above relating to that the drain voltage has large variations is especially true when the RFPA is driven close to saturation. Such drain voltage variations of a Doherty amplifier can be modeled by a linear filtering of the drain current and performing a first order expansion of the trans- conductance and an approximate expression of the inverse behavior of the PA can thus be obtained. However, the above described grey-box model only accounts for the drain circuit of the RFPA and only considers the

fundamental frequency products. Further, any possible interaction between the drain circuit and the gate circuit is neglected. In order to have improved linearization performance of the pre-distorter, the inventors of the enclosed embodiments have realized that more components of the RFPA should be taken into consideration.

A particular object is therefore to provide an improved pre-distorter for radio-frequency power amplifiers based on the internal behaviour of the RFPA. According to a first aspect there is presented a pre-distorter for compensating for non-linearity in a radio frequency power amplifier (RFPA). The pre- distorter comprises a processing unit. The pre-distorter is operative to acquire an input sequence. The pre-distorter is operative to determine a compensated RFPA input sequence based on the input sequence and by implementing compensation of non-linearity in the RFPA based on a behaviour model of the RFPA. The RFPA comprises a transistor having an input terminal, an output terminal, and a control terminal. The behaviour model at least comprises a nonlinear input terminal element and a recursive linear input terminal reflection filter element such that output of the recursive linear input terminal reflection filter element provides input to the nonlinear input terminal element. Separate nonlinear and linear functions for each harmonics are provided in the behaviour model.

Advantageously this provides an improved pre-distorter for RFPAs. Advantageously the pre-distorter may be used to significantly improve the linearity of RFPAs with reasonably low complexity.

Advantageously the pre-distorter maybe used to significantly improve the linearity of RFPAs with reasonably low complexity when the RFPAs are fed with wideband amplitude and phase varying signals. Advantageously the pre-distorter has improved linearization performance for RFPAs with lower complexity compared to widely used black box models.

According to a second aspect there is presented a method for compensating for non-linearity in a radio frequency power amplifier (RFPA). The method is performed by a pre-distorter. The method comprises acquiring an input sequence. The method comprises determining a compensated RFPA input sequence by subjecting the input sequence to a pre-distorter.

The pre-distorter is configured to implement compensation of non-linearity in the RFPA based on a behaviour model of the RFPA. The RFPA comprises a transistor having an input terminal, an output terminal, and a control terminal. The behaviour model at least comprises a nonlinear input terminal element and a recursive linear input terminal reflection filter element such that output of the recursive linear input terminal reflection filter element provides input to the nonlinear input terminal element. Separate nonlinear and linear functions for each harmonics are provided in the behaviour model. According to a third aspect there is presented a computer program for compensating for non-linearity in a radio frequency power amplifier (RFPA), the computer program comprising computer program code which, when run on a processing unit, causes the processing unit to perform a method according to the second aspect. According to a fourth aspect there is presented a computer program product comprising a computer program according to the third aspect and a computer readable means on which the computer program is stored. The computer readable means may be non-transitory computer readable means.

It is to be noted that any feature of the first, second, third and fourth aspects maybe applied to any other aspect, wherever appropriate. Likewise, any advantage of the first aspect may equally apply to the second, third, and/ or fourth aspect, respectively, and vice versa. Other objectives, features and advantages of the enclosed embodiments will be apparent from the following detailed disclosure, from the attached dependent claims as well as from the drawings.

Generally, all terms used in the claims are to be interpreted according to their ordinary meaning in the technical field, unless explicitly defined otherwise herein. All references to "a/an/the element, apparatus, component, means, step, etc." are to be interpreted openly as referring to at least one instance of the element, apparatus, component, means, step, etc., unless explicitly stated otherwise. The steps of any method disclosed herein do not have to be performed in the exact order disclosed, unless explicitly stated.

BRIEF DESCRIPTION OF THE DRAWINGS

The inventive concept is now described, by way of example, with reference to the accompanying drawings, in which: Fig l is a schematic diagram illustrating a communications network according to embodiments;

Fig 2a is a schematic diagram showing functional units of a pre-distorter according to an embodiment;

Fig 2b is a schematic diagram showing functional modules of a pre-distorter according to an embodiment;

Fig 3 is a schematic diagram of a network node according to an embodiment;

Fig 4 shows one example of a computer program product comprising computer readable means according to an embodiment;

Figs 5 and 6 are flowcharts of methods according to embodiments;

Fig 7 is a block diagram of an RFPA according to an embodiment;

Figs 8-14 schematically illustrate block diagrams relating to a behavioural model of an RFPA according to embodiments; and

Figs 15-20 schematically illustrate block diagrams relating to a pre-distorter according to embodiments.

DETAILED DESCRIPTION

The inventive concept will now be described more fully hereinafter with reference to the accompanying drawings, in which certain embodiments of the inventive concept are shown. This inventive concept may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided by way of example so that this disclosure will be thorough and complete, and will fully convey the scope of the inventive concept to those skilled in the art. Like numbers refer to like elements throughout the description. Any step or feature illustrated by dashed lines should be regarded as optional.

Fig 1 shows a schematic overview of an exemplifying communications system 11 where embodiments presented herein can be applied. The communications system 1 comprises a network node (NN) 13 providing network coverage over cells (not shown). The network node 13 maybe any of a base transceiver station (BTS), a Node B (NB), or an E-UTRAN Node B, also known as

Evolved Node B, (eNodeB or eNB), or a WiFi hotspot access point. In general terms, the network node 13 facilitates wireless communication between a user equipment (UE) in the form of a wireless electronic device (ED) 14 and a network. In order to do so the network node 13 comprises hardware as well as software. A wireless electronic device 14 positioned in a particular cell (not shown) is thus provided network service by the network node 13 serving that particular cell. Examples of wireless electronic devices 14 include, but are not limited to mobile phones, tablet computers, laptop computers, and stationary computers.

The network node 13 is operatively connected to a core network 15. The core network 15 may provide services and data to the wireless ED 14 operatively connected to the network node 13 from an external Internet Protocol (IP) packet switched data network 16. At least parts of the communications system 11 may generally comply with any one or a combination of W-CDMA (Wideband Code Division Multiplex), LTE (Long Term Evolution), EDGE (Enhanced Data Rates for GSM Evolution, Enhanced GPRS (General Packet Radio Service)), CDMA2000 (Code Division Multiple Access 2000), WiFi, microwave radio links, High Speed Packet Access (HSPA) etc., as long as the principles described hereinafter are applicable. As the skilled person understands, the communications system 11 may comprise a plurality of network nodes 13 and a plurality of EDs 14 operatively connected to at least one of the plurality of network nodes 13.

Respective transceiver units are in the network node 13 and in the wireless electronic device 14 responsible for transmission and reception of radio signals. The signals to be transmitted from the transceiver units are provided to a radio frequency power amplifier (RFPA) which amplifies the signals from the transceiver unit before being fed to an antenna. A respective RFPA may be integrated with the respective transceiver units. The power amplifiers may be required to be "linear", in that it should accurately reproduce the signal presented at its input. In general terms, an amplifier that compresses its input or has a non-linear input/output relationship causes the output signal to leak onto adjacent radio frequencies (cf. adjacent channel leakage ratio, ACLR). This causes interference on other radio channels. The network node 13 and/ or the wireless electronic device 14 therefore comprises a pre-distorter (PD) 12. In general terms, the pre- distorter 12 aims at inversely model the RFPA's gain and phase

characteristics and, when combined with the pre-distorter 12, aims at producing an overall system that is more linear and reduces the RFPA's distortion. In essence, the pre-distorter 12 is based on the principle of estimating and applying the inverse nonlinear function of the RFPA, thereby cancelling any non-linear distortion effects of the RFPA, which in turn assures minimal disturbance on neighbouring channels. The pre-distorter 12 will be further disclosed below.

As is known by the skilled person, each one of the network node 13 and/ or the wireless electronic device 14 may comprise further units, such as a combiner for combining signals from at least two transceiver units to one antenna, a duplexer for separating transmission signals from reception signals, a control unit for controlling the functionality of the network node 13 and/or the wireless electronic device 14, etc. Fig 7 is a simplified block diagram of an RFPA 31. The block diagram comprises an input matching network, a nonlinear gate circuit, a nonlinear drain circuit, and an output matching network. The input matching network is represented by a radio frequency (RF) drive comprising a voltage source and an input impedance z₀,in. The nonlinear gate circuit is represented by gate bias and RF input matching filters coupled to the RF drive and supplied with a Vgate supply voltage. The nonlinear drain circuit is represented by drain bias and RF output matching filters coupled to an RF load and supplied with a Vdrain supply voltage. A transistor 31a is symbolically placed between the nonlinear gate circuit and the nonlinear drain circuit. Together, the nonlinear gate circuit and the nonlinear drain circuit represent properties of the transistor 31a. The output matching network is represented by the RF load comprising an output impedance z₀,out. The nonlinear gate circuit and the nonlinear drain circuit represent properties of a transistor. As the skilled person understands the RFPA 31 may comprise more than one transistor 31a.

In general terms, RFPAs tend to be sensitive to voltage deviations when operating close to its saturation region. This may particularly be the case for the drain circuit which commonly is more nonlinear than the gate circuit.

The embodiments disclosed herein relate to compensating for non-linearity in RFPAs 31. In order to obtain such compensation there is provided a pre- distorter, a method performed by the pre-distorter, a computer program comprising code, for example in the form of a computer program product, that when run on a processing unit, causes the processing unit to perform the method. Particularly, the enclosed embodiments are based on introducing a (digital) pre-distorter for nonlinear RFPAs 31 with memory effects. The pre- distorter is based on a grey-box modeling approach involving linear and nonlinear functions. Fig 2a schematically illustrates, in terms of a number of functional units, the components of a pre-distorter 12 according to an embodiment. A processing unit 21 is provided using any combination of one or more of a suitable central processing unit (CPU), multiprocessor, microcontroller, digital signal processor (DSP), application specific integrated circuit (ASIC), field programmable gate arrays (FPGA) etc., capable of executing software instructions stored in a computer program product 31a, 31b (as in Fig 3), e.g. in the form of a storage medium 23. If implemented as an ASIC (or an FPGA) the processing unit 21 may by itself implement such instructions. Thus the processing unit 21 is thereby arranged to execute methods as herein disclosed. The a storage medium 23 may also comprise persistent storage, which, for example, can be any single one or combination of magnetic memory, optical memory, solid state memory or even remotely mounted memory. The pre-distorter 12 may further comprise a communications interface 22 for receiving input to the pre-distorter and for providing output from the pre-distorter 12. The processing unit 21 controls the general operation of the pre-distorter 12 e.g. by sending data and control signals to the communications interface 22 and the storage medium 23, by receiving data and control signals from the communications interface 22, and by retrieving data and instructions from the storage medium 23. Other components, as well as the related functionality, of the pre-distorter 12 are omitted in order not to obscure the concepts presented herein.

Fig 2b schematically illustrates, in terms of a number of functional modules, the components of a pre-distorter 12 according to an embodiment. The pre- distorter 12 of Fig 2b comprises a number of functional modules; an acquire module 22a, and a determine module 22b. The pre-distorter 12 of Fig 2b may further comprises a number of optional functional modules, such as a provide module 22c. The functionality of each functional module 22a-c will be further disclosed below in the context of which the functional modules 22a-c maybe used. In general terms, each functional module 22a-c maybe implemented in hardware or in software. The processing unit 21 may thus be arranged to from the storage medium 23 fetch instructions as provided by a functional module 22a-c and to execute these instructions, thereby performing any steps as will be disclosed hereinafter.

The pre-distorter 12 maybe provided as a standalone device or as a part of a further device. For example, the pre-distorter 12 may be provided in a network node 13 and/ or a wireless electronic device 14. Fig 3 illustrates a network device, such as a network node 13 or a wireless electronic device 14, comprising at least one pre-distorter 12 as herein disclosed. The pre-distorter 12 may be provided as an integral part of the network device. That is, the components of the pre-distorter 12 maybe integrated with other components of the network device; some components of the network device and the pre- distorter 12 maybe shared. For example, if network device as such comprises a processing unit, this processing unit may be arranged to perform the actions of the processing unit 22 associated with the pre-distorter 12.

Alternatively the pre-distorter 12 maybe provided as a separate unit in the network device. The network device may be a BTS, a NodeB, an eNB, a UE, or the like. The network device further comprises an RFPA 31 with functionality as disclosed above. Figs 5 and 6 are flow chart illustrating embodiments of methods for compensating for non-linearity in RFPAs 31. The methods are performed by the processing unit 22. The methods are advantageously provided as computer programs 32. Fig 3 shows one example of a computer program product 31 comprising computer readable means 33. On this computer readable means 33, a computer program 32 can be stored, which computer program 32 can cause the processing unit 21 and thereto operatively coupled entities and devices, such as the communications interface 22 and the storage medium 23, to execute methods according to embodiments described herein. The computer program 32 and/ or computer program product 31 may thus provide means for performing any steps as herein disclosed.

In the example of Fig 3, the computer program product 31 is illustrated as an optical disc, such as a CD (compact disc) or a DVD (digital versatile disc) or a Blu-Ray disc. The computer program product 31 could also be embodied as a memory, such as a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), or an electrically erasable programmable read-only memory (EEPROM) and more particularly as a non-volatile storage medium of a device in an external memory such as a USB (Universal Serial Bus) memory. Thus, while the computer program 32 is here schematically shown as a track on the depicted optical disk, the computer program 32 can be stored in any way which is suitable for the computer program product 31.

Reference is now made to Fig 5 illustrating a method for compensating for non-linearity in an RFPA 31 according to an embodiment. The processing unit 22 is operative to, in a step S102, acquire an input sequence u. The acquiring maybe performed by executing functionality of the acquire module 22a. The computer program 42 and/or computer program product 41 may thus provide means for this acquiring. The input sequence u is the input sequence that, without the use of the disclosed pre-distorter 12 would have been provided to the RFPA 31. The processing unit 22 is operative to, in a step S104, determine a

compensated RFPA input sequence u_pre based on the input sequence u. The compensated RFPA input sequence u_pre is determined by implementing compensation of non-linearity in the RFPA 31 based on a behaviour model 32 of the RFPA 31. The determining may be performed by executing

functionality of the determine module 22b. The computer program 42 and/or computer program product 41 may thus provide means for this determining.

The RFPA 31 comprises a transistor 31a having an input terminal, an output terminal, and a control terminal. Examples of the input terminal, the output terminal, and the control terminal will be provided below.

The behaviour model 32 comprises a nonlinear input terminal element 32ε. The behaviour model 32 further comprises a recursive linear input terminal reflection filter element 32f. According to the behaviour model 32 output of the recursive linear input terminal reflection filter element provides input to the nonlinear input terminal element.

Further, separate nonlinear and linear functions for each harmonics are provided in the behaviour model 32. Overtones of the harmonics may or may not be considered in the nonlinear and linear functions.

Reference is now made to Fig 6 illustrating methods for compensating for non-linearity in an RFPA 31 according to further embodiments.

Once the compensated RFPA input sequence has been determined it maybe used as input to the RFPA 31. According to embodiments the processing unit 22 is therefore operative to, in an optional step S106, provide the

compensated RFPA input sequence to the RFPA 31. The output of the RFPA 31 will thereby be an amplified version of the input to the pre-distorter 12. The providing may be performed by executing functionality of the provide module 22c. The computer program 42 and/or computer program product 41 may thus provide means for this providing. Embodiments relating to further details of compensating for non-linearity in RFPAs 31 will now be disclosed.

The input sequence of the pre-distorter 12 maybe a modulated baseband representation of a signal to be transmitted at fundamental frequency. As noted above the RFPA 31 comprises a transistor 31a having an input terminal, an output terminal, and a control terminal. When implemented as a metal-oxide-semiconductor field-effect transistor (MOSFET) the input terminal corresponds to the drain terminal of the MOSFET, the output terminal corresponds to the source terminal of the MOSFET, and a control terminal corresponds to the gate terminal of the MOSFET. When

implemented as a bipolar junction transistor (BJT) the input terminal corresponds to the collector terminal of the BJT, the output terminal corresponds to the emitter terminal of the BJT, and a control terminal corresponds to the base terminal of the BJT. Without loss of generality it is hereinafter assumed that the transistor is implemented as a MOSFET.

However, as the skilled person understands, the herein embodiments are equally applicable where the transistor is implemented as a BJT. As the skilled person further understands, the RFPA 31 may comprise more than one transistor 31a. Thus, generally the RFPA 31 comprises at least one transistor 31a. For example, multiple transistors 31a maybe used in parallel to increase the output power of the RFPA 31.

Thus, according to embodiments the disclosed pre-distorter 12 is based on a grey-box model having a nonlinear drain circuit, which comprises at least one static nonlinear function and a linear drain reflection filter. The drain reflection filter is a recursive filter such that the output of the drain reflection filter is used as one of the inputs to the nonlinear drain circuit.

Further, according to embodiments the disclosed pre-distorter 12 is based on a greybox model which may include higher harmonics which have their own nonlinear and linear functions. Further embodiments relating to the behaviour model 32 of the RFPA 31 will now be described in turn with general references to Fig 8.

According to embodiments the at least one nonlinear function is configured to model input terminal current variations due to nonlinear control terminal- to-input terminal and input terminal-to-input terminal trans-conductance in the RFPA. The recursive linear input terminal reflection filter element may be configured to model frequency-dependent load impedance of the transistor in the RFPA 31.

According to embodiments the behaviour model 32 further comprises a first linear filter element 32a positioned upstream the nonlinear input terminal element in the behaviour model. The first linear filter element 32a is configured to model memory effects and/or nonlinearity of the RFPA 31.

According to embodiments the behaviour model 32 further comprises a second linear filter element 32g positioned downstream the nonlinear drain element in the behaviour model 32. The second linear filter element 32g is configured to model memory effects and/or nonlinearity of the RFPA 31.

According to embodiments the behaviour model 32 further comprises a nonlinear gate element 32b positioned upstream the nonlinear input terminal element in the behaviour model 31. The nonlinear control terminal element 32b implements at least one nonlinear function and a recursive linear control terminal reflection filter element 32c such that output of the recursive linear control terminal reflection filter element provides input to the nonlinear function. The recursive linear control terminal reflection filter element is configured to model frequency-dependent control terminal impedance in the RFPA 31. The at least one nonlinear function is configured to model control terminal voltage variations of intrinsic control terminal voltage in the RFPA 31.

The nonlinear control terminal element may be positioned downstream the first linear filter element in the behaviour model 31. According to embodiments the behaviour model 32 further comprises a linear control terminal element and a linear filter 32a positioned upstream the nonlinear input terminal element in the behaviour model 32. The linear control terminal element and the linear filter is configured to model a control terminal circuit in the RFPA.

According to embodiments the behaviour model 32 further comprises a feedback filter element 32d positioned so as to provide feedback from the nonlinear input terminal element to the nonlinear control terminal element or the linear control terminal element. The feedback filter element 32d is configured to model at least one of memory effects of the RFPA 31 and nonlinearity originating from feedback between the input terminal and the control terminal of the transistor in the RFPA 31.

According to embodiments the behaviour model 32 comprises separate linear filters for baseband parts of the input sequence and for fundamental radio- frequency parts of the input sequence. The separate linear filters are configured to interact such that signal components from the fundamental radio-frequency parts are used for the linear filters for the baseband parts. The separate linear filters are configured to interact such that signal components from the baseband parts are used for the linear filters for the fundamental radio-frequency parts. According to embodiments the behaviour model 32 comprises coupled nonlinear functions for baseband parts of the input sequence and for fundamental radio-frequency parts of the input sequence. Each frequency component in the nonlinear functions may thus depend on the other frequency components; each nonlinear function may take all frequency components as input.

According to embodiments the behaviour model 32 comprises separate linear filters for at least second order harmonics parts of the input sequence. The separate linear filters for the at least second order harmonics parts of the input sequence are configured to interact with the separate linear filters for the baseband parts of the input sequence and for the fundamental radio- frequency parts of the input sequence. According to embodiments the l6 behaviour model 32 comprises coupled nonlinear functions for at least second order harmonics parts of the input sequence. Each frequency component in the nonlinear functions may thus depend on the other frequency components; each nonlinear function may take all frequency components as input.

Particular embodiments relating to the behaviour model 32 of the RFPA 31 will now be described in turn.

The behaviour model 32 is derived directly from the circuit topology of the RFPA 31, for example as illustrated in Fig 7. Next the derivation of the RFPA behavioral model 32 will be disclosed. This behavioral model may be used to model the baseband, fundamental RF and higher harmonics products of the RFPA 31.

The block diagram of Fig 8 provides an overview of the behavioral model 32 for the RFPA 31 of Fig 7. The herein disclosed behavioral model 32 is based on a separation of the memory and nonlinearity. The transistor 31a of the RFPA 31 is considered as an intrinsic transistor and to be strictly memoryless. Thus the instantaneous transistor currents are supposed to be given by the instantaneous transistor voltages. As such, the nonlinear gate circuit block 32b and the nonlinear drain circuit block 32ε in Fig 8 are considered to be memoryless. The input filter 32a, the output filter 32g, and the drain-gate feedback filter 32d are considered to be linear. These linear filters 32a, 32g, 32d maybe used to model the memory effects of the RFPA 31. Especially, the linear drain-gate feedback filter 32d may be used to account for long-term memory of the RFPA 32.

The block diagram of Fig 8 may be simplified if only a linear gate circuit 32b is considered and/or the linear feedback filter 32d is neglected. Figs 9 and 10 show examples such simplified block diagrams. Fig 9 is a block diagram of a simplified behavioral model without any feedback filter. Fig 10 is a block diagram of a simplified behavioral model considering only a linear gate circuit and without any feedback filter. Any linear filter used to model the gate circuit maybe incorporated into the linear input filter, which thus is only denoted as a linear filter 32a in Fig. 10.

The following notations will be used hereinafter: u[n] denotes the original input signal at time instant (or sample number) n. w [n] denotes the signal after the input filter 32a.

Ui [n] denotes the input signal to the gate circuit 32b. ig,o[n] denotes the output current at baseband from the gate circuit 32b. ig[n] denotes the output current at fundamental RF from the gate circuit 32b. i>g,₀[n] denotes the output voltage at baseband from the gate circuit 32c. u_g[n] denotes the output voltage at fundamental RF from the gate circuit 32c. id,o[n] denotes the output current at baseband from the drain circuit 32ε. id[n] denotes the output current at fundamental RF from the drain circuit 32e. i>d,o[n] denotes the output voltage at baseband from the drain circuit 32f.

Ud[n] denotes the output voltage at fundamental RF from the drain circuit 32f. i^d,g[n] denotes the output signal of the drain-gate feedback filter 32d. Zdd[n] denotes the drain impedance of the transistor 31a. Zgg[n] denotes the gate impedance of the transistor 31a.

Zin[n] denotes the filter coefficients of the input matching network 32a. Z₀ut[n] denotes the filter coefficients of the output matching network 32g. l8 y[n] denotes the output signal from the behavior model 32.

In general terms, all signals are considered as equivalent complex/real baseband depending on their representations of baseband or fundamental RF or higher harmonics, and sampled in digital domain. In general terms, all the

M

filter coefficients are normalized, e.g., ^ Z_dd (m) =1.

m-l

The drain circuit is commonly nonlinear. From Fig 8, it is understood that the fundamental RF drain current, id, is a memoryless nonlinear function of the fundamental and baseband RF gate output voltages v_g, u_g,₀ and the fundamental and baseband RF drain voltages ι¾ Vd,o. The output current id at fundamental RF from the drain circuit 32ε may thus be written as follows:

where i=o, 1, 2, 3, ... . The fundamental RF drain voltage, Vd, and the output signal, y, may by means of filtering the drain current be written as follows:

M

vd (ⁿ) =∑^Zdd (^m) - ^ld (ⁿ - ^m) (3)

m=\

M

y (n ) =∑ Z _out (m ) - i_d (n - m ) (4)

m - l

It is to be noted that v_g (n) may be expressed similarly as v_d (n) but with the summation in Equation (3) taken over i_g (n - m) instead of over i_d (n - m). Further, the expression for v_d (n) and the corresponding expression for v_g (n) may further be expanded over N harmonics, where the notations v_{d j} (n) and v_{g i} (n) for 1=0, N-i thus represent the (i-i):th harmonics of v_d (n) and v_g (n) , respectively.

The term "static" is generally to be interpreted as defining that the input signal of the behavior model (which is the fundamental RF gate output voltage in the drain circuit model) is constant for infinite long time. The static drain currents (both baseband and fundamental RF) are nonlinear function of the fundamental RF gate output voltage and the static drain voltages (both baseband and fundamental RF) are a filtered version of the static drain currents. They may be written as follows:

where v_g is the normalized fundamental RF gate output voltage, /is a memoryless nonlinear function, Z_{d 0} (m) and Z_{d l} (m) are the baseband and fundamental RF drain impedance, respectively.

Assuming the deviation of the instantaneous drain voltage from its static value, which is introduced by the frequency dependency of the matching network, is small enough, the deviation of the drain voltage/ current may be approximated by using a first order expansion as follows: a d,0 d,0

)

&_d (ⁿ)

- Z_{d X} (m)^■ f_x (|v_g («)|) · v_g (n) where all the g functions are memoryless nonlinear functions and * denotes conjugate operation. Using Equations (s)-(6) and (9)-(io), the baseband and fundamental RF drain currents can then be written as follows:

+ ¾o g |) - ¾ - &d,o + gd,n< ^v _g \) - &d + gjM< ^v _g\) - V_g ² - dv_d ^* This means that the instantaneous currents may be expressed as the static currents plus the first order expansion of the current deviations. Block diagrams to illustrate such behavioral models for the baseband and fundamental RF drain circuits 32e, 32e' of the RFPA 31 are shown in Fig 11 and Fig 12, respectively. The filter with the drain baseband impedance Zd,₀ (at the lower branch) in Fig 11 is recursive, as it also uses the output as the input to the filter. The same applies for the filter with the fundamental RF impedance _d,i in Fig. 12. In both Fig 11 and 12 the drain reflection

coefficients are assumed to be linearized.

The gate circuit may not be as nonlinear compared as the drain circuit.

However, if the gate source capacitance behaves nonlinearly, a nonlinear gate circuit behavioral model may be used.

The baseband and fundamental RF frequency gate voltage deviations (i.e., the difference between instantaneous gate voltages and their static values) may be defined as follows:

M,

dv_gfi {n) = v g,o (°) · i_gfi (ⁿ) =∑ g,o O) *g,o (ⁿ - ^m ) (13) Zg,i (^w)^■ (ⁿ - ^m (14)

By using a similar first order expansion approach as for the drain circuit, the baseband and fundamental gate currents can be written as follows:

(16)

8

It may here be assume that i («) generally maybe written as a function of

Figs 13 and 14 are block diagrams of the baseband and fundamental RF frequency gate circuits 32b, 32b' of the behavioral model 32, respectively. The FIR filters with baseband gate impedance Z_g,₀ in Fig 13 and the fundamental RF gate impedance Z_g,iin Fig 14 are recursive filters. .In both Fig 13 and 14 the gate reflection coefficients are assumed to be linearized.

If a nonlinear gate circuit model is considered, the first order approximation terms in 5v_gfi may need to be considered at the drain circuit. Therefore,

Equations (11) and (12) may be needed to be modified accordingly and thus become as follows:

ι⁽ Κ^+· _(l8)

By comparing Equations (17) and (18) with the previous definitions of the drain currents as in Equations (11) and (12) it follows that Equations (17) and (18) comprise signal components generated with the baseband gate deviation voltage. To model, for example, memory effects of the RFPA 31, such as long term memory effects (but also short-term memory effects), a linear drain-to-gate feedback filter 32d may used in the behavioral model 32. The modeled output signal, Wd,g, may be written as the summation of the filtered drain voltage and current as follows:

M_v M,

wd,_g (ⁿ) =∑K (^m) · ^vd (ⁿ - ^m) +∑ (^m)^■ (n - m) (19)

m-l m-l where h_v (m) and/¾, (m) are voltage and current feedback filters, respectively. However, for a given drain load impedance, the drain voltage and current maybe regarded as dependent. Therefore, only one feedback filter may be enough and the input signal to the gate circuit v_i , as shown in the block diagram of Fig 8, maybe written as

_Vi {n) = w(n) + w_{d g} (n) = ...

M, M_f (₂₀)

=∑ ^zm (m)u(n - m) +∑h_f {m)i_d (n - m)

m-0 m-l where w(n) is the signal after the input matching network 32a, andh_f (m) and Z_in (m) are the total feedback and input filter coefficients, respectively.

Further embodiments relating to the pre-distorter 12 will now be described in turn with general references to Fig 15.

According to embodiments the pre-distorter 12 further comprises a nonlinear input terminal pre-distorter element 12b. The nonlinear input terminal pre- distorter element 12b is configured to compensate for input terminal current variations due to nonlinear control terminal-to-input terminal and input terminal-to-input terminal trans-conductance in the RFPA 31. According to embodiments the pre-distorter 12 further comprises a linear input terminal reflection filter element 12c configured to compensate for frequency- dependent load impedance of the transistor 31a in the RFPA 31.

According to embodiments the pre-distorter 12 further comprises a second linear inverse filter pre-distorter element I2f. The second linear inverse filter pre-distorter element i2f is configured to compensate for at least one of the memory effects of the RFPA 31 and for nonlinearity due to frequency dependency according to a transfer function between output of the pre- distorter 32 and any components (such as the RFPA 31) operatively connected to the output of the pre-distorter 12.

According to embodiments the pre-distorter 12 further comprises a first linear inverse filter pre-distorter element 12a. The first linear inverse filter pre-distorter element 12a is configured to compensate for at least one of the memory effects of the RFPA 31 and for nonlinearity due to frequency dependency according to a transfer function between input of the pre- distorter 12 and components operatively connected to the input of the pre- distorter 12 and/ or a transfer function of the RFPA 31.

According to embodiments the pre-distorter 12 further comprises a nonlinear control terminal pre-distorter element implementing a linear inverse control terminal reflection filter element i2d and at least one nonlinear pre-distorter function I2e. The linear inverse control terminal reflection filter element I2d is configured to compensate for the frequency-dependent control terminal impedance in the RFPA 31. The at least one nonlinear pre-distorter function i2e is configured to compensate for the control terminal voltage variations of linear intrinsic control terminal voltage in the RFPA 31.

According to embodiments the nonlinear control terminal pre-distorter element is positioned downstream the first linear inverse filter pre-distorter element.

According to embodiments the pre-distorter 12 further comprises a linear control terminal pre-distorter element I2f. The linear filter corresponds to a linear pre-distorter filter 32a. The linear filter pre-distorter element and the linear pre-distorter filter are configured to compensate for the control terminal circuit in the RFPA 31.

According to embodiments the pre-distorter 12 further comprises a feedforward filter pre-distorter element i2g. The feed-forward filter pre-distorter element i2g is configured to compensate for the at least one of memory effects of the RFPA 31 and for the nonlinearity originating from the feedback between the input terminal and the control terminal of the transistor 31a in the RFPA 31.

According to embodiments the pre-distorter 12 comprises separate nonlinear functions and linear filters for baseband parts of the input sequence and a fundamental radio-frequency part of the input sequence The separate nonlinear functions and linear filters are configured to interact such that signal components from the fundamental radio-frequency parts are used for the nonlinear functions and linear filters for the baseband parts. The separate nonlinear functions and linear filters are configured to interact such that signal components from the baseband parts are used for the nonlinear functions and linear filters for the fundamental radio-frequency parts.

According to embodiments the pre-distorter 12 comprises separate nonlinear functions and linear filters for at least a second order harmonics part of the input sequence The separate nonlinear functions and linear filters for the at least a second order harmonics part of the input sequence are configured to interact with the separate nonlinear functions and linear filters for the baseband parts of the input sequence and for the fundamental radio- frequency parts of the input sequence.

Particular embodiments relating to the pre-distorter 12 will now be described in turn.

Equations (9)-(2o) have described a behavioral model 32 for the RFPA 31. The behavioral model 32 utilizes linear filters 32a, 32g at the input and output matching networks (corresponding to the RF drive and the RF load, respectively, of the RFPA 31) and drain-gate feedback filter 32d for modeling (both short and long term) memory effects. The nonlinearity of the RFPA 31 is generally modeled separately by two memoryless nonlinear functions (one for the gate nonlinearity 32b and one for the drain nonlinearity 32e). In order to use such a behavioral model 32 in practice (e.g., to linearize a specific RFPA 31), a pre-distorter 12 which is an (approximately) inverse function of the RFPA behavioral model 32 may be used. In general terms, to derive the pre-distorter 12 involves obtaining an output signal from the pre-distorter given a known original input signal u. In practice, the output signal y of the RFPA 31 should be as similar to the input signal u as possible, where y is an amplified version of u, see Fig 3. In theory, an ideal pre-distorter 12 should have the exact inverse function of the RFPA behavioral model 32. One possible way to derive the pre-distorter 12 is to use the original input signal u as output and the original output signal y as input. One of the benefits to do so is that the pre-distorter 12 may have a similar (or the same) structure as the RFPA behavioral model 32. A two-step approach is used to derive the desired pre-distorted output signal u_pre.

According to the two-step approach a gate output signal is first determined based on the known output signal y from the RFPA 31. The thus obtained gate output signal is then used to determine the input signal to the gate.

Summing this input signal with the filtered signal at the feedback path produces the final pre-distorted output signal u_pre.

The block diagram of Fig 16 provides an overview of the pre-distorter 12. This block diagram is similar to that of Fig 9. Each element of the block diagram in Fig 16 may have a corresponding element in the block diagram of Fig 9. In Fig 16 id,o and ig,o are signals from the drain and gate, respectively, in the behavioral model 32.

One principle behind the pre-distorter 12 is to use the output signal of the RFPA 32 to obtain the input signal of the pre-distorter (which is denoted a pre-distorted signal) through the same, or at least similar, model structure as the behavioral model 32. Therefore, the desired output signal (i.e., the input signal u to the pre- distorter 12) is after an inverse output filter 12a is fed to a drain circuit pre- distorter element 12b and filter 12c which generate a pre-distorted version of the gate voltage u_g. This signal is then used as an input to a gate circuit pre- distorter filter i2d and element 123 to generate a pre-distorted signal w which is summed together with a signal Wd,g from a feed-forward filter I2g and provides input to an inverse input filter I2f so as to form the final pre- distorted signal u_pre.

As described above, the input signal to the pre-distorter 12 is actually what is desired at the output of the RFPA 31 (if disregarding the gain factor of the RFPA 31).

Taking the inverse response of the output filter 32g the fundamental RF drain current maybe expressed as follows:

M

i_d ^) = _ouAm) - u{n - m) (21)

m-l

Then, the drain voltage v_{d l} maybe estimated as filtering the estimated drain current. That is:

The baseband drain voltage may be obtained from filtering the modelled supply baseband current i_{d 0} as follows:

M

v_d,0 (n) =∑Z_{d 0} (m) - i_{d 0} (n - m) (23)

m-l Now, if Equation (14) is used in Equation (18), then Equation (18) can be rewritten as follows: 0) = f_d,i (|^v _g 0)|) · v_g n) + g_{d w} (|v_g (w)|) · v_g (n)^■ dv_{d 0} (n) + ...

+ g_d,w_g (\^v _g 0)|) · v_g (n)^■ · ... (24)

^■ &d (ⁿ) + g_d,n (\^v _g (ⁿ)\)^■ v_g (nf ^■ Sv_d ^* (n) and Equation (24) maybe further re-written as follows: (ⁿ) = fax (|^vg (ⁿ)\)^■ v_g (n) + g_d,10 (|v_g (w)|) · v_g (n)^■ Sv_{d 0} (n) + ...

+ g_d,_Wgm ^{( (}"Φ ' V_g (■") -∑^v _g (ⁿ - ^m) + g_d,n (\^v _g ^(«)|⁾ · · · · (²5)

m-l

^■ &d (ⁿ) + gc_,n

v_g (nf ^■ δν (n)

Using Equations (10), (22), (23), and (25) and the fact that the linear filter coefficients are normalized, the "pre-distorted" version of the output gate voltage maybe expressed as follows: in) =

+ g_d,w_gm i_d ² (n)^■ v^* (n)

(26)

Equation (26) thus has signal components as nonlinear functions of the drain current, time delayed of the drain current and conjugate of the drain voltage.

A block diagram of the nonlinear drain circuit 12b of the pre-distorter 12 is shown in Fig 17. To simplify the block diagram, m=i in Fig 17. However, as the skilled person understands, the block diagram may be easily changed for different values of m by more delay blocks and nonlinear g-function blocks related to the specific delay being added along the same principles as outlined above. Using the estimated output gate voltage v_g (n) from Equation (26) and the inverse response of the gate impedance Y, the fundamental RF output gate current may then be derived by filtering the estimated gate voltage as follows:

Using Equations (13) and (15), the baseband gate deviation voltage 5v_{g 0} may be approximated as a filtered version of the gate input signal ι¾. For the fundamental RF gate deviation voltage 5v_{g Λ} , a similar approximation may also be used. Using such approximations together with Equation (16), the signal after the linear input filter maybe expressed as follows: w> (^w) ⁼ Λ.ι ψ_* ^' ¾r (^w) ⁺ Sg,io (|^zg (ⁿ)\)^■ ig (ⁿ)^■∑ ^Zg,o (^m)^■ igfi (n - m) + ...

m-l

+ g_g,n Z_{g l} (m)^■ i^* _g (n - m)

(28) The filter operation may be incorporated into the nonlinear function, and thus Equation (28) maybe further reduced as follows: (ⁿ) = f_g,i (|'g (ⁿ)\)^■ ig (ⁿ) + 8g,wm (|'g,i (ⁿ)\)^■ ig (n)^■∑/_g,o (n - m)

m-l

Equation (29) thus comprises signal components which are nonlinear functions of the gate currents, time delayed of the gate current and the conjugate of the drain current.

Finally, using Equations (20), (21) and (29), the pre-distorted output signal v, (n) may be determined as the summation of the signal after the input filter and the signal filtered by the drain-to-gate feedback filter and thus be expressed as follows: v_l (n) = w(n) + w_{d g} (n) = ...

^M

= .ι ψ_* ^' ¾r (^w) ⁺ ¾o™ (|^zg (^w)|) · ig (^{n ■}∑^zg,o (n - ) + ... ...

A block diagram of the nonlinear gate circuit i2e (including feedback) of the pre-distorter 12 is shown in Fig 18. To simplify the block diagram, m=i in Fig 18. However, as the skilled person understands, the block diagram maybe easily changed for different values of m by more delay blocks and nonlinear g-function blocks related to the specific delay being added along the same principles as outlined above. The desired pre-distorted input signal, u_pre, is obtained by filtering the signal v, (n) with the linear inverse input filter I2f (see, Fig 16).

Different implementation examples for the pre-distorter 12, e.g., using lookup-tables (LUTs) will now be described. Possible implementations of different variations of the pre-distorter 12 where, for example, the nonlinear gate circuit is replaced by a simple linear filter, and where, for example, the linear feedback filter in the pre-distorter 12 is omitted will also be described.

According to a first example, the pre-distorter 12 is implemented using look up tables (LUTs). Figs 19 and 20 are block diagrams for the drain circuit 12b' and the gate circuit I2e', respectively, using LUTs. In Figs 19 and 20 the general nonlinear functions/and g in Figs 17 and 18 have been replaced by LUTs which utilizes an address as an input. This address maybe generated in a separated block. The address provides input to the LUT and thus determines which entry in the LUT to choose. The normalization block and FIR filter blocks with F_out, ¾i, and Zd,₀ in Fig 17 have been omitted in Fig 19; and the normalization block and FIR filter block with F_g,i in Fig 18 have been omitted in Fig 20. The FIR blocks with F_out and hf in Fig 18 have been replaced by a general FIR filter block in Fig 20.

As disclosed above, the gate circuit of the RFPA 31 is commonly not as nonlinear as the drain circuit. Therefore, according to a second example, the gate circuit is modeled using a linear filter in the pre-distorter 12. Fig 21 is a block diagram of a LUT implementation of a pre-distorter 12' when considering the gate circuit as linear and the drain circuit as nonlinear. The linear filter used to model the gate circuit may be incorporated with the feedback and input filters which in Fig 21 is denoted by a general linear filter block. The block diagram of Fig 21 can be used for a case when there only are linear input and gate filters but no feedback filter. In such a case, the filter block only represents the combinations of the linear input filter and the linear gate filter.

In summary, there has been disclosed a (digital) pre-distorter 12 for compensating for non-linearity in RFPAs 31 with memory effects. The pre- distorter 12 is based on a grey-box modeling approach involving linear and nonlinear functions. According to embodiments the nonlinear functions in the model are multi-dimensional functions and are followed by linear filters. According to embodiments the baseband, fundamental RF and higher harmonics have separate nonlinear functions and linear filters. According to embodiments the model has several sub-blocks to separately model quasi- static nonlinearity and memory effects. According to embodiments, for modeling the nonlinearity, a first (or higher) order approximation may be applied to model the deviations of the instantaneous baseband and

fundamental RF (and higher harmonics) voltages to the quasi-static voltages, including both gate and drain circuits. According to embodiments, for modeling the memory effects, linear input and output filters are used, and a drain-gate feedback filter is used in the model to account for in particular long-term memory effects in the RFPA.

The inventive concept has mainly been described above with reference to a few embodiments. However, as is readily appreciated by a person skilled in the art, other embodiments than the ones disclosed above are equally possible within the scope of the inventive concept, as defined by the appended patent claims.

Claims

1. A pre-distorter (12) for compensating for non-linearity in a radio frequency power amplifier (31), RFPA, the pre-distorter comprising a processing unit (22), whereby said pre-distorter is operative to:

acquire an input sequence (u); and

determine a compensated RFPA input sequence (u_pre) based on the input sequence and by implementing compensation of non-linearity in the RFPA based on a behaviour model (32) of the RFPA, the RFPA comprising a transistor (31a) having an input terminal, an output terminal, and a control terminal, and

wherein the behaviour model at least comprises a nonlinear input terminal element (32ε) and a recursive linear input terminal reflection filter element (321) such that output of the recursive linear input terminal reflection filter element provides input to the nonlinear input terminal element, and

wherein separate nonlinear and linear functions for each harmonics are provided in the behaviour model.

2. The pre-distorter according to claim 1, wherein the at least one nonlinear function is configured to model input terminal current variations due to nonlinear control terminal-to-input terminal and input terminal-to- input terminal trans-conductance in the RFPA, and wherein the recursive linear input terminal reflection filter element is configured to model frequency-dependent load impedance of said transistor in the RFPA.

3. The pre-distorter according to any one of the preceding claims, wherein the behaviour model further comprises a first linear filter element (32a) positioned upstream the nonlinear input terminal element in the behaviour model and configured to model memory effects and/ or nonlinearity of the RFPA.

4. The pre-distorter according to any one of the preceding claims, wherein the behaviour model further comprises a second linear filter element (32g) positioned downstream the nonlinear drain element in the behaviour model and configured to model memory effects and/or nonlinearity of the RFPA.

5. The pre-distorter according to any one of the preceding claims, wherein the behaviour model further comprises a nonlinear gate element (32b) positioned upstream the nonlinear input terminal element in the behaviour model, wherein the nonlinear control terminal element implements at least one nonlinear function and a recursive linear control terminal reflection filter element (32c) such that output of the recursive linear control terminal reflection filter element provides input to the nonlinear function, wherein the recursive linear control terminal reflection filter element is configured to model frequency-dependent control terminal impedance in the RFPA, and wherein the at least one nonlinear function is configured to model control terminal voltage variations of intrinsic control terminal voltage in the RFPA.

6. The pre-distorter according to claims 3 and 5, wherein the nonlinear control terminal element is positioned downstream the first linear filter element.

7. The pre-distorter according to any one of the preceding claims, wherein the behaviour model further comprises a linear control terminal element and a linear filter positioned upstream the nonlinear input terminal element in the behaviour model, wherein the linear control terminal element and the linear filter is configured to model a control terminal circuit in the RFPA.

8. The pre-distorter according to claim 5 or claim 7, wherein the behaviour model further comprises a feedback filter element (32d) positioned so as to provide feedback from the nonlinear input terminal element to the nonlinear control terminal element or the linear control terminal element and configured to model at least one of memory effects of the RFPA and nonlinearity originating from feedback between the input terminal and the control terminal of said transistor in the RFPA.

9. The pre-distorter according to any one of the preceding claims, wherein the behaviour model comprises separate linear filters for baseband parts of the input sequence and for fundamental radio-frequency parts of the input sequence, and wherein the separate linear filters are configured to interact such that signal components from the fundamental radio-frequency parts are used for the linear filters for the baseband parts and such that signal components from the baseband parts are used for the linear filters for the fundamental radio-frequency parts.

10. The pre-distorter according to claim 9, wherein the behaviour model comprises separate linear filters for at least a second order harmonics parts of the input sequence, and wherein the separate linear filters for said at least a second order harmonics parts of the input sequence are configured to interact with said separate linear filters for said baseband parts of the input sequence and for said fundamental radio-frequency parts of the input sequence.

11. The pre-distorter according to any one of the preceding claims, further comprising a nonlinear input terminal pre-distorter element (12b) configured to compensate for input terminal current variations due to nonlinear control terminal-to-input terminal and input terminal-to-input terminal trans- conductance in the RFPA, and a linear input terminal reflection filter element (12c) configured to compensate for frequency-dependent load impedance of said transistor in the RFPA.

12. The pre-distorter according to claim 3, further comprising a second linear inverse filter pre-distorter element (i2f) configured to compensate for at least one of said memory effects of the RFPA and for nonlinearity due to frequency dependency according to a transfer function between output of the pre-distorter and components operatively connected to said output of the pre-distorter.

13. The pre-distorter according to claim 4, further comprising a first linear inverse filter pre-distorter element (12a) configured to compensate for at least one of said memory effects of the RFPA and for nonlinearity due to frequency dependency according to a transfer function between input of the pre-distorter and components operatively connected to said input of the pre- distorter and/or a transfer function of the RFPA.

14. The pre-distorter according to claim 5, further comprising a nonlinear control terminal pre-distorter element implementing a linear inverse control terminal reflection filter element (i2d) and at least one nonlinear pre- distorter function (i2e), wherein the linear inverse control terminal reflection filter element is configured to compensate for said frequency-dependent control terminal impedance in the RFPA, and wherein the at least one nonlinear pre-distorter function is configured to compensate for said control terminal voltage variations of linear intrinsic control terminal voltage in the RFPA.

15. The pre-distorter according to claims 12 and 14, wherein the nonlinear control terminal pre-distorter element is positioned downstream the first linear inverse filter pre-distorter element.

16. The pre-distorter according to claim 7, further comprising a linear control terminal pre-distorter element (i2f), wherein the linear filter corresponds to a linear pre-distorter filter (32a), and wherein the linear filter pre-distorter element and linear pre-distorter filter are configured to compensate for said control terminal circuit in the RFPA.

17. The pre-distorter according to claim 8, further comprising a feedforward filter pre-distorter element (i2g) configured to compensate for said at least one of memory effects of the RFPA and for said nonlinearity originating from said feedback between the input terminal and the control terminal of said transistor in the RFPA.

18. The pre-distorter according to any one of the preceding claims, wherein the pre-distorter comprises separate nonlinear functions and linear filters for baseband parts of the input sequence and a fundamental radio-frequency part of the input sequence, and wherein the separate nonlinear functions and linear filters are configured to interact such that signal components from the fundamental radio-frequency parts are used for the nonlinear functions and linear filters for the baseband parts and such that signal components from the baseband parts are used for the nonlinear functions and linear filters for the fundamental radio-frequency parts.

19. The pre-distorter according to claim 18, wherein the pre-distorter comprises separate nonlinear functions and linear filters for at least a second order harmonics parts of the input sequence, and wherein the separate nonlinear functions and linear filters for said at least a second order harmonics parts of the input sequence are configured to interact with said separate nonlinear functions and linear filters for said baseband parts of the input sequence and for said fundamental radio-frequency parts of the input sequence.

20. The pre-distorter according to any one of the preceding claims, wherein the input sequence is a modulated baseband representation of a signal to be transmitted at fundamental frequency.

21. The pre-distorter according to any one of the preceding claims, further being operative to:

provide the compensated RFPA input sequence to the RFPA.

22. A network node (13) comprising a pre-distorter (12) according to any one of the preceding claims.

23. A wireless electronic device (14) comprising a pre-distorter (12) according to any one of claims 1 to 21.

24. A method for compensating for non-linearity in a radio frequency power amplifier (31), RFPA, the method being performed by a pre-distorter (12), comprising the steps of:

acquiring (S102) an input sequence (u); and

determining (S104) a compensated RFPA input sequence (u_pre) by subjecting the input sequence to a pre-distorter;

wherein the pre-distorter is configured to implement compensation of non-linearity in the RFPA based on a behaviour model (32) of the RFPA, the RFPA comprising a transistor (31a) having an input terminal, an output terminal, and a control terminal, and

25. A computer program (42) for compensating for non-linearity in a radio frequency power amplifier (31), RFPA, the computer program comprising computer program code which, when run on a processing unit (22), causes the processing unit to:

acquire (S102) an input sequence (u); and

determine (S104) a compensated RFPA input sequence (u_pre) by subjecting the input sequence to a pre-distorter;

26. A computer program product (41) comprising a computer program (42) according to claim 25 and a computer readable means (43) on which the computer program is stored.