A method and associated architecture for dividing column readout circuitry in an active pixel sensor in a manner which reduces the parasitic capacitance on the readout line. In a preferred implementation, column readout circuits are grouped in blocks and provided with block signaling. Accordingly, only...http://www.google.de/patents/US8054362?utm_source=gb-gplus-sharePatent US8054362 - Increasing readout speed in CMOS APS sensors through block readout
