A single polysilicon layer electrically programmable and electrically erasable read only memory cell is described. The cell utilizes an n-well inversion capacitor, formed in a semiconductor substrate as the control gate. One plate of the capacitor is formed from the same polysilicon layer as the floating...http://www.google.de/patents/US5301150?utm_source=gb-gplus-sharePatent US5301150 - Flash erasable single poly EPROM device
