A method for designing a system to be implemented on a target device includes generating a register transfer language (RTL) representation of the system from a description of the system without pipelined delays. The RTL representation of the system includes pipelined delays to facilitate timing of the...http://www.google.de/patents/US7913203?utm_source=gb-gplus-sharePatent US7913203 - Method and apparatus for designing a system on multiple field programmable gate array device types
