The present invention is a method, circuit and system for erasing one or more non-volatile memory (“NVM”) cells in an NVM array or array segment. According to some embodiments of the present invention, one or more erase pulse parameters may be associated with each of a number of array segments within...http://www.google.de/patents/US7369440?utm_source=gb-gplus-sharePatent US7369440 - Method, circuit and systems for erasing one or more non-volatile memory cells
