A buffered memory module including a downstream buffer, a downstream receiver, an upstream driver, an upstream receiver. The downstream buffer and the downstream receiver are both adapted for connection to a downstream memory bus in a packetized cascaded interconnect memory subsystem. The upstream driver...http://www.google.de/patents/US7480830?utm_source=gb-gplus-sharePatent US7480830 - System, method and storage medium for testing a memory module
