The present invention discloses a non-volatile memory device having a multi-level gate structure. The storage cell transistor in the cell array region and the transistor in the peripheral circuit region have the same multi-level gate structure. Also, multi-level polycrystalline silicon layers in the...http://www.google.de/patents/US5472892?utm_source=gb-gplus-sharePatent US5472892 - Method of making a non-volatile floating gate memory device with peripheral transistor
