The exposure of the interface between the bottom electrode and barrier layer to a high temperature oxygen ambience is avoided by recessed Pt-in-situ deposited with a barrier layer. ...http://www.google.de/patents/US20030077858?utm_source=gb-gplus-sharePatent US20030077858 - Recess Pt structure for high k stacked capacitor in DRAM and FRAM, and the method to form this structure
