The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein....http://www.google.de/patents/US7256484?utm_source=gb-gplus-sharePatent US7256484 - Memory expansion and chip scale stacking system and method
