A programmable interconnect structure is provided whereby core regions of an integrated circuit having circuits of different functional types therein are connected. Ports are defined in a first core region along its boundary with a second core region, and port multiplexers selectively provide signals...http://www.google.de/patents/US6005410?utm_source=gb-gplus-sharePatent US6005410 - Interconnect structure between heterogeneous core regions in a programmable array
