A clock signal generating circuit for a dynamic type semiconductor memory device including an input voltage level control unit for converting a transistor-transistor-logic (TTL) drive level to a metal-oxide-semiconductor (MOS) drive level during transmission of an address strobe signal; an address buffer...http://www.google.de/patents/US4739502?utm_source=gb-gplus-sharePatent US4739502 - Clock signal generating circuit for dynamic type semiconductor memory device