A data receiver is described that includes a microcomputer that is coupled to a self-clocking asynchronous data bus. The data bus includes three signal lines TDATA, CDATA and RDATA. Bits of a data block are detected by a first exclusive-OR gate that is coupled to the TDATA and CDATA lines. An interrupt...http://www.google.de/patents/US4616314?utm_source=gb-gplus-sharePatent US4616314 - Microcomputer controlled data receiver
