A display driver circuit includes a word line sequencer for providing a series of row addresses, and a row decoder for decoding each of the row addresses and asserting write signals on corresponding ones of a plurality of output terminals. An optional data path sequencer provides a series of path addresses...http://www.google.de/patents/US20020036634?utm_source=gb-gplus-sharePatent US20020036634 - Internal row sequencer for reducing bandwidth and peak current requirements in a display driver circuit
