Disclosed is a wafer substrate for integrated circuits 1 which by itself may be made either of conductive or non-conductive material. This substrate carries two planes or layers of patterned metal 19,20, thus providing two principal levels of interconnection. A programmable amorphous silicon insulation...http://www.google.de/patents/US4847732?utm_source=gb-gplus-sharePatent US4847732 - Wafer and method of making same
