A parallel packetized intermodule arbitrated high speed control data bus system which allows high speed communications between microprocessor modules in a more complex digital processing environment. The system features a simplified hardware architecture featuring fast FIFO queuing operating...http://www.google.de/patents/US5754803?utm_source=gb-gplus-sharePatent US5754803 - Parallel packetized intermodule arbitrated high speed control and data bus 
