A semiconductor integrated circuit comprising semiconductor regions in the form of first and second protruding poles that are provided on a semiconductor layer formed on a semiconductor substrate or an insulating substrate, and that are opposed to each other with an insulating region sandwiched therebetween,...http://www.google.de/patents/US4670768?utm_source=gb-gplus-sharePatent US4670768 - Complementary MOS integrated circuits having vertical channel FETs
