A semiconductor memory device includes an address register circuit for storing a plurality of address signals when an address latch enable signal is active in synchronization with a basic timing signal. When an internal operation start instructing signal is activated, a selected address signal from...http://www.google.de/patents/US5691954?utm_source=gb-gplus-sharePatent US5691954 - Semiconductor memory device in which data are read and written asynchronously with application of address signal 
