An erasable programmable read-only memory with NAND cell structure is disclosed which has memory cells provided on a N type substrate. The memory cells are divided into NAND cell blocks each of which has a series array of memory cell transistors. Each of the transistors has a floating gate, a control...http://www.google.de/patents/US4959812?utm_source=gb-gplus-sharePatent US4959812 - Electrically erasable programmable read-only memory with NAND cell structure
