A chip stack package is manufactured at a wafer level by forming connection vias in the scribe lanes adjacent the chips and connecting the device chip pads to the connection vias using rerouting lines. A lower chip is then attached and connected to a substrate, which may be a test wafer, and an upper...http://www.google.de/patents/US20050046002?utm_source=gb-gplus-sharePatent US20050046002 - Chip stack package and manufacturing method thereof
