A programmable logic device, in accordance with an embodiment, includes a first terminal; an input buffer having a buffer input terminal and a buffer output terminal; and a multiplexer coupled to the first terminal and to the input buffer, wherein the multiplexer is adapted to selectively couple either...http://www.google.de/patents/US7560953?utm_source=gb-gplus-sharePatent US7560953 - Power management systems and methods for programmable logic devices
