A process of fabricating a transistor employs a relatively thicker sacrificial nitride layer that reduces the time and cost associated with chemical-mechanical polish (CMP) processes by reducing the topography associated with the transistor. The process includes forming the gate oxide region and a field...http://www.google.de/patents/US7915129?utm_source=gb-gplus-sharePatent US7915129 - Method of fabricating high-voltage metal oxide semiconductor transistor devices
